The Linaro Binary Toolchain
============================
The Linaro GCC 6.4-2018.05-rc1 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
(sources) http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.05-rc1/
(binaries) http://snapshots.linaro.org/components/toolchain/binaries/6.4-2018.05-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.4-2018.05-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.05-rc1/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (users/linaro/binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 8.1 (gdb-8.1-branch)
https://lists.gnu.org/archive/html/info-gnu/2018-01/msg00016.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.4-2018.05-rc1)
==================================================
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* The Linaro GCC 6.3-2017.05 snapshot added support for -mpure-code
option to ARMv7-M and ARMv8-M targets. This option ensures functions
are put into sections that contain only code and no data.
* The GDB version was upgraded from GDB 8.0 to 8.1.
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03, Linaro GCC
6.3-2017.04, Linaro GCC 6.3-2017.05, Linaro GCC 6.3-2017.06, Linaro
GCC 6.4-2017.07, Linaro GCC 6.4-2017.08, Linaro GCC 6.4-2017.09,
Linaro GCC 6.4-2017.10 and Linaro GCC 6.4-2018.04.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
[VIRT-198 # QEMU: SVE Emulation Support ]
All softfp prerequisites merged upstream.
First 25 of 70 patches of SVE decode merged upstream.
[Upstream]
Review and testing of Alex's check-tcg revival.
[STOP]
r~
== Progress ==
o GNU release transition
* Provided support to handle infra issues
* Meetings on GCC 8
o LLVM
* Benchmarking effort with HPC team [HPC-183/184]
- Added OpenMP support to LLVM scripts and jobs
- Generate toolchain tarballs as job artifact.
* Thumbv8 bot failures [TCWG-1400]:
- Needs a deeper cleanup of LIT configuration.
o Misc
* Various meetings and discussions.
== This Week ==
* GCC bugs (8/10)
a) Committed patches for:
i) TCWG-1413 / PR83648: missing -Wsuggest-attribute=malloc on a
trivial malloc-like function
ii) TCWG-1414 / PR85817: ICE in expand_call at gcc/calls.c:4291
iii) TCWG-1415 / PR85734: --suggest-attribute=malloc misdiagnoses
static functions
b) Work in progress for:
i) TCWG-125: static cast from float to int not working on ARM hardfp
ii) TCWG-1416 / PR85787: malloc_candidate_p fails to detect malloc
attribute on nested phis
* TCWG-1234: Code hoisting and register pressure (1/10)
i) Looking into Bin Cheng's patches for computing register pressure on GIMPLE
* Misc (1/10)
- Meetings
- Gerrit reviews 25367 and 25371
== Next Week ==
- Continue with GCC bugs
- TCWG-1234
SVE Support ([VIRT-198])
========================
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- get back to merging/preparing the SVE series :todo
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
SVE Reviews
~~~~~~~~~~~
- reviewed {PATCH 0/9} target/arm: Fixups for ARM_FEATURE_V8_FP16
Message-Id: <20180425012300.14698-1-richard.henderson(a)linaro.org>
SoftFloat Bugs ([VIRT-69])
==========================
- CLOSING NOTE [2018-05-18 Fri 16:41]
I think all known bugs have fixes now merged.
[VIRT-69] https://projects.linaro.org/browse/VIRT-69
Upstream Work ([VIRT-109])
==========================
- catch-up on review queue :todo
- posted {PATCH v4 00/49} fix building of tests/tcg Message-Id:
<20180517174718.10107-1-alex.bennee(a)linaro.org>
- spin v5 and get merged :todo
- posted {PATCH v2 0/2} support reading of CNT{VCT|FRQ}_EL0 from
user-space Message-Id:
<20180518114424.18054-1-alex.bennee(a)linaro.org>
- posted {RFC PATCH 0/2} Travis Stability Patches Message-Id:
<20180518091440.1559-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[a gdb bug] https://sourceware.org/bugzilla/show_bug.cgi?id=23127
Fixing up tests/tcg
~~~~~~~~~~~~~~~~~~~
- posted {PATCH v4 00/49} fix building of tests/tcg Message-Id:
<20180517174718.10107-1-alex.bennee(a)linaro.org>
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Other Tasks
===========
- Investigate weird QEMU CI OBS build issue :todo
- the OBS build should be failing the RISU tests but isn't, despite
the commit id it reports
- bringing up my SyncQuacer DevBox with Gentoo
- needed one patch for Nouveau w.r.t 32/64 bit PCIE lanes
- needed to manually patch LVM to build initrd Message-Id:
<20180516201903.24309-1-alex.bennee(a)linaro.org>
Completed Reviews [7/7]
=======================
{PATCH v6 0/3} target/arm: Add a dynamic XML-description of the cp-registers to GDB
Message-Id: <1524153386-3550-1-git-send-email-abdallah.bouassida(a)lauterbach.com>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE tested with new gdb - some weirdness on timer register
{PATCH 00/19} softfloat: Clean up NaN handling
Message-Id: <20180511004345.26708-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-11 Fri 20:55]
Found a few minor bugs, rth re-spinning with my float-to-float stuff
{PATCH v4 00/11} target/arm: Fixups for ARM_FEATURE_V8_FP16
Message-Id: <20180512003217.9105-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-15 Tue 11:42]
Despite initial confusion on branch tested fine on both, all good.
{Qemu-devel} {PATCH 0/9} target/arm: Implement v8.1-Atomics
Message-Id: <20180427002651.28356-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-15 Tue 11:43]
Already merged, others have reviewed
{PATCH v2 00/27} softfloat patch roundup
Message-Id: <20180512004311.9299-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-15 Tue 11:45]
v5 released
{PATCH v5 00/28} softfloat patch roundup
Message-Id: <20180514221219.7091-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-15 Tue 15:10]
Looking good.
{PATCH v6 00/28} softfloat patch roundup
Message-Id: <20180515222540.9988-1-richard.henderson(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-05-18 Fri 16:16]
Merged upstream
Absences
========
- CBG Beer Festival (half day sometime next week)
- VNC18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-arm} {PATCH v3-a 00/27} target/arm: Scalable Vector Extension
Message-Id: <20180516223007.10256-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH} gdbstub: Clarify what gdb_handlesig() is doing
Message-Id: <20180515181958.25837-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH 0/9} Honor CPU_DUMP_FPU
Message-Id: <20180511035240.4016-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {RFC PATCH v2 00/12} iommu: add MemTxAttrs argument to IOMMU translate function
Message-Id: <CAFEAcA_Dei48HtKk6GnEgXYcXdY2htCXej4pSfY+q9V6f=abdA(a)mail.gmail.com>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v3 00/15} fp-test + hardfloat
Message-Id: <1522883475-27858-1-git-send-email-cota(a)braap.org>
--
Alex Bennée
[Activity]
[TCWG-1319] Link AOSP with LLD.
Closed this out as I've gone as far as I can profitably go without
being an Android expert.
- With trunk LLD I can now link and boot AOSP with LLD without any
use_clang_lld=false on both Arm and AArch64 emulators. I also managed
to get it to boot on a Hikey960 (aarch64).
- Communicated recent additions to LLD in aid of building AOSP, and
extra command line options needed to the Google team.
Landed support for GCC inline assembly constraint S in LLVM.
Some comments on LTO + linker script proposal on llvm-dev mailing list.
Started thinking in more detail about ICF=safe.
- Decided that LLVM was a better place to do this than clang after
attempting to use libtooling.
- There is an existing LLVM pass called merge functions that does what
ICF does but at the LLVM IR level
-- This is off by default, maybe worth looking at as part of LTO and
code-size reductions.
- Started to write a prototype pass that uses
Function::isAddressTaken() although I think that this may give me too
pessimistic a result.
Peter
Progress: [short week, 3 days]
* VIRT-65 [QEMU upstream maintainership]
+ code review
- make system registers visible via gdbstub
- Richard's patches to fix various softfloat issues
* VIRT-164 [improve Cortex-M emulation]
+ MPC emulation:
- rebased and fixed up conflicts with a different series that
touched the same parts of the memory system
- realised that passing txattrs to IOMMUs means we need to
change the notifier API; came up with a plan to handle this
by using "IOMMU indexes" analogous to our existing TCG MMU
indexes. Updated everything to the new API that comes out
of that approach.
- started on tidying up the final loose ends; hope to have
something I can send to the list early next week
thanks
-- PMM
o 3 days off
== Progress ==
o LLVM
* Thumbv8 bot failures:
- Reproduced the issue on TX1
- These test cases need to be disabled for ARM targets (patch on-going).
o Misc
* Various meetings and discussions.
[VIRT-243 # ARMv8.1-Atomic instructions ]
v3 posted and merged.
[Upstream]
(Upgraded my laptop to Fedora 28, which lead to...)
Posted a patch for gcc 8 Werrors.
Posted patches for clang 6 Werrors.
Sent pull for Emilio's TranslateOps patches.
Sent pull for my openrisc decodetree patches.
Sent pull for tcg-next.
Reviewed microblaze patches.
Posted two rounds of softfloat snan patches.
Posted two rounds of fp16 patches.
[VIRT-198 # QEMU: SVE Emulation Support ]
Most of this week's work was on indirectly related patch sets. In particular,
fp16 and atomics. The last round of check-gcc testing had
FAIL: gcc.dg/vect/slp-multitypes-2.c execution test
FAIL: gcc.target/aarch64/advsimd-intrinsics/vldX.c -O0 execution test
FAIL: gcc.target/aarch64/advsimd-intrinsics/vqtbX.c -O0 execution test
as the only remaining (relevant) failures. I believe that the latter two are
generic tcg failures that are cured by this week's tcg-next pull, but have not
yet re-based everything to be sure.
r~
