== Progress ==
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074][3/10]
- Ran more tests and reported the results upstream
* [ARM GlobalISel] Add support for soft float targets [TCWG-1039][3/10]
- Started supporting G_FREM and G_FPOW, which are already handled by
the target-independent code
- Committed G_FREM upstream, G_FPOW is ready to commit first thing next week
* Migrate scripts to Python 3 [TCWG-896] [1/10]
- Moved llvm-helper-scripts
* Misc [3/10]
- Mailing lists, code reviews, meetings
== Plan ==
* [ARM GlobalISel] Add support for soft float targets [TCWG-1039][3/10]
=== This Week ===
GDB Kernel Awarenes - Kernel Dump setup for ARM [9/10]
-- Background study on kdump and try to find working steps for QEMU ARM.
-- There is a problem with kdump-tools install script with QEMU
-- Tried building kernel for Raspberry Pi2 and Pi3 with kdump, no
success so far.
-- Setup B2260 with debian and try kdump setup
-- Setup and kernel config successful but kdump couldn't configure
-- Tried the same with HiKey board
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
GDB Kernel Awarenes
-- Start merging Peter's and IBM patches
-- Look around for help on Kdump setup.
== This Week ==
* TCWG-1005 (6/10)
- Fixed firefox ICE
- Unfortunately that gives rise to another ICE with ipa-icf pass :(
Investigating if this
caused by the patch or a latent bug in ipa-icf.
- Builds well with chromium
* Validation (1/10)
- abe/extraconfig patches
- backport review
* Public Holiday (2/10)
* Misc (1/10)
- Meetings
== Next Week ==
- Continue ongoing tasks
~ Progress ~
* TCWG-1050, GDB 8.0 release. [7/10]
** Fix PR 19942, but looks my patch is completely wrong as I fully
misunderstood the "reference count" in GDB. Writing the v2.
** Intel btrace python interface discussion, a marathon discussion
about both the interface and implementation. Good thing is that we
agree that we need to change the interface. This takes most of my
time this week.
* TCWG-1040, Review SVE patches. [2/10]
Some discussions on avoid copying register contents to a local buffer
again, which is from my review comments to Alan's patch and my
suggested patch. Spend some time on understanding the zero
initialization of union in C++. I'll update my suggested patch.
* Update AArch32 GDB buildbot option, so we can get more reasonable
test result. [1/10]
~ Plan ~
* More remote tests for GDB 8.0 release.
* Fix PR 19942.
* One day off on Thu.
--
Yao Qi
[Eurollvm]
Attended, we have recorded our thoughts in EuroLLVM 2017 Recap doc
[TCWG-614] Range extension thunks
- I've finished my downstream implementation, and have written almost
all the lld tests I'd like to write
- Still need to test on real large programs such as libclang.so
- Made a start at breaking down the implementation into smaller
patches that can be sensibly upstreamed
Plans for next week
[TCWG-614]
- Aiming to start upstreaming on Monday, I'm expecting this to be
quite a drawn out process
- Continue testing on ARM Linux
Planned Absences
ACCU conference 2017 27-29 April
== Progress ==
* Validation
- helped with new llvm build scripts and jobs
- improvements to container scripts to cope with llvm's higher needs
in resources
- improved tcwg-regression tests
- various to remove dependencies on env variables
- comparison script now reports the associated .exp file name,
making it easier to reproduce a regression
- experimented with lava
- started work on benchmarking scripts
* GCC
- keeping an eye on trunk regressions
- update to qemu-2.8.0 introduced regressions in validation for
armeb on some atomic tests
* misc (conf-calls, meetings, emails, ....)
== Next ==
* Validation:
- hopefully nothing :)
* Benchmarking:scripting
== Progress ==
* EuroLLVM trip [6/10]
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074][2/10]
- Apple wants to switch the default O0 to GlobalISel for AArch64, so
we need to run tests and gather metrics
- I'm running the test-suite and selfhost with GlobalISel to see how
it performs
* Misc [2/10]
- Mailing list, code reviews, meetings, herding GlobalISel cats
(we're trying to open more communication channels with Apple so we can
unblock progress)
== Plan ==
* Wrap up TCWG-1074
* Learn more TableGen and do more code review
Hello all,
I've been using GCC 4.9.4 for a while now (arm-linux-gnueabi-gcc (Linaro
GCC 4.9-2017.01) 4.9.4), and I found this strange behavior:
In the library header (libm5op.h):
-----
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
void warm_and_run_(int64_t intervals_warm, int64_t intervals_run);
#ifdef __cplusplus
}
#endif
-----
In the library C file (m5op_arm_.c):
-----
#include "stdio.h"
#include <stdlib.h>
#include "libm5op.h"
void warm_and_run_(int64_t intervals_warm, int64_t intervals_run)
{
// Code here using args
}
-----
The code above is in
/home/fernando/work/benchs/SPEC_CPU2006v1.1-aarch64/m5op/ and compiled as a
library with GCC 6.3.1 and is ok:
~/work/toolchains/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc
-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -O3
-fno-optimize-sibling-calls -c m5op_arm_.c -o m5op_arm_.o
~/work/toolchains/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc
-c m5op_arm.S -o m5op_arm.o
~/work/toolchains/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabi/bin/arm-linux-gnueabi-ar
rcs libm5op32.a m5op_arm_.o m5op_arm.o
The library is used in a source code compiled with the GCC 4.9.4 describe
at the begining.
In the C file:
-----
#include <libm5op.h>
S_regmatch(pTHX_ regnode *prog)
{
warm_and_run_(161, 818);
// Code continues
}
------
This source is compile with:
~/work/toolchains/gcc-linaro-4.9.4-2017.01-x86_64_arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc
-c -o regexec.o -DSPEC_CPU -DNDEBUG -DPERL_CORE -static -marm
-march=armv7-a - mtune=generic-armv7-a -mfpu=neon-vfpv4
-mfloat-abi=softfp -O3 -fno-strict-aliasing -std=gnu89
-I/home/fernando/work/benchs/SPEC_CPU2006v1.1-aarch64/m5op/
-L/home/fernando/work/benchs/ SPEC_CPU2006v1.1-aarch64/m5op/
-DGEM5_ARM32=1 -DSPEC_CPU_ILP32 -DSPEC_CPU_LINUX_IA32 regexec.c
~/work/toolchains/gcc-linaro-4.9.4-2017.01-x86_64_arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc
-static -marm -march=armv7-a -mtune=generic-armv7-a -mfpu=neon-vfpv4
-mfloat- abi=softfp -O3 -fno-strict-aliasing -std=gnu89
-I/home/fernando/work/benchs/SPEC_CPU2006v1.1-aarch64/m5op/
-L/home/fernando/work/benchs/SPEC_CPU2006v1.1-aarch64/m5op/ -DGEM5_ARM32=1
-DSPEC_CPU_ILP32 -DSPEC_CPU_LINUX_IA32 av.o deb.o doio.o doop.o
dump.o globals.o gv.o hv.o locale.o mg.o numeric.o op.o pad.o perl.o
perlapi.o perlio.o perlmain.o perly.o pp.o pp_ctl.o pp_hot.o pp_pack.o
pp_sort.o pp_sys.o regcomp.o regexec.o run.o scope.o sv.o taint.o toke.o
universal.o utf8.o util.o xsutils.o Base64.o Cwd.o Dumper.o HiRes.o IO.o
Peek.o attrs.o poll.o stdio.o DynaLoader.o MD5.o Storable.o Parser.o
specrand.o Hostname.o Opcode.o -lm -lm5op32 -lm5op32 -o
perlbench
Finally, the assembled code of S_regmatch has:
-----
af2d0: e3a000a1 mov r0, #161 ; 0xa1
af2d4: e3001332 movw r1, #818 ; 0x332
af2d8: e58d3018 str r3, [sp, #24]
af2dc: e58d2028 str r2, [sp, #40] ; 0x28
af2e0: fa02615c blx 147858 <warm_and_run_>
-----
So, this means that warm_and_run_ is assumed by GCC 4.9.4 to have 32 bits
arguments, while they are indeed 64 bits. This seems to be a bug for me.
The code in the library is correctly allocating 2*32 bits regs for each
argument.
For now, I'm using int32_t, and I just thought it could be useful to
feedback you guys.
--
Fernando A. Endo, Post-doc
INRIA Rennes-Bretagne Atlantique
France
== Progress ==
* Validation
- finally merged most of work of the past weeks
- main jobs are now using start-container scripts
- helped with new llvm build scripts and jobs
- abe initial config for gcc7: need to investigate a binutils build
problem in a trusty container
- improved tcwg-regression tests, identified a regression for bug-2123
- many validation-related patches to review
* GCC
- reported a regresion upstream
* misc (conf-calls, meetings, emails, ....)
- started discussing benchmarking
== Next ==
* Validation:
- a few patches pending review (to improve reports, debug-ability of
containers, ...)
- work on a new proposal to upgrade our qemu
- probably more cleanup needed in the jobs (slaves, basedir scm option, ...)
- improve tcwg-regression
- boot kernel after build
* Benchmarking: start to contribute
