== Progress == * Reload - IRA bug fix (5/10) - In thumb2 mode, we get a pattern "*ior_scc_scc" for the third argument expression by the combiner pass. - Expression Class:foo(x,0,((y==x)||(z==x))) x gets register r1 and second r2 . - The class object this pointer is passed in r0. r7 is used for stack pointer. - The pattern "*ior_scc_scc" demands more LO_REGISTERS. It needs 5 LO_registers for destination and 4 source operands. But we are left with r3,r4,r5,r6 only. - Such situation is handled for Thumb1 only using TARGET_CLASS_LIKELY_SPILLED_P. Thumb2 should accept HI registers also. - Changing the pattern to accept general registers for destination operation is also not helping. - Need to explore secondary reload macros.
* Misc - AMD meetings and internal tasks (2/10) - 1-1 meetings (Ryan, Christophe and Maxim) (1/10)
* Testing: Installed packages and ran GCC Linaro compiler 4.8 correctness tests on hardware. Completed running SPEC 2006 for -O3 -mcpu=cortex-a57 flag (2/10).
== Plan == * Continue bug fixing. * LTO bootstrap failure * Testing GCC Linaro compiler on hardware. * New laptop install ubuntu, set up chroot and migrate to toolchain 64 environment. * UK VISA processing.