This is all of the non-exception cases of DISAS_NORETURN.
For the rest of the synchronous exceptions, the state of SPSR_ELx.BTYPE is CONSTRAINED UNPREDICTABLE. However, it makes more sense to me to have syscalls reset BTYPE.
Signed-off-by: Richard Henderson richard.henderson@linaro.org --- target/arm/translate-a64.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index bbb6751df3..9820a9b745 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1361,6 +1361,7 @@ static void disas_uncond_b_imm(DisasContext *s, uint32_t insn) }
/* B Branch / BL Branch with link */ + reset_btype(s); gen_goto_tb(s, 0, addr); }
@@ -1385,6 +1386,7 @@ static void disas_comp_b_imm(DisasContext *s, uint32_t insn) tcg_cmp = read_cpu_reg(s, rt, sf); label_match = gen_new_label();
+ reset_btype(s); tcg_gen_brcondi_i64(op ? TCG_COND_NE : TCG_COND_EQ, tcg_cmp, 0, label_match);
@@ -1414,6 +1416,8 @@ static void disas_test_b_imm(DisasContext *s, uint32_t insn) tcg_cmp = tcg_temp_new_i64(); tcg_gen_andi_i64(tcg_cmp, cpu_reg(s, rt), (1ULL << bit_pos)); label_match = gen_new_label(); + + reset_btype(s); tcg_gen_brcondi_i64(op ? TCG_COND_NE : TCG_COND_EQ, tcg_cmp, 0, label_match); tcg_temp_free_i64(tcg_cmp); @@ -1440,6 +1444,7 @@ static void disas_cond_b_imm(DisasContext *s, uint32_t insn) addr = s->pc + sextract32(insn, 5, 19) * 4 - 4; cond = extract32(insn, 0, 4);
+ reset_btype(s); if (cond < 0x0e) { /* genuinely conditional branches */ TCGLabel *label_match = gen_new_label(); @@ -1604,6 +1609,7 @@ static void handle_sync(DisasContext *s, uint32_t insn, * a self-modified code correctly and also to take * any pending interrupts immediately. */ + reset_btype(s); gen_goto_tb(s, 0, s->pc); return; default: @@ -1884,6 +1890,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) switch (op2_ll) { case 1: /* SVC */ gen_ss_advance(s); + reset_btype(s); gen_exception_insn(s, 0, EXCP_SWI, syn_aa64_svc(imm16), default_exception_el(s)); break; @@ -1898,6 +1905,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) gen_a64_set_pc_im(s->pc - 4); gen_helper_pre_hvc(cpu_env); gen_ss_advance(s); + reset_btype(s); gen_exception_insn(s, 0, EXCP_HVC, syn_aa64_hvc(imm16), 2); break; case 3: /* SMC */ @@ -1910,6 +1918,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) gen_helper_pre_smc(cpu_env, tmp); tcg_temp_free_i32(tmp); gen_ss_advance(s); + reset_btype(s); gen_exception_insn(s, 0, EXCP_SMC, syn_aa64_smc(imm16), 3); break; default: