Linaro-uefi

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811 discussions

Re: [Linaro-uefi] [linaro-uefi][ArmMmuLib] Is it a bug?

by Heyi Guo

Any comments? 在 3/16/2017 9:03 PM, Heyi Guo 写道: > Hi folks, > > In "ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c", line 262, I > found below code which seems like a bug. Could you help to confirm? > > 262 TableAttributes = TT_TABLE_AP_NO_PERMISSION; > 263 if (Attributes & TT_NS) { > 264 TableAttributes = TT_TABLE_NS; > 265 } > 266 > > Why not a "|=" is used at line 264? Are TT_TABLE_AP_NO_PERMISSION and > TT_TABLE_NS exclusive? > > Thanks and regards, > > Gary (Heyi Guo) > >

7 years, 9 months

[linaro-uefi] How to implement GOP frame buffer

by Heyi Guo

Hi Ard, To support UEFI GOP frame buffer, is it enough to provide UEFI GOP protocol and valid FrameBufferBase and FrameBufferSize via GOP mode? I still have some question. As we are using a PCIe VGA device, the frame buffer might probably be certain PCIe memory resource BAR of VGA device. Then is it possible for OS to re-enumerate PCIe bus and re-allocate memory BAR resources? If so, who will be responsible to update frame buffer base? Thanks and regards, Heyi Guo (Gary)

7 years, 9 months

[PATCH 0/4] Armada 8k preparation

by Marcin Wojtas

Hi, As agreed during RTC support review, we submit first a series being a preparation for adding Armada 80x0 SoC support, which is a superset of existing in OpenPlatformPkg Armada 70x0. Because currently the devices hardware description is unnecessarily added in the PCD's, we begin a cleanup, allowing to achieve more flexible and scalable approach. This patchset is a beginning of Armada 7k/8k support improvement, that will allow to store SoC's description in one place, accessible for the drivers and libraries. In near future more peripherals will be described in a similar way to storage devices, that are registered via PciEmulation. The commits are also available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp… Any remarks or comments will be very welcome. Best regards, Marcin Konstantin Porotchkin (4): Platforms/Marvell: ComPhyLib: Fix compilation warning Platforms/Marvell: Add support for COMPHY on CP slaves Platform/Marvell: Extend and share the platform description Platform/Marvell: ComPhyLib: Enable SATA PHY init for multiple devices Platforms/Marvell/Armada/Armada70x0.dsc | 9 +-- Platforms/Marvell/Include/Library/MvHwDescLib.h | 78 +++++++++++++++++++++++ Platforms/Marvell/Library/ComPhyLib/ComPhyCp110.c | 52 ++++++++++----- Platforms/Marvell/Library/ComPhyLib/ComPhyLib.c | 8 ++- Platforms/Marvell/Library/ComPhyLib/ComPhyLib.inf | 3 +- Platforms/Marvell/Marvell.dec | 4 -- Platforms/Marvell/PciEmulation/PciEmulation.c | 44 ++----------- 7 files changed, 128 insertions(+), 70 deletions(-) create mode 100644 Platforms/Marvell/Include/Library/MvHwDescLib.h -- 1.8.3.1

7 years, 9 months

[PATCH] Platforms/StyxSpiFvDxe: fix potential boot crash on varstore write

by Ard Biesheuvel

The varstore shadow FV is kept in sync with actual SPI flash read, write and erase operations. Since we only expose a small slice of the SPI flash for the variable store, we keep an internal LBA offset and take it into account when translating shadow FV LBAs to actual LBAs. As it turns out, the erase routine applies the LBA offset incorrectly, resulting in the wrong flash block being erased, and the wrong range to be erased in the shadow FV, which could result in a crash if the memory access is out of bounds. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c | 1 - 1 file changed, 1 deletion(-) diff --git a/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c b/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c index 03fd9e816b96..f544af3eeb2d 100644 --- a/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c +++ b/Platforms/AMD/Styx/Drivers/StyxSpiFvDxe/StyxSpiFvDxe.c @@ -439,7 +439,6 @@ StyxSpiFvDxeErase ( for (Start = VA_ARG (Args, EFI_LBA); Start != EFI_LBA_LIST_TERMINATOR; Start = VA_ARG (Args, EFI_LBA)) { - Start += mNvStorageLbaOffset; Length = VA_ARG (Args, UINTN); Status = mIscpDxeProtocol->AmdExecuteEraseFvBlockDxe (mIscpDxeProtocol, (Start + mNvStorageLbaOffset) * BLOCK_SIZE, -- 2.7.4

7 years, 9 months

[PATCH v4 0/6] ATAPI support on SiI SATA adapter

by Jeremy Linton

The SiI isn't an AHCI compatible adapter so it implements the EFI ATA pass-through protocol directly. This works for fixed hard drives, but not ATAPI attached devices (CDROM, DVDROM, TAPE, etc). This patch adds read only ATAPI support via the EFI SCSI pass-through protocol, allowing boot from attached CD/DVD. This patch also cleans up, and tweaks recovery paths/etc in the original driver. When combined with the ARM/PCI dma lib changes this allows us to relax the IO alignment requirement that caused grub failures. Finally, the OpenPlatformPkg/Juno must be updated, with another patch to avoid build breaks now that the SiI has a dependency on the SCSI libraries. V3->V4 Fixed a bug that in theory kept multiple ATAPI devices from working. More patch formatting fixes per Ard Dropped the sense validation logic, and changes to the Mde header V2->V3: Send the correct patch, rather than the one I was running the patch checker against. V1->V2: Formatting corrections per Ard's comments and Daniil's updated patch checker. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton(a)arm.com> Jeremy Linton (6): EmbeddedPkg: SiI3132: Note that ARM is using this Dxe EmbeddedPkg: SiI3132: Add ScsiProtocol callbacks EmbeddedPkg: SiI3132: Add SCSI protocol support to header EmbeddedPkg: SiI3132: Break out FIS command submission EmbeddedPkg: SiI3132: Cleanup device node creation EmbeddedPkg: SiI3132: Enable SCSI pass-through protocol EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c | 52 ++- EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h | 103 ++++- .../Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf | 2 + .../Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c | 280 ++++++++------ .../Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c | 424 +++++++++++++++++++++ MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf | 2 +- OpenPlatformPkg | 2 +- 7 files changed, 725 insertions(+), 140 deletions(-) create mode 100644 EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c -- 2.9.3

7 years, 9 months

[PATCH] Platforms/ARM: enable memory protection features

by Ard Biesheuvel

This enables the recently added and/or enhanced memory protection features in upstream EDK2: - strict code/data separation PE/COFF sections so that mappings can be made either read-only or non-executable - remove exec permissions from all other (i.e., non-code) regions (as far as is feasible without breaking GRUB) - remap the DXE stack as non-executable before entering DxeCore Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/ARM/VExpress/ArmVExpress.dsc.inc | 21 ++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Platforms/ARM/VExpress/ArmVExpress.dsc.inc b/Platforms/ARM/VExpress/ArmVExpress.dsc.inc index c94001b3bcdb..431d6d0f76ce 100644 --- a/Platforms/ARM/VExpress/ArmVExpress.dsc.inc +++ b/Platforms/ARM/VExpress/ArmVExpress.dsc.inc @@ -14,6 +14,9 @@ [Defines] SECURE_BOOT_ENABLE = FALSE +[BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION] + GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 + [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] GCC:*_*_ARM_DLINK_FLAGS = -z common-page-size=0x1000 GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000 @@ -437,6 +440,24 @@ # GUID of the UI app gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } + # + # Enable strict image permissions for all images. (This applies + # only to images that were built with >= 4 KB section alignment.) + # + gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x3 + + # + # Enable NX memory protection for all non-code regions, including OEM and OS + # reserved ones, with the exception of LoaderData regions, of which OS loaders + # (i.e., GRUB) may assume that its contents are executable. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD1 + + # + # Enable the non-executable DXE stack. (This gets set up by DxeIpl) + # + gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE + [Components.common] MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { <LibraryClasses> -- 2.7.4

7 years, 9 months

[PATCH 0/2] Armada 70x0 RTC support

by Marcin Wojtas

Hi, I submit two patches adding RTC support for Armada 7k SoC. It allows for proper real time clock configuration and access via EFI runtime services. The patches are also available in the github. https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp… Any comments or remarks would be very welcome. Best regards, Marcin Marcin Wojtas (2): Platforms/Marvell: Introduce RTC support Platforms/Marvell: Enable RTC library on Armada70x0 platforms Platforms/Marvell/Armada/Armada.dsc.inc | 3 +- Platforms/Marvell/Armada/Armada70x0.dsc | 3 + .../Library/RealTimeClockLib/RealTimeClockLib.c | 350 +++++++++++++++++++++ .../Library/RealTimeClockLib/RealTimeClockLib.inf | 52 +++ Platforms/Marvell/Marvell.dec | 3 + 5 files changed, 410 insertions(+), 1 deletion(-) create mode 100644 Platforms/Marvell/Armada/Library/RealTimeClockLib/RealTimeClockLib.c create mode 100644 Platforms/Marvell/Armada/Library/RealTimeClockLib/RealTimeClockLib.inf -- 1.8.3.1

7 years, 9 months

Re: [Linaro-uefi] Fwd: Re: [Linaro-uefi v1] Hisilicon/D02: update FVMAIN_SEC.fv

by Chenhui Sun

hi Leif, Sorry for replying late. I have modified the commit message according your comments. Please find the patch at: ssh://git@git.linaro.org/people/heyi.guo/OpenPlatformPkg.git branch: rp-17.04-01 thanks. Regards, Chenhui 在 2017/3/14 19:45, Heyi Guo 写道: > > > > > -------- 转发的消息 -------- > 主题: Re: [Linaro-uefi v1] Hisilicon/D02: update FVMAIN_SEC.fv > 日期: Wed, 1 Mar 2017 15:19:22 +0000 > 发件人: Leif Lindholm <leif.lindholm(a)linaro.org> > 收件人: Heyi Guo <heyi.guo(a)linaro.org> > 抄送: linaro-uefi(a)lists.linaro.org, ard.biesheuvel(a)linaro.org, > graeme.gregory(a)linaro.org, sunchenhui(a)huawei.com, wanghuiqiang(a)huawei.com > > > > Hi Heyi, Chenhui, > > Apologies for slow reaction time. > > OK, this makes sense. > Can you update this patch and: > 1) Add the statement > "Resolves incompatibility introduced by 0df0c147"? > to the commit message. > 2) Add the Contributed-under: tag > 3) Ensure that a Signed-off-by: from the patch Author is > present. (I don't really care if you do that by changing > the Author such that the patch contains a From: tag or > by adding Signed-off-by: from both of you.) > > Regards, > > Leif > > On Wed, Feb 15, 2017 at 08:52:22AM +0800, Heyi Guo wrote: > > Hi Leif, > > > > Yes, the FVMAIN_SEC.fv need to be rebuilt after enlarging FVMAIN_COMPACT. > > > > Regards > > > > 在 2017/2/13 22:03, Leif Lindholm 写道: > > >Are you saying that this resolves a bug introduced by 0df0c147? > > > > > >Regards, > > > > > >Leif > > > > > >On Mon, Feb 13, 2017 at 04:48:51PM +0800, Heyi Guo wrote: > > >>Hi Leif, > > >> > > >>Could you help to review this patch? > > >> > > >>The FVMAIN_SEC.fv also could be found in my branch: hisi-wip-08, thanks. > > >> > > >> > > >>Regards, > > >> > > >>Heyi > > >> > > >>在 2017/2/13 16:37, Chenhui Sun 写道: > > >>>From: Heyi Guo<heyi.guo(a)linaro.org> > > >>> > > >>>We need to rebuild FVMAIN_SEC.fv after enlarging FVMAIN_COMPACT, > > >>>because the fv size and trustfirmware located base address changed. > > >>> > > >>>Signed-off-by: Chenhui Sun<sunchenhui(a)huawei.com> > > >>>--- > > >>> Platforms/Hisilicon/Binary/D02/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes > > >>> 1 file changed, 0 insertions(+), 0 deletions(-) > > >>> > > >>>diff --git a/Platforms/Hisilicon/Binary/D02/Sec/FVMAIN_SEC.Fv b/Platforms/Hisilicon/Binary/D02/Sec/FVMAIN_SEC.Fv > > >>>index bac8767..49b61aa 100644 > > >>>Binary files a/Platforms/Hisilicon/Binary/D02/Sec/FVMAIN_SEC.Fv and b/Platforms/Hisilicon/Binary/D02/Sec/FVMAIN_SEC.Fv differ > >

7 years, 9 months

[PATCH 1/1] Platforms/Marvell: Add resolution for UefiBootManagerLib

by Marcin Wojtas

Recent changes to ShellPkg require a resolution for UefiBootManagerLib. Resolve the dependencies and increase FV size to accommodate new additions. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Marcin Wojtas <mw(a)semihalf.com> --- Platforms/Marvell/Armada/Armada.dsc.inc | 3 +++ Platforms/Marvell/Armada/Armada70x0.fdf | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/Platforms/Marvell/Armada/Armada.dsc.inc b/Platforms/Marvell/Armada/Armada.dsc.inc index da48ea6..85abb81 100644 --- a/Platforms/Marvell/Armada/Armada.dsc.inc +++ b/Platforms/Marvell/Armada/Armada.dsc.inc @@ -59,10 +59,13 @@ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf diff --git a/Platforms/Marvell/Armada/Armada70x0.fdf b/Platforms/Marvell/Armada/Armada70x0.fdf index 10ad9f9..280b40b 100644 --- a/Platforms/Marvell/Armada/Armada70x0.fdf +++ b/Platforms/Marvell/Armada/Armada70x0.fdf @@ -49,7 +49,7 @@ NumBlocks = 0x400 # ################################################################################ -0x00000000|0x000E6000 +0x00000000|0x00100000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV = FVMAIN_COMPACT -- 1.8.3.1

7 years, 9 months

[PATCH v2 0/4] AMD/Styx: enable strict memory permissions

by Ard Biesheuvel

This cleans up some dodgy code in the SMBIOS driver, after which it is possible to enable the shiny new memory protection controls. Changes since v1: - enable on Cello as well as Overdrive, I will leave it up to Alan whether this gets enabled on the Overdrive 1000 as well - simplify patch #1 Note that the prerequisite EDK2 changes have now been merged. Ard Biesheuvel (4): Platforms/AMD/Styx/PlatformSmbiosDxe: don't write to string literals Platforms/AMD/Styx: constify/staticize all local functions and variables Platforms/AMD/Overdrive: enable strict memory permission policy Platforms/AMD/Cello: enable strict memory permission policy Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 16 ++++ Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 79 +++++++++++--------- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 16 ++++ 3 files changed, 74 insertions(+), 37 deletions(-) -- 2.7.4

7 years, 9 months

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