CoreSight

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2515 discussions

[PATCH v1] perf cs-etm: Pass -1 as pid value for machine__set_current_tid()

by Leo Yan

Currently, cs-etm passes the tid value for both tid and pid parameters when calling machine__set_current_tid(), this can lead to confusion for thread handling. E.g. we arbitrarily pass the same value for pid and tid, perf tool will be misled to consider it is a main thread (see thread__main_thread()). On the other hand, Perf tool only can retrieve tid from Arm CoreSight context packet, and we have no chance to know pid (it maps to kernel's task_struct::tgid) from hardware tracing data. For this reason, this patch passes -1 as pid for function machine__set_current_tid(). Signed-off-by: Leo Yan <leo.yan(a)linaro.org> --- tools/perf/util/cs-etm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index f323adb1af85..eed1a5930072 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -1118,7 +1118,7 @@ int cs_etm__etmq_set_tid(struct cs_etm_queue *etmq, if (cs_etm__get_cpu(trace_chan_id, &cpu) < 0) return err; - err = machine__set_current_tid(etm->machine, cpu, tid, tid); + err = machine__set_current_tid(etm->machine, cpu, -1, tid); if (err) return err; -- 2.25.1

3 years, 11 months

[PATCH] Documentation: coresight: Fix documentation issue

by Mike Leach

Fix the description of the directories and attributes used in cs_etm as used by perf. Drop the references to the 'configurations' sub-directory which had been removed in an earlier version of the patchset. Fixes: f71cd93d5ea4 ("Documentation: coresight: Add documentation for CoreSight config") Reported-by: German Gomex <german.gomez(a)arm.com> Signed-off-by: Mike Leach <mike.leach(a)linaro.org> --- .../trace/coresight/coresight-config.rst | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/Documentation/trace/coresight/coresight-config.rst b/Documentation/trace/coresight/coresight-config.rst index a4e3ef295240..6ed13398ca2c 100644 --- a/Documentation/trace/coresight/coresight-config.rst +++ b/Documentation/trace/coresight/coresight-config.rst @@ -211,19 +211,13 @@ also declared in the perf 'cs_etm' event infrastructure so that they can be selected when running trace under perf:: $ ls /sys/devices/cs_etm - configurations format perf_event_mux_interval_ms sinks type - events nr_addr_filters power + cpu0 cpu2 events nr_addr_filters power subsystem uevent + cpu1 cpu3 format perf_event_mux_interval_ms sinks type -Key directories here are 'configurations' - which lists the loaded -configurations, and 'events' - a generic perf directory which allows -selection on the perf command line.:: +The key directory here is 'events' - a generic perf directory which allows +selection on the perf command line. As with the sinks entries, this provides +a hash of the configuration name. - $ ls configurations/ - autofdo - $ cat configurations/autofdo - 0xa7c3dddd - -As with the sinks entries, this provides a hash of the configuration name. The entry in the 'events' directory uses perfs built in syntax generator to substitute the syntax for the name when evaluating the command:: -- 2.17.1

3 years, 11 months

Re: [PATCH 01/10] coresight: add support to enable more coresight paths

by Mathieu Poirier

On Mon, Nov 22, 2021 at 11:12:03PM +0800, Jinlong Mao wrote: > Hi Mathieu, > > Thanks for the comments. > > I double checked the code. Please see my comments below. > > > On 10/29/2021 2:06 AM, Mathieu Poirier wrote: > > On Thu, Oct 21, 2021 at 03:38:47PM +0800, Tao Zhang wrote: > > > Current coresight implementation only supports enabling source > > > ETMs or STM. This patch adds support to enable more kinds of > > > coresight source to sink paths. We build a path from source to > > > sink when any source is enabled and store it in a list. When the > > > source is disabled, we fetch the corresponding path from the list > > > and decrement the refcount on each device in the path. The device > > > is disabled if the refcount reaches zero. Don't store path to > > > coresight data structure of source to avoid unnecessary change to > > > ABI. > > > Since some targets may have coresight sources other than STM and > > > ETMs, we need to add this change to support these coresight > > > devices. > > > > > > Signed-off-by: Tingwei Zhang <tingwei(a)codeaurora.org> > > > Signed-off-by: Tao Zhang <quic_taozha(a)quicinc.com> > > > --- > > > drivers/hwtracing/coresight/coresight-core.c | 100 +++++++++++-------- > > > 1 file changed, 56 insertions(+), 44 deletions(-) > > > > > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > > > index 8a18c71df37a..1e621d61307a 100644 > > > --- a/drivers/hwtracing/coresight/coresight-core.c > > > +++ b/drivers/hwtracing/coresight/coresight-core.c > > > @@ -37,18 +37,16 @@ struct coresight_node { > > > }; > > > /* > > > - * When operating Coresight drivers from the sysFS interface, only a single > > > - * path can exist from a tracer (associated to a CPU) to a sink. > > > + * struct coresight_path - path from source to sink > > > + * @path: Address of path list. > > > + * @link: hook to the list. > > > */ > > > -static DEFINE_PER_CPU(struct list_head *, tracer_path); > > > +struct coresight_path { > > > + struct list_head *path; > > > + struct list_head link; > > > +}; > > For sources associated with a CPU, like ETMs, having a per-cpu way of storing > > paths is a definite advantage and should be kept that way. > > Hi Mathieu, > > Could you please share what is the advantage to handle the sources > associated with a CPU separatly ? > It is a question of efficiency. There is no point iterating through all the sources if we don't have to. > From the code, cpu id is only used to get the path of the ETM source. > > As there will be many tpdm sources, I think it will be easier to only > maintain one list for all the sources. > So many TPDM and many ETMs... That is definitely a reason to do better than a sequential search. > > > -/* > > > - * As of this writing only a single STM can be found in CS topologies. Since > > > - * there is no way to know if we'll ever see more and what kind of > > > - * configuration they will enact, for the time being only define a single path > > > - * for STM. > > > - */ > > > -static struct list_head *stm_path; > > > +static LIST_HEAD(cs_active_paths); > > Then there are sources that aren't associated with a CPU like STMs and TPDMs. > > Perhaps using an IDR or the hash of the device name as a key to a hashing > > vector would be better than doing a sequential search, especially as the > > list of devices is bound to increase over time. > > Agree with you. I will try to use IDR or the hash of the device name as a > key to a hashing vector. > If an IDR (or some other kind of mechanism) is used then we can use that to store paths associated with ETMs as well. That way everything works the same way and access time is constant for any kind of source. > > > > > /* > > > * When losing synchronisation a new barrier packet needs to be inserted at the > > > @@ -354,6 +352,7 @@ static void coresight_disable_sink(struct coresight_device *csdev) > > > if (ret) > > > return; > > > coresight_control_assoc_ectdev(csdev, false); > > > + csdev->activated = false; > > I don't see why this is needed and without proper documentation there is no way > > for me to guess the logic behind the change. The ->activated flag should be > > manipulated from the command line interface only. > > When source is disabled, but sink is still actived. It will be confused for > end users. > That is how it has been working for years now. It was done this way to give as much flexibility to users and keep kernel intelligence to a minimum. > > > > > csdev->enable = false; > > > } > > > @@ -590,6 +589,20 @@ int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) > > > goto out; > > > } > > > +static struct coresight_device *coresight_get_source(struct list_head *path) > > > +{ > > > + struct coresight_device *csdev; > > > + > > > + if (!path) > > > + return NULL; > > > + > > > + csdev = list_first_entry(path, struct coresight_node, link)->csdev; > > > + if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE) > > > + return NULL; > > > + > > > + return csdev; > > > +} > > > + > > > struct coresight_device *coresight_get_sink(struct list_head *path) > > > { > > > struct coresight_device *csdev; > > > @@ -1086,9 +1099,23 @@ static int coresight_validate_source(struct coresight_device *csdev, > > > return 0; > > > } > > > +static int coresight_store_path(struct list_head *path) > > > +{ > > > + struct coresight_path *node; > > > + > > > + node = kzalloc(sizeof(struct coresight_path), GFP_KERNEL); > > > + if (!node) > > > + return -ENOMEM; > > > + > > > + node->path = path; > > > + list_add(&node->link, &cs_active_paths); > > > + > > > + return 0; > > > +} > > > + > > > int coresight_enable(struct coresight_device *csdev) > > > { > > > - int cpu, ret = 0; > > > + int ret = 0; > > > struct coresight_device *sink; > > > struct list_head *path; > > > enum coresight_dev_subtype_source subtype; > > > @@ -1133,25 +1160,9 @@ int coresight_enable(struct coresight_device *csdev) > > > if (ret) > > > goto err_source; > > > - switch (subtype) { > > > - case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: > > > - /* > > > - * When working from sysFS it is important to keep track > > > - * of the paths that were created so that they can be > > > - * undone in 'coresight_disable()'. Since there can only > > > - * be a single session per tracer (when working from sysFS) > > > - * a per-cpu variable will do just fine. > > > - */ > > > - cpu = source_ops(csdev)->cpu_id(csdev); > > > - per_cpu(tracer_path, cpu) = path; > > > - break; > > > - case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: > > > - stm_path = path; > > > - break; > > > - default: > > > - /* We can't be here */ > > > - break; > > > - } > > > + ret = coresight_store_path(path); > > > + if (ret) > > > + goto err_source; > > > out: > > > mutex_unlock(&coresight_mutex); > > > @@ -1168,8 +1179,11 @@ EXPORT_SYMBOL_GPL(coresight_enable); > > > void coresight_disable(struct coresight_device *csdev) > > > { > > > - int cpu, ret; > > > + int ret; > > > struct list_head *path = NULL; > > > + struct coresight_path *cspath = NULL; > > > + struct coresight_path *cspath_next = NULL; > > > + struct coresight_device *src_csdev = NULL; > > > mutex_lock(&coresight_mutex); > > > @@ -1180,20 +1194,18 @@ void coresight_disable(struct coresight_device *csdev) > > > if (!csdev->enable || !coresight_disable_source(csdev)) > > > goto out; > > > - switch (csdev->subtype.source_subtype) { > > > - case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: > > > - cpu = source_ops(csdev)->cpu_id(csdev); > > > - path = per_cpu(tracer_path, cpu); > > > - per_cpu(tracer_path, cpu) = NULL; > > > - break; > > > - case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: > > > - path = stm_path; > > > - stm_path = NULL; > > > - break; > > > - default: > > > - /* We can't be here */ > > > - break; > > > + list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, link) { > > > + src_csdev = coresight_get_source(cspath->path); > > > + if (!src_csdev) > > > + continue; > > > + if (src_csdev == csdev) { > > > + path = cspath->path; > > > + list_del(&cspath->link); > > > + kfree(cspath); > > See my comment above - I agree that sources _not_ associated with a CPU should > > be handled differently. CPU bound sources should be kept untouched. > > > > That is all the time I had for today, I will continue tomorrow. > > > > Thanks, > > Mathieu > > > > > + } > > > } > > > + if (path == NULL) > > > + goto out; > > > coresight_disable_path(path); > > > coresight_release_path(path); > > > -- > > > 2.17.1 > > >

3 years, 11 months

[PATCH v2] drivers/coresight: ultrasoc: Add System Memory Buffer driver

by Qi Liu

This patch adds driver for Ultrasoc SMB(System Memory Buffer) device. SMB provides a way to buffer messages from ETM, and store these CPU instructions in system memory. SMB is developed by Ultrasoc technology, which is acquired by Siemens, and we still use "Ultrasoc" to name driver. Signed-off-by: Qi Liu <liuqi115(a)huawei.com> Tested-by: JunHao He <hejunhao2(a)hisilicon.com> --- Change since RFC: - Move ultrasoc driver to drivers/hwtracing/coresight. - Remove ultrasoc-axi-com.c, as AXI-COM doesn't need to be configured in basic tracing function. - Remove ultrasoc.c as SMB does not need to register with the ultrasoc core. - Address the comments from Mathieu and Suzuki. - Link: https://lists.linaro.org/pipermail/coresight/2021-June/006535.html Change since v1: - Drop the document of Ultrasoc according to Mathieu's comment. - Add comments to explain some private hardware settings. - Address the comments from Mathieu. - Link: https://lists.linaro.org/pipermail/coresight/2021-August/006842.html drivers/hwtracing/coresight/Kconfig | 3 + drivers/hwtracing/coresight/Makefile | 2 + drivers/hwtracing/coresight/ultrasoc/Kconfig | 12 + drivers/hwtracing/coresight/ultrasoc/Makefile | 6 + .../coresight/ultrasoc/ultrasoc-smb.c | 610 ++++++++++++++++++ .../coresight/ultrasoc/ultrasoc-smb.h | 116 ++++ 6 files changed, 749 insertions(+) create mode 100644 drivers/hwtracing/coresight/ultrasoc/Kconfig create mode 100644 drivers/hwtracing/coresight/ultrasoc/Makefile create mode 100644 drivers/hwtracing/coresight/ultrasoc/ultrasoc-smb.c create mode 100644 drivers/hwtracing/coresight/ultrasoc/ultrasoc-smb.h diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index 514a9b8086e3..603430664729 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -201,4 +201,7 @@ config CORESIGHT_TRBE To compile this driver as a module, choose M here: the module will be called coresight-trbe. + +source "drivers/hwtracing/coresight/ultrasoc/Kconfig" + endif diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile index b6c4a48140ec..50491d57c500 100644 --- a/drivers/hwtracing/coresight/Makefile +++ b/drivers/hwtracing/coresight/Makefile @@ -27,3 +27,5 @@ obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ coresight-cti-sysfs.o + +obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc/ diff --git a/drivers/hwtracing/coresight/ultrasoc/Kconfig b/drivers/hwtracing/coresight/ultrasoc/Kconfig new file mode 100644 index 000000000000..c18c25bf9df3 --- /dev/null +++ b/drivers/hwtracing/coresight/ultrasoc/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: MIT +# +# ultrasoc configuration +# +config ULTRASOC_SMB + tristate "Ultrasoc system memory buffer drivers" + depends on ARM64 && CORESIGHT + help + This enables support for the Ultrasoc system memory buffer + driver that is responsible for receiving the trace data from + Coresight ETM devices and storing them to a system buffer + respectively. diff --git a/drivers/hwtracing/coresight/ultrasoc/Makefile b/drivers/hwtracing/coresight/ultrasoc/Makefile new file mode 100644 index 000000000000..8469be50fc6a --- /dev/null +++ b/drivers/hwtracing/coresight/ultrasoc/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for ultrasoc drivers. +# + +obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o diff --git a/drivers/hwtracing/coresight/ultrasoc/ultrasoc-smb.c b/drivers/hwtracing/coresight/ultrasoc/ultrasoc-smb.c new file mode 100644 index 000000000000..f8a4ae705293 --- /dev/null +++ b/drivers/hwtracing/coresight/ultrasoc/ultrasoc-smb.c @@ -0,0 +1,610 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright (C) 2021 HiSilicon Limited. + * + * Code herein communicates with and accesses proprietary hardware which is + * licensed intellectual property (IP) belonging to Siemens Digital Industries + * Software Ltd. + * + * Siemens Digital Industries Software Ltd. asserts and reserves all rights to + * their intellectual property. This paragraph may not be removed or modified + * in any way without permission from Siemens Digital Industries Software Ltd. + */ + +#include <linux/acpi.h> +#include <linux/circ_buf.h> +#include <linux/err.h> +#include <linux/module.h> +#include <linux/mod_devicetable.h> +#include <linux/platform_device.h> + +#include "ultrasoc-smb.h" + +DEFINE_CORESIGHT_DEVLIST(sink_devs, "sink_smb"); + +static bool smb_buffer_is_empty(struct smb_drv_data *drvdata) +{ + u32 buf_status = readl(drvdata->base + SMB_LB_INT_STS); + + return buf_status & BIT(0) ? false : true; +} + +static bool smb_buffer_cmp_pointer(struct smb_drv_data *drvdata) +{ + u32 wr_offset, rd_offset; + + wr_offset = readl(drvdata->base + SMB_LB_WR_ADDR); + rd_offset = readl(drvdata->base + SMB_LB_RD_ADDR); + return wr_offset == rd_offset; +} + +static void smb_reset_buffer_status(struct smb_drv_data *drvdata) +{ + writel(0xf, drvdata->base + SMB_LB_INT_STS); +} + +/* Purge data remaining in hardware path to SMB. */ +static void smb_purge_data(struct smb_drv_data *drvdata) +{ + writel(0x1, drvdata->base + SMB_LB_PURGE); +} + +static void smb_update_data_size(struct smb_drv_data *drvdata) +{ + struct smb_data_buffer *sdb = &drvdata->sdb; + u32 write_offset; + + smb_purge_data(drvdata); + if (smb_buffer_cmp_pointer(drvdata)) { + if (smb_buffer_is_empty(drvdata)) + sdb->data_size = 0; + else + sdb->data_size = sdb->buf_size; + return; + } + + write_offset = readl(drvdata->base + SMB_LB_WR_ADDR) - sdb->start_addr; + sdb->data_size = CIRC_CNT(write_offset, sdb->rd_offset, sdb->buf_size); +} + +static int smb_open(struct inode *inode, struct file *file) +{ + struct smb_drv_data *drvdata = container_of(file->private_data, + struct smb_drv_data, miscdev); + + if (local_cmpxchg(&drvdata->reading, 0, 1)) + return -EBUSY; + + return 0; +} + +static ssize_t smb_read(struct file *file, char __user *data, size_t len, loff_t *ppos) +{ + struct smb_drv_data *drvdata = container_of(file->private_data, + struct smb_drv_data, miscdev); + struct smb_data_buffer *sdb = &drvdata->sdb; + struct device *dev = &drvdata->csdev->dev; + unsigned long flags; + int to_copy = 0; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + if (!sdb->data_size) { + smb_update_data_size(drvdata); + if (!sdb->data_size) + goto out; + } + + if (atomic_read(drvdata->csdev->refcnt)) { + to_copy = -EBUSY; + goto out; + } + + to_copy = min(sdb->data_size, len); + + /* Copy parts of trace data when the read pointer will wrap around SMB buffer. */ + if (sdb->rd_offset + to_copy > sdb->buf_size) + to_copy = sdb->buf_size - sdb->rd_offset; + + if (copy_to_user(data, (void *)sdb->buf_base + sdb->rd_offset, to_copy)) { + dev_dbg(dev, "Failed to copy data to user.\n"); + to_copy = -EFAULT; + goto out; + } + + *ppos += to_copy; + sdb->data_size -= to_copy; + sdb->rd_offset += to_copy; + sdb->rd_offset %= sdb->buf_size; + writel(sdb->start_addr + sdb->rd_offset, drvdata->base + SMB_LB_RD_ADDR); + dev_dbg(dev, "%d bytes copied.\n", to_copy); +out: + if (!sdb->data_size) + smb_reset_buffer_status(drvdata); + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return to_copy; +} + +static int smb_release(struct inode *inode, struct file *file) +{ + struct smb_drv_data *drvdata = container_of(file->private_data, + struct smb_drv_data, miscdev); + local_set(&drvdata->reading, 0); + return 0; +} + +static const struct file_operations smb_fops = { + .owner = THIS_MODULE, + .open = smb_open, + .read = smb_read, + .release = smb_release, + .llseek = no_llseek, +}; + +smb_simple_func(struct smb_drv_data, read_pos, SMB_LB_RD_ADDR); +smb_simple_func(struct smb_drv_data, write_pos, SMB_LB_WR_ADDR); +smb_simple_func(struct smb_drv_data, buf_status, SMB_LB_INT_STS); + +static ssize_t buf_size_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(dev->parent); + + return sysfs_emit(buf, "0x%lx\n", drvdata->sdb.buf_size); +} +static DEVICE_ATTR_RO(buf_size); + +static struct attribute *smb_sink_attrs[] = { + &dev_attr_read_pos.attr, + &dev_attr_write_pos.attr, + &dev_attr_buf_status.attr, + &dev_attr_buf_size.attr, + NULL, +}; + +static const struct attribute_group smb_sink_group = { + .attrs = smb_sink_attrs, + .name = "status", +}; + +static const struct attribute_group *smb_sink_groups[] = { + &smb_sink_group, + NULL, +}; + +static int smb_set_perf_buffer(struct perf_output_handle *handle) +{ + struct cs_buffers *buf = etm_perf_sink_config(handle); + u32 head; + + if (!buf) + return -EINVAL; + + /* Wrap head around to the amount of space we have */ + head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1); + + /* Find the page to write to and offset within that page */ + buf->cur = head / PAGE_SIZE; + buf->offset = head % PAGE_SIZE; + + local_set(&buf->data_size, 0); + + return 0; +} + +static void smb_enable_hw(struct smb_drv_data *drvdata) +{ + writel(0x1, drvdata->base + SMB_GLOBAL_EN); +} + +static void smb_disable_hw(struct smb_drv_data *drvdata) +{ + writel(0x0, drvdata->base + SMB_GLOBAL_EN); +} + +static int smb_enable_sysfs(struct smb_drv_data *drvdata) +{ + if (drvdata->mode == CS_MODE_PERF) + return -EBUSY; + + if (drvdata->mode == CS_MODE_SYSFS) + return 0; + + smb_enable_hw(drvdata); + drvdata->mode = CS_MODE_SYSFS; + return 0; +} + +static int smb_enable_perf(struct smb_drv_data *drvdata, void *data) +{ + struct device *dev = &drvdata->csdev->dev; + struct perf_output_handle *handle = data; + pid_t pid; + + if (drvdata->mode == CS_MODE_SYSFS) { + dev_err(dev, "Device is already in used by sysfs.\n"); + return -EBUSY; + } + + /* Get a handle on the pid of the target process*/ + pid = task_pid_nr(handle->event->owner); + if (drvdata->pid != -1 && drvdata->pid != pid) { + dev_err(dev, "Device is already in used by other session.\n"); + return -EBUSY; + } + /* The sink is already enabled by this session. */ + if (drvdata->pid == pid) + return 0; + + if (smb_set_perf_buffer(handle)) + return -EINVAL; + + smb_enable_hw(drvdata); + drvdata->pid = pid; + drvdata->mode = CS_MODE_PERF; + + return 0; +} + +static int smb_enable(struct coresight_device *csdev, u32 mode, void *data) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); + unsigned long flags; + int ret = -EINVAL; + + /* Do nothing if trace data is reading by other interface now. */ + if (local_read(&drvdata->reading)) + return -EBUSY; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + if (mode == CS_MODE_SYSFS) + ret = smb_enable_sysfs(drvdata); + + if (mode == CS_MODE_PERF) + ret = smb_enable_perf(drvdata, data); + + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + if (ret) + return ret; + + atomic_inc(csdev->refcnt); + dev_dbg(&csdev->dev, "Ultrasoc SMB enabled.\n"); + + return 0; +} + +static int smb_disable(struct coresight_device *csdev) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); + unsigned long flags; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + if (atomic_dec_return(csdev->refcnt)) { + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return -EBUSY; + } + + WARN_ON_ONCE(drvdata->mode == CS_MODE_DISABLED); + smb_disable_hw(drvdata); + + /* + * Data remaining in hardware path will be sent to SMB after purge, so needs to + * synchronize the read pointer to write pointer in perf mode. + */ + smb_purge_data(drvdata); + if (drvdata->mode == CS_MODE_PERF) + writel(readl(drvdata->base + SMB_LB_WR_ADDR), + drvdata->base + SMB_LB_RD_ADDR); + + /* Dissociate from the target process. */ + drvdata->pid = -1; + drvdata->mode = CS_MODE_DISABLED; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + dev_dbg(&csdev->dev, "Ultrasoc SMB disabled.\n"); + return 0; +} + +static void *smb_alloc_buffer(struct coresight_device *csdev, + struct perf_event *event, void **pages, + int nr_pages, bool overwrite) +{ + struct cs_buffers *buf; + int node; + + node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu); + buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node); + if (!buf) + return NULL; + + buf->snapshot = overwrite; + buf->nr_pages = nr_pages; + buf->data_pages = pages; + + return buf; +} + +static void smb_free_buffer(void *config) +{ + struct cs_buffers *buf = config; + + kfree(buf); +} + +static void smb_sync_perf_buffer(struct smb_drv_data *drvdata, + struct cs_buffers *buf, unsigned long data_size) +{ + struct smb_data_buffer *sdb = &drvdata->sdb; + char **dst_pages = (char **)buf->data_pages; + unsigned long buf_offset = buf->offset; + unsigned int cur = buf->cur; + unsigned long to_copy; + + while (data_size) { + /* Copy parts of trace data when the read pointer will wrap around SMB buffer. */ + if (sdb->rd_offset + PAGE_SIZE - buf_offset > sdb->buf_size) + to_copy = sdb->buf_size - sdb->rd_offset; + else + to_copy = min(data_size, PAGE_SIZE - buf_offset); + + memcpy_fromio(dst_pages[cur] + buf_offset, sdb->buf_base + sdb->rd_offset, to_copy); + + buf_offset += to_copy; + if (buf_offset >= PAGE_SIZE) { + buf_offset = 0; + cur++; + cur %= buf->nr_pages; + } + data_size -= to_copy; + /* ensure memcpy finished before update the read pointer */ + sdb->rd_offset += to_copy; + sdb->rd_offset %= sdb->buf_size; + } + + sdb->data_size = 0; + writel(sdb->start_addr + sdb->rd_offset, drvdata->base + SMB_LB_RD_ADDR); + smb_reset_buffer_status(drvdata); +} + +static unsigned long smb_update_buffer(struct coresight_device *csdev, + struct perf_output_handle *handle, + void *sink_config) +{ + struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); + struct smb_data_buffer *sdb = &drvdata->sdb; + struct cs_buffers *buf = sink_config; + unsigned long data_size = 0; + unsigned long flags; + bool lost = false; + + if (!buf) + return 0; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + /* Don't do anything if another tracer is using this sink. */ + if (atomic_read(csdev->refcnt) != 1) + goto out; + + smb_update_data_size(drvdata); + data_size = sdb->data_size; + if (data_size > handle->size) { + sdb->rd_offset += data_size - handle->size; + sdb->rd_offset %= sdb->buf_size; + data_size = handle->size; + lost = true; + } + + smb_sync_perf_buffer(drvdata, buf, data_size); + if (!buf->snapshot && lost) + perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); + +out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return data_size; +} + +static const struct coresight_ops_sink smb_cs_ops = { + .enable = smb_enable, + .disable = smb_disable, + .alloc_buffer = smb_alloc_buffer, + .free_buffer = smb_free_buffer, + .update_buffer = smb_update_buffer, +}; + +static const struct coresight_ops cs_ops = { + .sink_ops = &smb_cs_ops, +}; + +static int smb_init_data_buffer(struct platform_device *pdev, struct smb_data_buffer *sdb) +{ + struct resource *res; + void __iomem *base; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (IS_ERR(res)) { + dev_err(&pdev->dev, "SMB device without data buffer.\n"); + return -EINVAL; + } + + sdb->start_addr = res->start & SMB_BASE_LOW_MASK; + sdb->buf_size = resource_size(res); + if (sdb->buf_size == 0) + return -EINVAL; + + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + sdb->buf_base = base; + + return 0; +} + +static void smb_init_hw(struct smb_drv_data *drvdata) +{ + u32 value; + + /* First disable smb and clear the status of SMB buffer */ + smb_reset_buffer_status(drvdata); + smb_disable_hw(drvdata); + smb_purge_data(drvdata); + + /* Using smb in single-end mode, and set other configures default */ + value = SMB_BUF_CFG_STREAMING | SMB_BUF_SINGLE_END | SMB_BUF_EN; + writel(value, drvdata->base + SMB_LB_CFG_LO); + value = SMB_MSG_FILTER(0x0, 0xff); + writel(value, drvdata->base + SMB_LB_CFG_HI); + + writel(SMB_GLOBAL_CFG, drvdata->base + SMB_CFG_REG); + writel(SMB_GLB_INT_CFG, drvdata->base + SMB_GLOBAL_INT); + writel(SMB_BUF_INT_CFG, drvdata->base + SMB_LB_INT_CTRL); +} + +static int smb_register_sink(struct platform_device *pdev, + struct smb_drv_data *drvdata) +{ + struct coresight_platform_data *pdata = NULL; + struct coresight_desc desc = { 0 }; + int ret; + + pdata = coresight_get_platform_data(&pdev->dev); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + + desc.type = CORESIGHT_DEV_TYPE_SINK; + desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; + desc.ops = &cs_ops; + desc.pdata = pdata; + desc.dev = &pdev->dev; + desc.groups = smb_sink_groups; + desc.name = coresight_alloc_device_name(&sink_devs, &pdev->dev); + if (!desc.name) { + dev_err(&pdev->dev, "Failed to alloc coresight device name."); + return -ENOMEM; + } + + drvdata->csdev = coresight_register(&desc); + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); + + drvdata->miscdev.name = desc.name; + drvdata->miscdev.minor = MISC_DYNAMIC_MINOR; + drvdata->miscdev.fops = &smb_fops; + ret = misc_register(&drvdata->miscdev); + if (ret) { + coresight_unregister(drvdata->csdev); + dev_err(&pdev->dev, "Failed to register misc, ret=%d.\n", ret); + } + + return ret; +} + +static void smb_unregister_sink(struct smb_drv_data *drvdata) +{ + misc_deregister(&drvdata->miscdev); + coresight_unregister(drvdata->csdev); +} + +/* + * Send ultrasoc messge to control hardwares on the tracing path, + * using DSM calls to avoid exposing ultrasoc message format. + */ +static int smb_config_inport(struct device *dev, bool enable) +{ + u32 flag = enable ? 1 : 0; + union acpi_object *obj; + guid_t guid; + + if (guid_parse("82ae1283-7f6a-4cbe-aa06-53e8fb24db18", &guid)) { + dev_err(dev, "Get GUID failed.\n"); + return -EINVAL; + } + + obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &guid, 0, flag, NULL); + if (!obj) + dev_err(dev, "ACPI handle failed!\n"); + + ACPI_FREE(obj); + + return 0; +} + +static int smb_probe(struct platform_device *pdev) +{ + struct smb_drv_data *drvdata; + int ret; + + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(drvdata->base)) { + dev_err(&pdev->dev, "Failed to ioremap resource.\n"); + return PTR_ERR(drvdata->base); + } + + ret = smb_init_data_buffer(pdev, &drvdata->sdb); + if (ret) { + dev_err(&pdev->dev, "Failed to init buffer, ret = %d.\n", ret); + return ret; + } + + smb_init_hw(drvdata); + spin_lock_init(&drvdata->spinlock); + drvdata->pid = -1; + + ret = smb_register_sink(pdev, drvdata); + if (ret) { + dev_err(&pdev->dev, "Failed to register smb sink.\n"); + return ret; + } + + ret = smb_config_inport(&pdev->dev, true); + if (ret) { + smb_unregister_sink(drvdata); + return ret; + } + + platform_set_drvdata(pdev, drvdata); + return 0; +} + +static int smb_remove(struct platform_device *pdev) +{ + struct smb_drv_data *drvdata = platform_get_drvdata(pdev); + int ret; + + ret = smb_config_inport(&pdev->dev, false); + if (ret) + return ret; + + smb_unregister_sink(drvdata); + return 0; +} + +static const struct acpi_device_id ultrasoc_smb_acpi_match[] = { + {"HISI03A1", 0}, + {}, +}; +MODULE_DEVICE_TABLE(acpi, ultrasoc_smb_acpi_match); + +static struct platform_driver smb_driver = { + .driver = { + .name = "ultrasoc,smb", + .acpi_match_table = ACPI_PTR(ultrasoc_smb_acpi_match), + .suppress_bind_attrs = true, + }, + .probe = smb_probe, + .remove = smb_remove, +}; +module_platform_driver(smb_driver); + +MODULE_DESCRIPTION("Ultrasoc smb driver"); +MODULE_LICENSE("Dual MIT/GPL"); +MODULE_AUTHOR("Jonathan Zhou <jonathan.zhouwen(a)huawei.com>"); +MODULE_AUTHOR("Qi Liu <liuqi115(a)huawei.com>"); diff --git a/drivers/hwtracing/coresight/ultrasoc/ultrasoc-smb.h b/drivers/hwtracing/coresight/ultrasoc/ultrasoc-smb.h new file mode 100644 index 000000000000..01cb846aeedc --- /dev/null +++ b/drivers/hwtracing/coresight/ultrasoc/ultrasoc-smb.h @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright (C) 2021 HiSilicon Limited. + * + * Code herein communicates with and accesses proprietary hardware which is + * licensed intellectual property (IP) belonging to Siemens Digital Industries + * Software Ltd. + * + * Siemens Digital Industries Software Ltd. asserts and reserves all rights to + * their intellectual property. This paragraph may not be removed or modified + * in any way without permission from Siemens Digital Industries Software Ltd. + */ + +#ifndef _ULTRASOC_SMB_H +#define _ULTRASOC_SMB_H + +#include <linux/coresight.h> +#include <linux/list.h> +#include <linux/miscdevice.h> + +#include "../coresight-etm-perf.h" +#include "../coresight-priv.h" + +/* Offset of SMB logical buffer registers */ +#define SMB_CFG_REG 0X0 +#define SMB_GLOBAL_EN 0X4 +#define SMB_GLOBAL_INT 0X8 +#define SMB_LB_CFG_LO 0X40 +#define SMB_LB_CFG_HI 0X44 +#define SMB_LB_INT_CTRL 0X48 +#define SMB_LB_INT_STS 0X4C +#define SMB_LB_LIMIT 0X58 +#define SMB_LB_RD_ADDR 0X5C +#define SMB_LB_WR_ADDR 0X60 +#define SMB_LB_PURGE 0X64 + +/* Set SMB_CFG_REG register */ +#define SMB_IDLE_PRD(period) (((period - 216) & 0xf) << 12) +#define SMB_MEM_WR(credit, rate) (((credit) << 16) | ((rate) << 18)) +#define SMB_MEM_RD(credit, rate) (((credit) << 22) | ((rate) << 24)) +#define SMB_BURST_LEN(len) ((len - 1) << 4) +#define SMB_GLOBAL_CFG (SMB_IDLE_PRD(231) | SMB_MEM_WR(0x3, 0x0) | \ + SMB_MEM_RD(0x3, 0x6) | SMB_BURST_LEN(16)) + +/* Set SMB_GLOBAL_INT register */ +#define SMB_INT_EN BIT(0) +#define SMB_INT_TYPE_PULSE BIT(1) +#define SMB_INT_POLARITY_HIGH BIT(2) +#define SMB_GLB_INT_CFG (SMB_INT_EN | SMB_INT_TYPE_PULSE | SMB_INT_POLARITY_HIGH) + +/* Set SMB_LB_CFG_LO register */ +#define SMB_BUF_EN BIT(0) +#define SMB_BUF_SINGLE_END BIT(1) +#define SMB_BUF_INIT BIT(8) +#define SMB_BUF_CONTINUOUS BIT(11) +#define SMB_FLOW_MASK GENMASK(19, 16) +#define SMB_BUF_CFG_STREAMING (SMB_BUF_INIT | SMB_BUF_CONTINUOUS | SMB_FLOW_MASK) +#define SMB_BASE_LOW_MASK GENMASK(31, 0) + +/* Set SMB_LB_CFG_HI register */ +#define SMB_MSG_FILTER(lower, upper) ((lower & 0xff) | ((upper & 0xff) << 8)) +#define SMB_BUF_INT_EN BIT(0) +#define SMB_BUF_NOTE_MASK GENMASK(11, 8) +#define SMB_BUF_INT_CFG (SMB_BUF_INT_EN | SMB_BUF_NOTE_MASK) + +/** + * struct smb_data_buffer - Details of the buffer used by SMB + * @buf_base : Memory mapped base address of SMB. + * @start_addr : SMB buffer start Physical address. + * @buf_size : Size of the buffer. + * @data_size : Size of Trace data copy to userspace. + * @rd_offset : Offset of the read pointer in the buffer. + */ +struct smb_data_buffer { + void __iomem *buf_base; + u32 start_addr; + unsigned long buf_size; + unsigned long data_size; + unsigned long rd_offset; +}; + +/** + * struct smb_drv_data - specifics associated to an SMB component + * @base: Memory mapped base address for SMB component. + * @csdev: Component vitals needed by the framework. + * @sdb: Data buffer for SMB. + * @miscdev: Specifics to handle "/dev/xyz.tmc" entry. + * @spinlock: Only one at a time pls. + * @reading: Synchronise user space access to SMB buffer. + * @pid: Process ID of the process being monitored by the session + * that is using this component. + * @mode: how this SMB is being used, perf mode or sysfs mode. + */ +struct smb_drv_data { + void __iomem *base; + struct coresight_device *csdev; + struct smb_data_buffer sdb; + struct miscdevice miscdev; + spinlock_t spinlock; + local_t reading; + pid_t pid; + u32 mode; +}; + +#define smb_simple_func(type, name, offset) \ +static ssize_t name##_show(struct device *_dev, \ + struct device_attribute *attr, char *buf) \ +{ \ + type *drvdata = dev_get_drvdata(_dev->parent); \ + u32 val = readl(drvdata->base + offset); \ + \ + return sysfs_emit(buf, "0x%x\n", val); \ +} \ +static DEVICE_ATTR_RO(name) + +#endif -- 2.33.0

3 years, 11 months

[FYI][PATCH 1/1] tools build: Fix removal of feature-sync-compare-and-swap feature detection

by Arnaldo Carvalho de Melo

The patch removing the feature-sync-compare-and-swap feature detection didn't remove the call to main_test_sync_compare_and_swap(), making the 'test-all' case fail an all the feature tests to be performed individually: $ cat /tmp/build/perf/feature/test-all.make.output In file included from test-all.c:18: test-libpython-version.c:5:10: error: #error 5 | #error | ^~~~~ test-all.c: In function ‘main’: test-all.c:203:9: error: implicit declaration of function ‘main_test_sync_compare_and_swap’ [-Werror=implicit-function-declaration] 203 | main_test_sync_compare_and_swap(argc, argv); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors $ Fix it, now to figure out what is that test-libpython-version.c problem... Fixes: 60fa754b2a5a4e0c ("tools: Remove feature-sync-compare-and-swap feature detection") Cc: Jiri Olsa <jolsa(a)redhat.com> Cc: Leo Yan <leo.yan(a)linaro.org> Cc: Mark Rutland <mark.rutland(a)arm.com> Cc: Mathieu Poirier <mathieu.poirier(a)linaro.org> Cc: Mike Leach <mike.leach(a)linaro.org> Cc: Namhyung Kim <namhyung(a)kernel.org> Signed-off-by: Arnaldo Carvalho de Melo <acme(a)redhat.com> --- tools/build/feature/test-all.c | 1 - 1 file changed, 1 deletion(-) diff --git a/tools/build/feature/test-all.c b/tools/build/feature/test-all.c index 9204395272912c13..0b243ce842be3383 100644 --- a/tools/build/feature/test-all.c +++ b/tools/build/feature/test-all.c @@ -200,7 +200,6 @@ int main(int argc, char *argv[]) main_test_timerfd(); main_test_stackprotector_all(); main_test_libdw_dwarf_unwind(); - main_test_sync_compare_and_swap(argc, argv); main_test_zlib(); main_test_pthread_attr_setaffinity_np(); main_test_pthread_barrier(); -- 2.31.1

3 years, 11 months

[PATCH v2 0/5] coresight: syscfg: dynamic load

by Mike Leach

1) API updated to allow dynamic load and unload of configurations and features. Dependency management between loaded sets is added. 2) New configuration and feature sets can be added using a loadable module. An example in /samples/coresight is provided to demonstrate this. 3) configfs can be used to activate a configuration which will then be used when controlling tracing using sysfs. Applies and tested on coresight/next - which is 5.15-rc1 Changes since v1: a) Original set split to divide related changes into smaller sets. Removed RFC flag. b) Revised config activation for sysfs to simplify common function. (patch 4). c) Minor changes requested by Mathieu added. Mike Leach (5): coresight: syscfg: Update API to allow dynamic load and unload coresight: syscfg: Update load API for config loadable modules coresight: syscfg: Example CoreSight configuration loadable module coresight: configfs: Allow configfs to activate configuration Documentation: coresight: Update coresight configuration docs .../trace/coresight/coresight-config.rst | 19 ++ MAINTAINERS | 1 + .../coresight/coresight-cfg-preload.c | 9 +- .../hwtracing/coresight/coresight-config.h | 9 +- .../coresight/coresight-etm4x-core.c | 11 +- .../coresight/coresight-syscfg-configfs.c | 87 +++++ .../coresight/coresight-syscfg-configfs.h | 4 + .../hwtracing/coresight/coresight-syscfg.c | 315 ++++++++++++++++-- .../hwtracing/coresight/coresight-syscfg.h | 39 ++- samples/Kconfig | 9 + samples/Makefile | 1 + samples/coresight/Makefile | 4 + samples/coresight/coresight-cfg-sample.c | 73 ++++ 13 files changed, 546 insertions(+), 35 deletions(-) create mode 100644 samples/coresight/Makefile create mode 100644 samples/coresight/coresight-cfg-sample.c -- 2.17.1

3 years, 11 months

[PATCH v1 0/4] coresight: etm: Correct (virtual) contextID tracing for namespace

by Leo Yan

If a profiling program runs in a non-root PID namespace, if CoreSight driver enables contextID tracing, it can lead to mismatching issue between the context ID in hardware trace data and the allocated PID in the non-root namespace. CoreSight driver has tried to address this issue for the contextID related interfaces under sysfs, but it misses other parts: it doesn't prevent user to set VMID (virtual contextID) for kernel runs in EL2 with VHE, and furthermore, it misses to handle the perf mode when the profiling tool (e.g. perf) doesn't run in root PID namespace. For this reason, this patch series is to correct contextID tracing for non-root namespace. Patch 01 is to use spinlock to protect reading virtual context ID comparator. Patch 02 corrects the virtual contextID tracing for non-root PID namespace. Patch 03/04 are used to fix the contextID tracing for perf mode. I only verified this patch series on Juno board in the root PID namespace and confirmed the patches don't introduce any regression for root PID namespace. Leo Yan (4): coresight: etm4x: Add lock for reading virtual context ID comparator coresight: etm4x: Don't use virtual contextID for non-root PID namespace coresight: etm4x: Don't trace contextID for non-root namespace in perf mode coresight: etm3x: Don't trace contextID for non-root namespace in perf mode .../coresight/coresight-etm3x-core.c | 4 +++ .../coresight/coresight-etm4x-core.c | 10 +++++-- .../coresight/coresight-etm4x-sysfs.c | 30 +++++++++++++++++++ 3 files changed, 42 insertions(+), 2 deletions(-) -- 2.25.1

3 years, 11 months

Re: [PATCH 05/10] Coresight: Add interface for TPDM BC subunit

by Mathieu Poirier

On Fri, Nov 12, 2021 at 05:10:38PM +0800, Jinlong wrote: > On Fri, Nov 12, 2021 at 04:42:31PM +0800, Jinlong wrote: > > [....] > > > > > > &tpdm_attr_grp, > > > > > + &tpdm_bc_attr_grp, > > > > > > > > It is quite tedious to review all these options at the same time as the core > > > > drivers. I suggest to concentrate on the base functionality for now. When that > > > > is merged we can add configuration options such as these. > > > > > > > > I am out of time for this patchset and as such will not review the remaining > > > > patches - those will have to wait for another iteration. > > > > > > > > Thanks, > > > > Mathieu > > > > > > > > > Thank your for all the comments. > > > We will update the patches. > > > > > > Thanks > > > Jinlong Mao > > > > > > > Correct the typo. > > Hi Mathieu, > > We will reduce the code changes. > There will be code changes below for next version: > > 1. coresight: add support to enable more coresight paths > 2. Basic function for TPDM(only enable/disable functions) > 3. TPDA driver > > Is that ok for you ? Yes, that sounds much better. Regards, Mathieu > > > > > > > > > > > NULL, > > > > > }; > > > > > > > > > > -- > > > > > 2.17.1 > > > > >

3 years, 11 months

Re: [PATCH] perf cs-etm: use swap() to make code cleaner

by Leo Yan

Hi Yihao, On Thu, Nov 11, 2021 at 06:33:44PM -0800, Yihao Han wrote: > Use the macro 'swap()' defined in 'include/linux/minmax.h' to avoid > opencoding it. The header 'include/linux/minmax.h' is used for kernel but it's not provided for user space program? > Signed-off-by: Yihao Han <hanyihao(a)vivo.com> > --- > tools/perf/util/cs-etm.c | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c > index f323adb1af85..aaa3ec725002 100644 > --- a/tools/perf/util/cs-etm.c > +++ b/tools/perf/util/cs-etm.c > @@ -408,17 +408,13 @@ struct cs_etm_packet_queue > static void cs_etm__packet_swap(struct cs_etm_auxtrace *etm, > struct cs_etm_traceid_queue *tidq) > { > - struct cs_etm_packet *tmp; > - > if (etm->sample_branches || etm->synth_opts.last_branch || > etm->sample_instructions) { > /* > * Swap PACKET with PREV_PACKET: PACKET becomes PREV_PACKET for > * the next incoming packet. > */ > - tmp = tidq->packet; > - tidq->packet = tidq->prev_packet; > - tidq->prev_packet = tmp; > + swap(tidq->packet, tidq->prev_packet); NAK - This patch will introduce compilation error: util/cs-etm.c: In function ‘cs_etm__packet_swap’: util/cs-etm.c:417:3: error: implicit declaration of function ‘swap’; did you mean ‘swab’? [-Werror=implicit-function-declaration] swap(tidq->packet, tidq->prev_packet); ^~~~ swab Thanks, Leo > } > } > > -- > 2.17.1 >

3 years, 11 months

Re: [PATCH v2] coresight: Use devm_bitmap_zalloc when applicable

by Mathieu Poirier

Hi Christophe, On Wed, 3 Nov 2021 at 12:39, Christophe JAILLET <christophe.jaillet(a)wanadoo.fr> wrote: > > 'drvdata->chs.guaranteed' is a bitmap. So use 'devm_bitmap_kzalloc()' to > simplify code, improve the semantic and avoid some open-coded arithmetic > in allocator arguments. > > Signed-off-by: Christophe JAILLET <christophe.jaillet(a)wanadoo.fr> > --- > v1 --> v2: remove the 'guaranteed' variable to be even less verbose > --- > drivers/hwtracing/coresight/coresight-stm.c | 10 +++------- > 1 file changed, 3 insertions(+), 7 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c > index 58062a5a8238..bb14a3a8a921 100644 > --- a/drivers/hwtracing/coresight/coresight-stm.c > +++ b/drivers/hwtracing/coresight/coresight-stm.c > @@ -856,13 +856,11 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id) > { > int ret; > void __iomem *base; > - unsigned long *guaranteed; > struct device *dev = &adev->dev; > struct coresight_platform_data *pdata = NULL; > struct stm_drvdata *drvdata; > struct resource *res = &adev->res; > struct resource ch_res; > - size_t bitmap_size; > struct coresight_desc desc = { 0 }; > > desc.name = coresight_alloc_device_name(&stm_devs, dev); > @@ -904,12 +902,10 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id) > else > drvdata->numsp = stm_num_stimulus_port(drvdata); > > - bitmap_size = BITS_TO_LONGS(drvdata->numsp) * sizeof(long); > - > - guaranteed = devm_kzalloc(dev, bitmap_size, GFP_KERNEL); > - if (!guaranteed) > + drvdata->chs.guaranteed = devm_bitmap_zalloc(dev, drvdata->numsp, > + GFP_KERNEL); > + if (!drvdata->chs.guaranteed) > return -ENOMEM; > - drvdata->chs.guaranteed = guaranteed; I will pick up this patch when -rc1 gets released. Thanks, Mathieu > > spin_lock_init(&drvdata->spinlock); > > -- > 2.30.2 >

3 years, 11 months

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