CoreSight

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2095 discussions

[PATCH V2 0/5] coresight: etm4x: Migrate ACPI AMBA devices to platform driver

by Anshuman Khandual

CoreSight ETM4x devices could be accessed either via MMIO (handled via amba_driver) or CPU system instructions (handled via platform driver). But this has the following issues : - Each new CPU comes up with its own PID and thus we need to keep on adding the "known" PIDs to get it working with AMBA driver. While the ETM4 architecture (and CoreSight architecture) defines way to identify a device as ETM4. Thus older kernels won't be able to "discover" a newer CPU, unless we add the PIDs. - With ACPI, the ETM4x devices have the same HID to identify the device irrespective of the mode of access. This creates a problem where two different drivers (both AMBA based driver and platform driver) would hook into the "HID" and could conflict. e.g., if AMBA driver gets hold of a non-MMIO device, the probe fails. If we have single driver hooked into the given "HID", we could handle them seamlessly, irrespective of the mode of access. - CoreSight is heavily dependent on the runtime power management. With ACPI, amba_driver doesn't get us anywhere with handling the power and thus one need to always turn the power ON to use them. Moving to platform driver gives us the power management for free. Due to all of the above, we are moving the MMIO based etm4x devices to be supported via platform driver. The series makes the existing platform driver generic to handle both type of the access modes. Although existing AMBA driver would still continue to support DT based etm4x MMIO devices. The series applies on 6.3-rc4. Changes in V2: - Enables ACPI etm4x device support in the existing platform driver - Dropped last two patches from the series - Dropped redundant 'devarch' checking from is_etm4x_device() - Renamed updated is_etm4x_device() as is_etm4x_devtype() - Fixed arguments in fallback stub for etm4_check_arch_features() - Tagged etm4_dev_pm_ops with etm4_platform_driver - Updated the comment for coresight_get_enable_apb_pclk() helper - Updated the comment for new 'pclk' element in struct etm4_drvdata - Dropped the clock when devm_ioremap_resource() fails - Convert IS_ERR() into a direct pointer check in etm4_remove_platform_dev() - Dropped "arm,coresight-etm4x" compatible property from etm4_match[] Changes in V1: https://lore.kernel.org/all/20230317030501.1811905-1-anshuman.khandual@arm.… Cc: Steve Clevenger <scclevenger(a)os.amperecomputing.com> Cc: Rob Herring <robh+dt(a)kernel.org> Cc: Frank Rowand <frowand.list(a)gmail.com> Cc: Russell King (Oracle) <linux(a)armlinux.org.uk> Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Cc: "Rafael J. Wysocki" <rafael(a)kernel.org> Cc: Len Brown <lenb(a)kernel.org> Cc: Sudeep Holla <sudeep.holla(a)arm.com> Cc: Lorenzo Pieralisi <lpieralisi(a)kernel.org> Cc: Mathieu Poirier <mathieu.poirier(a)linaro.org> Cc: Suzuki K Poulose <suzuki.poulose(a)arm.com> Cc: Mike Leach <mike.leach(a)linaro.org> Cc: Leo Yan <leo.yan(a)linaro.org> Cc: devicetree(a)vger.kernel.org Cc: linux-acpi(a)vger.kernel.org Cc: coresight(a)lists.linaro.org Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-kernel(a)vger.kernel.org Anshuman Khandual (4): coresight: etm4x: Allocate and device assign 'struct etmv4_drvdata' earlier coresight: etm4x: Drop iomem 'base' argument from etm4_probe() coresight: etm4x: Drop pid argument from etm4_probe() coresight: etm4x: Change etm4_platform_driver driver for MMIO devices Suzuki Poulose (1): coresight: etm4x: Add ACPI support in platform driver drivers/acpi/acpi_amba.c | 1 - .../coresight/coresight-etm4x-core.c | 114 ++++++++++++++---- drivers/hwtracing/coresight/coresight-etm4x.h | 4 + include/linux/coresight.h | 59 +++++++++ 4 files changed, 154 insertions(+), 24 deletions(-) -- 2.25.1

1 year, 5 months

[PATCH] coresight: etm4x: fix trctraceid sysfs always invisible

by Junhao He

The trctraceid sysfs interface is current in etm4x mgmt group. Each attr in the mgmt group will call the function is_visible() to check whether the register is implemented. However the trctraceid does not bound to any register. So the trctraceid sysfs will always be invisible. Move it to etmv4 group to fix that. Fixes: df4871204e5d ("coresight: etm4x: Update ETM4 driver to use Trace ID API") Signed-off-by: Junhao He <hejunhao3(a)huawei.com> --- .../coresight/coresight-etm4x-sysfs.c | 42 +++++++++---------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 5e62aa40ecd0..0ea71de0f56b 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -2335,6 +2335,26 @@ static ssize_t ts_source_show(struct device *dev, } static DEVICE_ATTR_RO(ts_source); +/* + * Trace ID allocated dynamically on enable - but also allocate on read + * in case sysfs or perf read before enable to ensure consistent metadata + * information for trace decode + */ +static ssize_t trctraceid_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int trace_id; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + trace_id = etm4_read_alloc_trace_id(drvdata); + if (trace_id < 0) + return trace_id; + + return sysfs_emit(buf, "0x%x\n", trace_id); +} +static DEVICE_ATTR_RO(trctraceid); + static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_nr_pe_cmp.attr, &dev_attr_nr_addr_cmp.attr, @@ -2390,29 +2410,10 @@ static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_vmid_masks.attr, &dev_attr_cpu.attr, &dev_attr_ts_source.attr, + &dev_attr_trctraceid.attr, NULL, }; -/* - * Trace ID allocated dynamically on enable - but also allocate on read - * in case sysfs or perf read before enable to ensure consistent metadata - * information for trace decode - */ -static ssize_t trctraceid_show(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - int trace_id; - struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); - - trace_id = etm4_read_alloc_trace_id(drvdata); - if (trace_id < 0) - return trace_id; - - return sysfs_emit(buf, "0x%x\n", trace_id); -} -static DEVICE_ATTR_RO(trctraceid); - struct etmv4_reg { struct coresight_device *csdev; u32 offset; @@ -2549,7 +2550,6 @@ static struct attribute *coresight_etmv4_mgmt_attrs[] = { coresight_etm4x_reg(trcpidr3, TRCPIDR3), coresight_etm4x_reg(trcoslsr, TRCOSLSR), coresight_etm4x_reg(trcconfig, TRCCONFIGR), - &dev_attr_trctraceid.attr, coresight_etm4x_reg(trcdevarch, TRCDEVARCH), NULL, }; -- 2.33.0

1 year, 6 months

[GIT PULL] coresight: Fixes for v6.4

by Suzuki K Poulose

Hi Greg Please find a couple of fixes for v6.4 for the coresight self-hosted tracing subsystem. Kindly pull. Suzuki The following changes since commit ac9a78681b921877518763ba0e89202254349d1b: Linux 6.4-rc1 (2023-05-07 13:34:35 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-fixes-v6.4 for you to fetch changes up to 04ac7f98b92181179ea84439642493f3826d04a2: coresight: perf: Release Coresight path when alloc trace id failed (2023-05-11 11:18:21 +0100) ---------------------------------------------------------------- coresight: Fixes for v6.4 Couple of fixes for coresight self-hosted tracing subsystem for v6.4. These include : - Fix signedness bug in tmc_etr_buf_insert_barrier_packet() - Fix memory leak with failing to release the path if trace-id allocation fails Signed-off-by: Suzuki K Poulose <suzuki.poulose(a)arm.com> ---------------------------------------------------------------- Dan Carpenter (1): coresight: Fix signedness bug in tmc_etr_buf_insert_barrier_packet() Ruidong Tian (1): coresight: perf: Release Coresight path when alloc trace id failed drivers/hwtracing/coresight/coresight-etm-perf.c | 1 + drivers/hwtracing/coresight/coresight-tmc-etr.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-)

1 year, 6 months

[PATCH] perf cs-etm: Fix contextid validation

by James Clark

Pre 5.11 kernels don't support 'contextid1' and 'contextid2' so validation would be skipped. By adding an additional check for 'contextid', old kernels will still have validation done even though contextid would either be contextid1 or contextid2. Additionally now that it's possible to override options, an existing bug in the validation is revealed. 'val' is overwritten by the contextid1 validation, and re-used for contextid2 validation causing it to always fail. '!val || val != 0x4' is the same as 'val != 0x4' because 0 is also != 4, so that expression can be simplified and the temp variable not overwritten. Fixes: 35c51f83dd1e ("perf cs-etm: Validate options after applying them") Reviewed-by: Leo Yan <leo.yan(a)linaro.org> Link: https://lore.kernel.org/all/20230501073452.GA4660@leoy-yangtze.lan Signed-off-by: James Clark <james.clark(a)arm.com> --- tools/perf/arch/arm/util/cs-etm.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c index 77cb03e6ff87..9ca040bfb1aa 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c @@ -78,9 +78,9 @@ static int cs_etm_validate_context_id(struct auxtrace_record *itr, char path[PATH_MAX]; int err; u32 val; - u64 contextid = - evsel->core.attr.config & - (perf_pmu__format_bits(&cs_etm_pmu->format, "contextid1") | + u64 contextid = evsel->core.attr.config & + (perf_pmu__format_bits(&cs_etm_pmu->format, "contextid") | + perf_pmu__format_bits(&cs_etm_pmu->format, "contextid1") | perf_pmu__format_bits(&cs_etm_pmu->format, "contextid2")); if (!contextid) @@ -114,8 +114,7 @@ static int cs_etm_validate_context_id(struct auxtrace_record *itr, * 0b00100 Maximum of 32-bit Context ID size. * All other values are reserved. */ - val = BMVAL(val, 5, 9); - if (!val || val != 0x4) { + if (BMVAL(val, 5, 9) != 0x4) { pr_err("%s: CONTEXTIDR_EL1 isn't supported, disable with %s/contextid1=0/\n", CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); return -EINVAL; -- 2.34.1

1 year, 6 months

Re: [PATCH v1] perf arm: Fix include path

by Leo Yan

Hi Ian, On Mon, May 08, 2023 at 02:31:28PM -0700, Ian Rogers wrote: > Change "../cs-etm.h" to just "cs-etm.h" as ../cs-etm.h doesn't exist. > > Signed-off-by: Ian Rogers <irogers(a)google.com> > --- > tools/perf/arch/arm/util/pmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c > index 860a8b42b4b5..46154c226fbb 100644 > --- a/tools/perf/arch/arm/util/pmu.c > +++ b/tools/perf/arch/arm/util/pmu.c > @@ -12,7 +12,7 @@ > #include "arm-spe.h" > #include "hisi-ptt.h" > #include "../../../util/pmu.h" > -#include "../cs-etm.h" This code is a bit tricky. Here it deliberately uses "../cs-etm.h" to avoid including the header file in the same folder, alternatively, the compiler option "-I/home/leoy/Work/linux/tools/perf/util/include" will lead the C file to include "tools/perf/util/include/../cs-etm.h". > +#include "cs-etm.h" So with this change, perf will fail to build actually :) We need to change to: #include "../../../util/cs-etm.h" With above change: Reviewed-by: Leo Yan <leo.yan(a)linaro.org> Thanks for code improvement! > struct perf_event_attr > *perf_pmu__get_default_config(struct perf_pmu *pmu __maybe_unused) > -- > 2.40.1.521.gf1e218fcd8-goog >

1 year, 6 months

Re: [PATCH v4 2/3] dt-bindings: arm: Add Coresight Dummy Trace

by Suzuki K Poulose

On 05/05/2023 10:24, Hao Zhang wrote: > Add new coresight-dummy.yaml file describing the bindings required > to define coresight dummy trace in the device trees. > > Signed-off-by: Hao Zhang <quic_hazha(a)quicinc.com> > --- > .../bindings/arm/arm,coresight-dummy.yaml | 102 ++++++++++++++++++ > 1 file changed, 102 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/arm,coresight-dummy.yaml > > diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dummy.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dummy.yaml > new file mode 100644 > index 000000000000..126518863eea > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/arm,coresight-dummy.yaml > @@ -0,0 +1,102 @@ > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/arm,coresight-dummy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ARM Coresight Dummy component > + > +description: | > + Coresight Dummy Trace Module is for the specific devices that kernel > + don't have permission to access or configure, e.g., CoreSight TPDMs > + on Qualcomm platforms. So there need driver to register dummy devices > + as Coresight devices. It may also be used to define components that > + may not have any programming interfaces (e.g, static links), so that > + paths can be established in the driver. Provide Coresight API for > + dummy device operations, such as enabling and disabling dummy devices. > + Build the Coresight path for dummy sink or dummy source for debugging. > + > + The primary use case of the coresight dummy is to build path in kernel > + side for dummy sink and dummy source. > + > +maintainers: > + - Mao Jinlong <quic_jinlmao(a)quicinc.com> > + - Tao Zhang <quic_taozha(a)quicinc.com> > + - Hao Zhang <quic_hazha(a)quicinc.com> > + - Yuanfang Zhang <quic_yuanfang(a)quicinc.com> Given this is a generic "CoreSight" component, I would prefer to have the CoreSight subsystem maintainers listed here (too). I don't mind the entries above, but would like to make sure that the subsystem people are aware of the changes happening here. Please use: Mike Leach <mike.leach(a)linaro.org> Suzuki K Poulose <suzuki.poulose(a)arm.com> Leo Yan <leo.yan(a)linaro.org> With the above: Acked-by: Suzuki K Poulose <suzuki.poulose(a)arm.com> > + > +properties: > + compatible: > + items: > + - enum: > + - arm,coresight-dummy-sink > + - arm,coresight-dummy-source > + > + out-ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port: > + description: Output connection from the source to Coresight > + Trace bus. > + $ref: /schemas/graph.yaml#/properties/port > + > + in-ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port: > + description: Input connection from the Coresight Trace bus to > + dummy sink, such as Embedded USB debugger(EUD). > + $ref: /schemas/graph.yaml#/properties/port > + > +required: > + - compatible > + > +if: > + # If the compatible contains the below value > + properties: > + compatible: > + contains: > + const: arm,coresight-dummy-sink > + > +then: > + required: > + - in-ports > + > +else: > + required: > + - out-ports > + > +additionalProperties: false > + > +examples: > + # Minimum dummy sink definition. Dummy sink connect to coresight replicator. > + - | > + sink { > + compatible = "arm,coresight-dummy-sink"; > + > + in-ports { > + port { > + eud_in_replicator_swao: endpoint { > + remote-endpoint = <&replicator_swao_out_eud>; > + }; > + }; > + }; > + }; > + > + # Minimum dummy source definition. Dummy source connect to coresight funnel. > + - | > + source { > + compatible = "arm,coresight-dummy-source"; > + > + out-ports { > + port { > + dummy_riscv_out_funnel_swao: endpoint { > + remote-endpoint = <&funnel_swao_in_dummy_riscv>; > + }; > + }; > + }; > + }; > + > +...

1 year, 6 months

Re: [PATCH v4 1/3] Coresight: Add coresight dummy driver

by Suzuki K Poulose

On 05/05/2023 10:24, Hao Zhang wrote: > Some Coresight devices that kernel don't have permission to access or > configure. So there need driver to register dummy devices as Coresight > devices. It may also be used to define components that may not have > any programming interfaces (e.g, static links), so that paths can be > established in the driver. Provide Coresight API for dummy device > operations, such as enabling and disabling dummy devices. Build the > Coresight path for dummy sink or dummy source for debugging. > > Signed-off-by: Hao Zhang <quic_hazha(a)quicinc.com> > --- > drivers/hwtracing/coresight/Kconfig | 11 ++ > drivers/hwtracing/coresight/Makefile | 1 + > drivers/hwtracing/coresight/coresight-dummy.c | 171 ++++++++++++++++++ > include/linux/coresight.h | 1 + > 4 files changed, 184 insertions(+) > create mode 100644 drivers/hwtracing/coresight/coresight-dummy.c > > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig > index 2b5bbfffbc4f..06f0a7594169 100644 > --- a/drivers/hwtracing/coresight/Kconfig > +++ b/drivers/hwtracing/coresight/Kconfig > @@ -236,4 +236,15 @@ config CORESIGHT_TPDA > > To compile this driver as a module, choose M here: the module will be > called coresight-tpda. > + > +config CORESIGHT_DUMMY > + tristate "Dummy driver support" > + help > + Enables support for dummy driver. Dummy driver can be used for > + CoreSight sources/sinks that are owned and configured by some > + other subsystem and use Linux drivers to configure rest of trace > + path > + > + To compile this driver as a module, choose M here: the module will be > + called coresight-dummy. > endif > diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile > index 33bcc3f7b8ae..995d3b2c76df 100644 > --- a/drivers/hwtracing/coresight/Makefile > +++ b/drivers/hwtracing/coresight/Makefile > @@ -30,3 +30,4 @@ obj-$(CONFIG_CORESIGHT_TPDA) += coresight-tpda.o > coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ > coresight-cti-sysfs.o > obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o > +obj-$(CONFIG_CORESIGHT_DUMMY) += coresight-dummy.o > diff --git a/drivers/hwtracing/coresight/coresight-dummy.c b/drivers/hwtracing/coresight/coresight-dummy.c > new file mode 100644 > index 000000000000..ee9881ff4754 > --- /dev/null > +++ b/drivers/hwtracing/coresight/coresight-dummy.c > @@ -0,0 +1,171 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. > + */ > + > +#include <linux/kernel.h> > +#include <linux/module.h> > +#include <linux/platform_device.h> > +#include <linux/coresight.h> > +#include <linux/of.h> > +#include <linux/pm_runtime.h> Please follow the alphabetical order for the header files ^ > + > +#include "coresight-priv.h" > + > +struct dummy_drvdata { > + struct device *dev; nit: We don't need this really. And that completely removes the need for drvdata too. See below. > + struct coresight_device *csdev; > +}; > + > +DEFINE_CORESIGHT_DEVLIST(source_devs, "dummy_source"); > +DEFINE_CORESIGHT_DEVLIST(sink_devs, "dummy_sink"); > + > +static int dummy_source_enable(struct coresight_device *csdev, > + struct perf_event *event, u32 mode) > +{ > + struct dummy_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + dev_dbg(drvdata->dev, "Dummy source enabled\n"); dev_dbg(csdev->dev.parent, .."); Similarly for all instances below. > + > + return 0; > +} > + > +static void dummy_source_disable(struct coresight_device *csdev, > + struct perf_event *event) > +{ > + struct dummy_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + dev_dbg(drvdata->dev, "Dummy source disabled\n"); > +} > + > +static int dummy_sink_enable(struct coresight_device *csdev, u32 mode, > + void *data) > +{ > + struct dummy_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + dev_dbg(drvdata->dev, "Dummy sink enabled\n"); > + > + return 0; > +} > + > +static int dummy_sink_disable(struct coresight_device *csdev) > +{ > + struct dummy_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > + > + dev_dbg(drvdata->dev, "Dummy sink disabled\n"); > + > + return 0; > +} > + > +static const struct coresight_ops_source dummy_source_ops = { > + .enable = dummy_source_enable, > + .disable = dummy_source_disable, > +}; > + > +static const struct coresight_ops dummy_source_cs_ops = { > + .source_ops = &dummy_source_ops, > +}; > + > +static const struct coresight_ops_sink dummy_sink_ops = { > + .enable = dummy_sink_enable, > + .disable = dummy_sink_disable, > +}; > + > +static const struct coresight_ops dummy_sink_cs_ops = { > + .sink_ops = &dummy_sink_ops, > +}; > + > +static int dummy_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct device_node *node = dev->of_node; > + struct coresight_platform_data *pdata; > + struct dummy_drvdata *drvdata; > + struct coresight_desc desc = { 0 }; > + > + if (of_device_is_compatible(node, "arm,coresight-dummy-source")) { > + > + desc.name = coresight_alloc_device_name(&source_devs, dev); > + if (!desc.name) > + return -ENOMEM; > + > + desc.type = CORESIGHT_DEV_TYPE_SOURCE; > + desc.subtype.source_subtype = > + CORESIGHT_DEV_SUBTYPE_SOURCE_OTHERS; > + desc.ops = &dummy_source_cs_ops; > + } else if (of_device_is_compatible(node, "arm,coresight-dummy-sink")) { > + desc.name = coresight_alloc_device_name(&sink_devs, dev); > + if (!desc.name) > + return -ENOMEM; > + > + desc.type = CORESIGHT_DEV_TYPE_SINK; > + desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_DUMMY; > + desc.ops = &dummy_sink_cs_ops; > + } else { > + dev_err(dev, "Device type not set\n"); > + return -EINVAL; > + } > + > + pdata = coresight_get_platform_data(dev); > + if (IS_ERR(pdata)) > + return PTR_ERR(pdata); > + pdev->dev.platform_data = pdata; > + > + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); > + if (!drvdata) > + return -ENOMEM; > + > + drvdata->dev = &pdev->dev; > + platform_set_drvdata(pdev, drvdata); As above, you may remove the drvdata entirely. Otherwise looks good to me Suzuki

1 year, 6 months

[PATCH 0/7] perf: cs-etm: Fixes around timestamped and timeless decoding

by James Clark

The first commit contains a fix for a recently introduced regression, but was always a shortcoming in the Coresight code anyway. The following commits are a tidyup in preparation for the last commit, which is a fairly major change to the decode logic that's also indirectly related to the regression so I thought it would be good time to fix that now. Applies to perf/core (9be6ab181b7b) James Clark (7): perf: cs-etm: Fix timeless decode mode detection perf tools: Add util function for overriding user set config values perf: cs-etm: Don't test full_auxtrace because it's always set perf: cs-etm: Validate options after applying them perf: cs-etm: Allow user to override timestamp and contextid settings perf: cs-etm: Use bool type for boolean values perf: cs-etm: Add separate decode paths for timeless and per-thread modes tools/perf/arch/arm/util/cs-etm.c | 223 +++++++++--------- tools/perf/arch/arm/util/pmu.c | 2 + tools/perf/arch/arm64/util/arm-spe.c | 26 +- tools/perf/arch/x86/util/intel-pt.c | 22 +- tools/perf/tests/shell/test_arm_coresight.sh | 24 ++ .../perf/util/cs-etm-decoder/cs-etm-decoder.h | 8 +- tools/perf/util/cs-etm.c | 200 +++++++++++----- tools/perf/util/cs-etm.h | 6 +- tools/perf/util/evsel.c | 29 +++ tools/perf/util/evsel.h | 3 + 10 files changed, 325 insertions(+), 218 deletions(-) -- 2.34.1

1 year, 6 months

[PATCH v5 00/13] coresight: Fix CTI module refcount leak by making it a helper device

by James Clark

Changes since v4: * Update commit message on patch 1 * Drop previous change that added lockdep checks to coresight_add_helper() because they are already in mutex_lock(). But keep extra comment. * Check for allocation failure in coresight_add_out_conn() ------------------ Changes since v3: * Put connection loss fix at the beginning so that it can be backported * Replace coresight_find_link_{x}() with coresight_find_out_connection() * Reorder coresight_enable_source() arguments for consistency * Add source and destination reference counts so that two link devices connected together don't clash * Add coresight_is_helper() * Fix overwriting csdev bug in coresight_orphan_match() * Don't clear conns[i]->dest_fwnode in coresight_remove_conns() in case it's used again * Use dev instead of adev->dev for devmem allocation in acpi_coresight_parse_graph() so that it's consistent with DT mode and doesn't cause a warning on free. * Rename coresight_add_helper_mutex() -> coresight_add_helper() * Ensure coresight_mutex isn't already held in coresight_add_helper() * Return new connection from coresight_add_out_conn() * Comment and formatting improvements ------------------ Changes since v2: * Make out_conns array contiguous instead of sparse which simplifies filling and using it. New connections are always added to the end * Store pointers to individual connection objects so that they can be shared between inputs and outputs * Fix an existing bug where connection info was lost when unloading a device * Simplify connection fixup functions. Now the orphan mechanism is used for inputs in the same way as outputs to guarantee that all connections have both an input and an output set * Use input connections to disconnect devices on unload instead of iterating through them all * Make refcount a property of the connection rather than use it's own array based on the number of inputs and outputs * Fix a bug in v2 where helpers attached to the source device weren't disabled because coresight-etm-perf.c was making a raw call to disable rather than using a helper. * Change names of connection members to make direction explicit now that the connection is shared between input and outputs ------------------ Changes since v1: * Don't dereference handle in tmc_etr_get_buffer() when not in perf mode. * Fix some W=1 warnings * Add a commit to rename child/output in terms of local/remote ------------------- Currently there is a refcount leak in CTI when using system wide mode or tracing multithreaded applications. See the last commit for a reproducer. This prevents the module from being unloaded. Historically there have been a few issues and fixes attempted around here which have resulted in some extra logic and a member to keep track of CTI being enabled 'struct coresight_device->ect_enabled'. The fix in commit 665c157e0204 ("coresight: cti: Fix hang in cti_disable_hw()") was also related to CTI having its own enable/disable path which came later than other devices. If we make CTI a helper device and enable helper devices adjacent to the path we get very similar enable/disable behavior to now, but with more reuse of the existing reference counting logic in the coresight core code. This also affects CATU which can have a little bit of its hard coded enable/disable code removed. Enabling CATU on the generic path does require that input connections are tracked so that it can get its associated ETR buffer. Applies to coresight/next (197b6b60ae7b) but also requires the realloc_array patch here [1]. Also available in full here [2]. [1]: https://lore.kernel.org/linux-arm-kernel/20230306152723.3090195-1-james.cla… [2]: https://gitlab.arm.com/linux-arm/linux-jc/-/tree/james-cs-cti-module-refcou… James Clark (13): coresight: Fix loss of connection info when a module is unloaded coresight: Use enum type for cs_mode wherever possible coresight: Change name of pdata->conns coresight: Rename nr_outports to nr_outconns coresight: Rename connection members to make the direction explicit coresight: Dynamically add connections coresight: Store pointers to connections rather than an array of them coresight: Simplify connection fixup mechanism coresight: Store in-connections as well as out-connections coresight: Make refcount a property of the connection coresight: Refactor out buffer allocation function for ETR coresight: Enable and disable helper devices adjacent to the path coresight: Fix CTI module refcount leak by making it a helper device drivers/hwtracing/coresight/coresight-catu.c | 21 +- drivers/hwtracing/coresight/coresight-core.c | 593 ++++++++++-------- .../hwtracing/coresight/coresight-cti-core.c | 52 +- .../hwtracing/coresight/coresight-cti-sysfs.c | 4 +- drivers/hwtracing/coresight/coresight-cti.h | 4 +- drivers/hwtracing/coresight/coresight-etb10.c | 13 +- .../hwtracing/coresight/coresight-etm-perf.c | 4 +- .../coresight/coresight-etm3x-core.c | 6 +- .../coresight/coresight-etm4x-core.c | 6 +- .../hwtracing/coresight/coresight-funnel.c | 26 +- .../hwtracing/coresight/coresight-platform.c | 269 ++++---- drivers/hwtracing/coresight/coresight-priv.h | 17 +- .../coresight/coresight-replicator.c | 23 +- drivers/hwtracing/coresight/coresight-stm.c | 6 +- drivers/hwtracing/coresight/coresight-sysfs.c | 17 +- .../hwtracing/coresight/coresight-tmc-etf.c | 26 +- .../hwtracing/coresight/coresight-tmc-etr.c | 110 ++-- drivers/hwtracing/coresight/coresight-tmc.h | 2 + drivers/hwtracing/coresight/coresight-tpda.c | 23 +- drivers/hwtracing/coresight/coresight-tpdm.c | 4 +- drivers/hwtracing/coresight/coresight-tpiu.c | 7 +- drivers/hwtracing/coresight/coresight-trbe.c | 3 +- drivers/hwtracing/coresight/ultrasoc-smb.c | 11 +- drivers/hwtracing/coresight/ultrasoc-smb.h | 2 +- include/linux/coresight.h | 127 ++-- 25 files changed, 708 insertions(+), 668 deletions(-) -- 2.34.1

1 year, 6 months

Re: [PATCH 2/7] perf tools: Add util function for overriding user set config values

by Arnaldo Carvalho de Melo

Em Mon, Apr 24, 2023 at 06:36:14PM +0300, Adrian Hunter escreveu: > On 24/04/23 16:47, James Clark wrote: > > There is some duplicated code to only override config values if they > > haven't already been set by the user so make a util function for this. > > > > Signed-off-by: James Clark <james.clark(a)arm.com> > > One minor comment, nevertheless: > > Acked-by: Adrian Hunter <adrian.hunter(a)intel.com> I just moved to evsel__set_config_if_unset() to util/pmu.c, next to some other evsel__ functions to not break the python.so binding, before I was getting: [acme@quaco perf-tools-next]$ perf test -v python Couldn't bump rlimit(MEMLOCK), failures may take place when creating BPF maps, etc 19: 'import perf' in python : --- start --- test child forked, pid 500086 python usage test: "echo "import sys ; sys.path.append('/tmp/build/perf-tools-next/python'); import perf" | '/usr/bin/python3' " Traceback (most recent call last): File "<stdin>", line 1, in <module> ImportError: /tmp/build/perf-tools-next/python/perf.cpython-311-x86_64-linux-gnu.so: undefined symbol: perf_pmu__format_bits test child finished with -1 ---- end ---- 'import perf' in python: FAILED! [acme@quaco perf-tools-next]$ Please run 'perf test' and 'make -C tools/perf build-test' prior to sending pull requests, Thanks, applied. - Arnaldo

1 year, 6 months

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