On 28/03/2023 01:53, Yang Shi wrote:
> Hi Leo,
>
> Just follow up on this one. Any update?
>
Hi Yang,
Sorry no update on this yet from me. I was just finishing off
"coresight: Fix CTI module refcount leak by making it a helper device"
which I hope to post in the next day or two and then I will start on this.
James
> Thanks,
> Yang
>
> On Mon, Mar 13, 2023 at 5:36 PM Leo Yan <leo.yan(a)linaro.org> wrote:
>>
>> On Mon, Mar 13, 2023 at 11:15:44AM -0700, Yang Shi wrote:
>>
>> [...]
>>
>>>> Just a quick summary, here we have two issues:
>>>>
>>>> - With command:
>>>> perf record -e cs_etm/@tmc_etf63/k --kcore --per-thread \
>>>> -- taskset --cpu-list 1 uname",
>>>>
>>>> perf doesn't enable "text poke" attribution.
>>>
>>> No, it enables "text poke" and perf fails to decode coresight trace
>>> data too. It doesn't matter whether "--kcore" is after or before "-e
>>> cs/etm/@tmc_etf63/k".
>>
>> Understand now. Thanks for correction, if so we can ignore this one.
>>
>> Leo
Check whether the CPU corresponding to the CPU CTI is activated.
If it is not activated, the CPU CTI node should not exist, and
an error will be returned in the initialization function.
Signed-off-by: Tao Zhang <quic_taozha(a)quicinc.com>
---
drivers/hwtracing/coresight/coresight-cti-core.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c
index 277c890..aaa83ae 100644
--- a/drivers/hwtracing/coresight/coresight-cti-core.c
+++ b/drivers/hwtracing/coresight/coresight-cti-core.c
@@ -899,10 +899,12 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id)
drvdata->config.hw_powered = true;
/* set up device name - will depend if cpu bound or otherwise */
- if (drvdata->ctidev.cpu >= 0)
+ if (drvdata->ctidev.cpu >= 0) {
+ if (!cpu_active(drvdata->ctidev.cpu))
+ return -ENXIO;
cti_desc.name = devm_kasprintf(dev, GFP_KERNEL, "cti_cpu%d",
drvdata->ctidev.cpu);
- else
+ } else
cti_desc.name = coresight_alloc_device_name(&cti_sys_devs, dev);
if (!cti_desc.name)
return -ENOMEM;
--
2.7.4
On 24/03/2023 06:16, Hao Zhang wrote:
> Add documentation for Coresight Dummy Trace under trace/coresight.
>
> Signed-off-by: Hao Zhang <quic_hazha(a)quicinc.com>
> ---
> .../trace/coresight/coresight-dummy.rst | 58 +++++++++++++++++++
> 1 file changed, 58 insertions(+)
> create mode 100644 Documentation/trace/coresight/coresight-dummy.rst
>
> diff --git a/Documentation/trace/coresight/coresight-dummy.rst b/Documentation/trace/coresight/coresight-dummy.rst
> new file mode 100644
> index 000000000000..819cabab8623
> --- /dev/null
> +++ b/Documentation/trace/coresight/coresight-dummy.rst
> @@ -0,0 +1,58 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +=============================
> +Coresight Dummy Trace Module
> +=============================
> +
> + :Author: Hao Zhang <quic_hazha(a)quicinc.com>
> + :Date: March 2023
> +
> +Introduction
> +---------------------------
> +
> +Coresight Dummy Trace Module is for the specific devices that HLOS don't
Please do not use cryptic abbreviations, please use "kernel"
> +have permission to access or configure.
Such as Coresight sink EUD, some
> +TPDMs etc.
Say "e.g., CoreSight TPDMs on Qualcomm platforms.:
So there need driver to register dummy devices as Coresight
> +devices.
Add:
"It may also be used to define components that may not have any
programming interfaces (e.g, static links), so that paths can
be established in the driver.
"
Provide Coresight API for dummy device operations, such as
> +enabling and disabling dummy devices. Build the Coresight path for dummy
> +sink or dummy source for debugging.
I think the following content may not be needed as they are part
of the standard source/sink type devices, nothing specific to
dummy devices.
--- vvvvv ---
> +
> +Sysfs files and directories
> +---------------------------
> +
> +Root: ``/sys/bus/coresight/devices/dummy<N>``
> +
> +----
> +
> +:File: ``enable_source`` (RW)
> +:Notes:
> + - > 0 : enable the datasets of dummy source.
> +
> + - = 0 : disable the datasets of dummy source.
> +
> +:Syntax:
> + ``echo 1 > enable_source``
> +
> +----
> +
> +:File: ``enable_sink`` (RW)
> +:Notes:
> + - > 0 : enable the datasets of dummy sink.
> +
> + - = 0 : disable the datasets of dummy sink.
> +
> +:Syntax:
> + ``echo 1 > enable_sink``
> +
> +----
> +
--- You may remove the above ^^^ ----
> +Config details
> +---------------------------
> +
> +There are two types of nodes, dummy sink and dummy source. The nodes
> +should be observed at the coresight path
> +"/sys/bus/coresight/devices".
> +e.g.
> +/sys/bus/coresight/devices # ls -l | grep dummy
> +dummy0 -> ../../../devices/platform/soc@0/soc@0:dummy_source/dummy0
> +dummy1 -> ../../../devices/platform/soc@0/soc@0:dummy_sink/dummy1
Suzuki
On 24/03/2023 06:16, Hao Zhang wrote:
> Add new coresight-dummy.yaml file describing the bindings required
> to define coresight dummy trace in the device trees.
>
> Signed-off-by: Hao Zhang <quic_hazha(a)quicinc.com>
> ---
> .../bindings/arm/qcom,coresight-dummy.yaml | 118 ++++++++++++++++++
> 1 file changed, 118 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
> new file mode 100644
> index 000000000000..7b719b084d72
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
> @@ -0,0 +1,118 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/qcom,coresight-dummy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: QCOM Coresight Dummy component
As mentioned in the previous email, please make this Arm CoreSight. This
is not specific to Qcom, rather something the CoreSight driver exposes
as a dummy framework. Otherwise looks good to me.
Suzuki
Greg,
Please find a couple of fixes for coresight self-hosted tracing for v6.3. Kindly
consider pulling.
Suzuki
The following changes since commit eeac8ede17557680855031c6f305ece2378af326:
Linux 6.3-rc2 (2023-03-12 16:36:44 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-fixes-v6.3
for you to fetch changes up to 735e7b30a53a1679c050cddb73f5e5316105d2e3:
coresight: etm4x: Do not access TRCIDR1 for identification (2023-03-21 12:31:02 +0000)
----------------------------------------------------------------
coresight: Fixes for v6.3
Fixes for coresight subsystem includes:
- Fix etm4_enable_hw to program all the address comparator pairs (instead of
half of them)
- Do not access TRCIDR1 register without OSLK cleared in etm4_probe for mmio
access.
Signed-off-by: Suzuki K Poulose <suzuki.poulose(a)arm.com>
----------------------------------------------------------------
Steve Clevenger (1):
coresight-etm4: Fix for() loop drvdata->nr_addr_cmp range bug
Suzuki K Poulose (1):
coresight: etm4x: Do not access TRCIDR1 for identification
drivers/hwtracing/coresight/coresight-etm4x-core.c | 24 +++++++++-------------
drivers/hwtracing/coresight/coresight-etm4x.h | 20 ++++++------------
2 files changed, 16 insertions(+), 28 deletions(-)
On 20/03/2023 14:17, Rob Herring wrote:
> On Thu, Mar 16, 2023 at 10:05 PM Anshuman Khandual
> <anshuman.khandual(a)arm.com> wrote:
>>
>> CoreSight ETM4x devices could be accessed either via MMIO (handled via
>> amba_driver) or CPU system instructions (handled via platform driver). But
>> this has the following issues :
>>
>> - Each new CPU comes up with its own PID and thus we need to keep on
>> adding the "known" PIDs to get it working with AMBA driver. While
>> the ETM4 architecture (and CoreSight architecture) defines way to
>> identify a device as ETM4. Thus older kernels won't be able to
>> "discover" a newer CPU, unless we add the PIDs.
>
> But v8.4 discourages MMIO access, so this problem will go away on its
> own. Even if not, adding IDs to stable kernels is standard practice
> whether it is PCI VID/PID, compatible string or AMBA PID.
Yes, it would eventually go away. As for adding the PIDs, the
fundamental issue is, unlike other drivers, except for the "PIDs"
everything else is architected and each CPU has this PID alone
different and we have plenty of CPUs implementaions out there.
But all that said, since we added this as an AMBA driver in the first
place (all for simply getting the apb_clk management), I am happy to
choose the "Add PIDs to stable kernel approach" for this problem.
>
>> - With ACPI, the ETM4x devices have the same HID to identify the device
>> irrespective of the mode of access. This creates a problem where two
>> different drivers (both AMBA based driver and platform driver) would
>> hook into the "HID" and could conflict. e.g., if AMBA driver gets
>> hold of a non-MMIO device, the probe fails. If we have single driver
>> hooked into the given "HID", we could handle them seamlessly,
>> irrespective of the mode of access.
>
> Why are we changing DT for ACPI? Just always use the platform driver
> for ACPI and leave DT systems alone.
This was mainly due to (1), given we have a platform driver anyway for
ACPI. As mentioned above, we could leave the DT alone.
>
>> - CoreSight is heavily dependent on the runtime power management. With
>> ACPI, amba_driver doesn't get us anywhere with handling the power
>> and thus one need to always turn the power ON to use them. Moving to
>> platform driver gives us the power management for free.
>
> This sounds like an issue for any amba driver. If this is an issue,
> solve it for everyone, not just work around it in one driver.
This alone wouldn't be sufficient. We need a platform driver anyway to
handle the two different modes in ACPI for ETMs. But this will be a
an option for the other CoreSight components which are always MMIO.
Thanks
Suzuki
>
> When someone puts another primecell device into an ACPI system, are we
> going to go do the same one-off change in that driver too? (We kind of
> already did with SBSA UART...)
>
> Rob