Linaro-mm-sig

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[PATCH v2] amdgpu: remove unreachable code

by Jiapeng Chong

In the function amdgpu_uvd_cs_msg(), every branch in the switch statement will have a return, so the code below the switch statement will not be executed. Eliminate the follow smatch warning: drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c:845 amdgpu_uvd_cs_msg() warn: ignoring unreachable code. Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong(a)linux.alibaba.com> --- Changes in v2: -For the follow advice: https://lore.kernel.org/patchwork/patch/1435074/ drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index 82f0542..b32ed85 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c @@ -840,7 +840,6 @@ static int amdgpu_uvd_cs_msg(struct amdgpu_uvd_cs_ctx *ctx, default: DRM_ERROR("Illegal UVD message type (%d)!\n", msg_type); - return -EINVAL; } BUG(); return -EINVAL; -- 1.8.3.1

5 years, 1 month

[PATCH -next] media: staging: tegra-vde: Fix error return code in tegra_vde_probe()

by Wei Yongjun

Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Fixes: dc8276b78917 ("staging: media: tegra-vde: use pm_runtime_resume_and_get()") Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1(a)huawei.com> --- drivers/staging/media/tegra-vde/vde.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/tegra-vde/vde.c b/drivers/staging/media/tegra-vde/vde.c index e025b69776f2..321d14ba2e56 100644 --- a/drivers/staging/media/tegra-vde/vde.c +++ b/drivers/staging/media/tegra-vde/vde.c @@ -1071,7 +1071,8 @@ static int tegra_vde_probe(struct platform_device *pdev) * power-cycle it in order to put hardware into a predictable lower * power state. */ - if (pm_runtime_resume_and_get(dev) < 0) + err = pm_runtime_resume_and_get(dev); + if (err < 0) goto err_pm_runtime; pm_runtime_put(dev);

5 years, 1 month

[PATCH] drm/amdgpu: Fix inconsistent indenting

by Jiapeng Chong

Eliminate the follow smatch warning: drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:449 sdma_v5_0_ring_emit_mem_sync() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong(a)linux.alibaba.com> --- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 75d7310..c45e1b0 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -440,20 +440,19 @@ static void sdma_v5_0_ring_emit_ib(struct amdgpu_ring *ring, */ static void sdma_v5_0_ring_emit_mem_sync(struct amdgpu_ring *ring) { - uint32_t gcr_cntl = - SDMA_GCR_GL2_INV | SDMA_GCR_GL2_WB | SDMA_GCR_GLM_INV | - SDMA_GCR_GL1_INV | SDMA_GCR_GLV_INV | SDMA_GCR_GLK_INV | - SDMA_GCR_GLI_INV(1); + uint32_t gcr_cntl = SDMA_GCR_GL2_INV | SDMA_GCR_GL2_WB | SDMA_GCR_GLM_INV | + SDMA_GCR_GL1_INV | SDMA_GCR_GLV_INV | SDMA_GCR_GLK_INV | + SDMA_GCR_GLI_INV(1); /* flush entire cache L0/L1/L2, this can be optimized by performance requirement */ amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ)); amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD1_BASE_VA_31_7(0)); amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD2_GCR_CONTROL_15_0(gcr_cntl) | - SDMA_PKT_GCR_REQ_PAYLOAD2_BASE_VA_47_32(0)); + SDMA_PKT_GCR_REQ_PAYLOAD2_BASE_VA_47_32(0)); amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD3_LIMIT_VA_31_7(0) | - SDMA_PKT_GCR_REQ_PAYLOAD3_GCR_CONTROL_18_16(gcr_cntl >> 16)); + SDMA_PKT_GCR_REQ_PAYLOAD3_GCR_CONTROL_18_16(gcr_cntl >> 16)); amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD4_LIMIT_VA_47_32(0) | - SDMA_PKT_GCR_REQ_PAYLOAD4_VMID(0)); + SDMA_PKT_GCR_REQ_PAYLOAD4_VMID(0)); } /** -- 1.8.3.1

5 years, 1 month

[PATCH] drm/doc: Includ fence chain api

by Daniel Vetter

We have this nice kerneldoc, but forgot to include it. Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: "Christian König" <christian.koenig(a)amd.com> Cc: linux-media(a)vger.kernel.org Cc: linaro-mm-sig(a)lists.linaro.org --- Documentation/driver-api/dma-buf.rst | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst index 7f37ec30d9fd..7f21425d9435 100644 --- a/Documentation/driver-api/dma-buf.rst +++ b/Documentation/driver-api/dma-buf.rst @@ -178,6 +178,15 @@ DMA Fence Array .. kernel-doc:: include/linux/dma-fence-array.h :internal: +DMA Fence Chain +~~~~~~~~~~~~~~~ + +.. kernel-doc:: drivers/dma-buf/dma-fence-chain.c + :export: + +.. kernel-doc:: include/linux/dma-fence-chain.h + :internal: + DMA Fence uABI/Sync File ~~~~~~~~~~~~~~~~~~~~~~~~ -- 2.31.0

5 years, 1 month

[RFC 0/3] dma-fence: Add a "boost" mechanism

by Rob Clark

From: Rob Clark <robdclark(a)chromium.org> In some cases, like double-buffered rendering, missing vblanks can trick the GPU into running at a lower frequence, when really we want to be running at a higher frequency to not miss the vblanks in the first place. This is partially inspired by a trick i915 does, but implemented via dma-fence for a couple of reasons: 1) To continue to be able to use the atomic helpers 2) To support cases where display and gpu are different drivers The last patch is just proof of concept, in reality I think it may want to be a bit more clever. But sending this out as it is as an RFC to get feedback. Rob Clark (3): dma-fence: Add boost fence op drm/atomic: Call dma_fence_boost() when we've missed a vblank drm/msm: Wire up gpu boost drivers/gpu/drm/drm_atomic_helper.c | 11 +++++++++++ drivers/gpu/drm/msm/msm_fence.c | 10 ++++++++++ drivers/gpu/drm/msm/msm_gpu.c | 13 +++++++++++++ drivers/gpu/drm/msm/msm_gpu.h | 2 ++ include/linux/dma-fence.h | 26 ++++++++++++++++++++++++++ 5 files changed, 62 insertions(+) -- 2.30.2

5 years, 1 month

[PATCH 00/38] Rid W=1 warnings from GPU

by Lee Jones

This set is part of a larger effort attempting to clean-up W=1 kernel builds, which are currently overwhelmingly riddled with niggly little warnings. Lee Jones (38): drm/mediatek/mtk_disp_color: Strip incorrect doc and demote header drm/mediatek/mtk_disp_gamma: Strip and demote non-conformant kernel-doc header drm/radeon/radeon_cs: Fix incorrectly documented function 'radeon_cs_parser_fini' drm/mediatek/mtk_disp_ovl: Strip and demote non-conformant header drm/mediatek/mtk_disp_rdma: Strip and demote non-conformant kernel-doc header drm/sti/sti_hdmi_tx3g4c28phy: Provide function names for kernel-doc headers drm/sti/sti_hda: Provide missing function names drm/sti/sti_tvout: Provide a bunch of missing function names drm/sti/sti_hqvdp: Fix incorrectly named function 'sti_hqvdp_vtg_cb()' drm/amd/amdgpu/amdgpu_ids: Correct some function name disparity drm/amd/amdgpu/amdgpu_debugfs: Fix a couple of misnamed functions drm/amd/amdgpu/amdgpu_gmc: Fix a little naming related doc-rot drm/amd/amdgpu/cik_sdma: Fix a few incorrectly named functions drm/amd/amdgpu/gfx_v7_0: Repair function names in the documentation drm/msm/disp/dpu1/dpu_encoder_phys_cmd: Remove unused variable 'cmd_enc' drm/amd/amdgpu/si_dma: Fix some function name disparity drm/amd/amdgpu/dce_v6_0: Repair function name of 'si_get_number_of_dram_channels()' drm/msm/disp/dpu1/dpu_hw_interrupts: Demote a bunch of kernel-doc abuses drm/radeon/cik: Fix incorrectly named function 'cik_irq_suspend()' drm/radeon/radeon_vm: Fix function naming disparities drm/amd/include/aldebaran_ip_offset: Mark top-level IP_BASE as __maybe_unused drm/msm/disp/dpu1/dpu_plane: Fix a couple of naming issues drm/amd/amdgpu/gmc_v7_0: Fix potential copy/paste issue drm/amd/amdgpu/mmhub_v9_4: Fix naming disparity with 'mmhub_v9_4_set_fault_enable_default()' drm/msm/msm_gem: Demote kernel-doc abuses drm/amd/amdgpu/gmc_v10_0: Fix potential copy/paste issue drm/msm/dp/dp_catalog: Correctly document param 'dp_catalog' drm/msm/dp/dp_link: Fix some potential doc-rot drm/radeon/r100: Realign doc header with function 'r100_cs_packet_parse_vline()' drm/amd/amdgpu/gfx_v9_4_2: Mark functions called by reference as static drm/amd/amdgpu/sdma_v2_4: Correct misnamed function 'sdma_v2_4_ring_emit_hdp_flush()' drm/amd/amdgpu/sdma_v4_0: Realign functions with their headers drm/amd/amdgpu/sdma_v5_0: Fix typo in function name drm/amd/amdgpu/amdgpu_vce: Fix a few incorrectly named functions drm/amd/amdgpu/sdma_v5_2: Repair typo in function name drm/amd/amdgpu/vcn_v1_0: Fix some function naming disparity drm/amd/amdgpu/gfx_v10_0: Demote kernel-doc abuse drm/amd/amdgpu/smuio_v13_0: Realign 'smuio_v13_0_is_host_gpu_xgmi_supported()' header drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 4 +-- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 +-- drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 8 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 10 +++--- drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 8 ++--- drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 6 ++-- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c | 14 ++++---- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 2 +- drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 2 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 +-- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 2 +- drivers/gpu/drm/amd/amdgpu/si_dma.c | 6 ++-- drivers/gpu/drm/amd/amdgpu/smuio_v13_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 4 +-- .../gpu/drm/amd/include/aldebaran_ip_offset.h | 2 +- drivers/gpu/drm/mediatek/mtk_disp_color.c | 3 +- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4 +-- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 3 +- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4 +-- .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 4 --- .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 32 +++++++++---------- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 4 +-- drivers/gpu/drm/msm/dp/dp_catalog.c | 2 +- drivers/gpu/drm/msm/dp/dp_link.c | 6 ++-- drivers/gpu/drm/msm/msm_gem.c | 4 +-- drivers/gpu/drm/radeon/cik.c | 2 +- drivers/gpu/drm/radeon/r100.c | 2 +- drivers/gpu/drm/radeon/radeon_cs.c | 2 +- drivers/gpu/drm/radeon/radeon_vm.c | 4 +-- drivers/gpu/drm/sti/sti_hda.c | 6 ++-- drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c | 4 +-- drivers/gpu/drm/sti/sti_hqvdp.c | 2 +- drivers/gpu/drm/sti/sti_tvout.c | 18 +++++------ 38 files changed, 92 insertions(+), 102 deletions(-) Cc: Alex Deucher <alexander.deucher(a)amd.com> Cc: amd-gfx(a)lists.freedesktop.org Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno(a)somainline.org> Cc: Benjamin Gaignard <benjamin.gaignard(a)linaro.org> Cc: Chandan Uddaraju <chandanu(a)codeaurora.org> Cc: "Christian König" <christian.koenig(a)amd.com> Cc: Chun-Kuang Hu <chunkuang.hu(a)kernel.org> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: David Airlie <airlied(a)linux.ie> Cc: dri-devel(a)lists.freedesktop.org Cc: Evan Quan <evan.quan(a)amd.com> Cc: Fabien Dessenne <fabien.dessenne(a)st.com> Cc: freedreno(a)lists.freedesktop.org Cc: Hawking Zhang <Hawking.Zhang(a)amd.com> Cc: Jerome Glisse <glisse(a)freedesktop.org> Cc: Krishna Manikandan <mkrishn(a)codeaurora.org> Cc: Kuogee Hsieh <khsieh(a)codeaurora.org> Cc: linaro-mm-sig(a)lists.linaro.org Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-arm-msm(a)vger.kernel.org Cc: linux-mediatek(a)lists.infradead.org Cc: linux-media(a)vger.kernel.org Cc: Luben Tuikov <luben.tuikov(a)amd.com> Cc: Matthias Brugger <matthias.bgg(a)gmail.com> Cc: Philipp Zabel <p.zabel(a)pengutronix.de> Cc: Rob Clark <robdclark(a)gmail.com> Cc: Sean Paul <sean(a)poorly.run> Cc: Stephen Boyd <swboyd(a)chromium.org> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Vincent Abriou <vincent.abriou(a)st.com> -- 2.31.1

5 years, 1 month

Re: [Linaro-mm-sig] [PATCH v2] drm/amd/amdgpu: Fix errors in documentation of function parameters

by Felix Kuehling

On 2021-04-27 7:27, Fabio M. De Francesco wrote: > In the documentation of functions, removed excess parameters, described > undocumented ones, and fixed syntax errors. > > Signed-off-by: Fabio M. De Francesco <fmdefrancesco(a)gmail.com> > --- > > Changes from v1: Cc'ed all the maintainers. Looks like Alex already applied V1. So this one doesn't apply. "git am -3" tells me: Applying: drm/amd/amdgpu: Fix errors in documentation of function parameters Using index info to reconstruct a base tree... M drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c M drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c M drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c Falling back to patching base and 3-way merge... No changes -- Patch already applied. Regards, Felix > > drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 12 ++++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 4 +++- > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 8 ++++---- > 3 files changed, 13 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c > index 2e9b16fb3fcd..bf2939b6eb43 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c > @@ -76,7 +76,7 @@ struct amdgpu_atif { > /** > * amdgpu_atif_call - call an ATIF method > * > - * @handle: acpi handle > + * @atif: acpi handle > * @function: the ATIF function to execute > * @params: ATIF function params > * > @@ -166,7 +166,6 @@ static void amdgpu_atif_parse_functions(struct amdgpu_atif_functions *f, u32 mas > /** > * amdgpu_atif_verify_interface - verify ATIF > * > - * @handle: acpi handle > * @atif: amdgpu atif struct > * > * Execute the ATIF_FUNCTION_VERIFY_INTERFACE ATIF function > @@ -240,8 +239,7 @@ static acpi_handle amdgpu_atif_probe_handle(acpi_handle dhandle) > /** > * amdgpu_atif_get_notification_params - determine notify configuration > * > - * @handle: acpi handle > - * @n: atif notification configuration struct > + * @atif: acpi handle > * > * Execute the ATIF_FUNCTION_GET_SYSTEM_PARAMETERS ATIF function > * to determine if a notifier is used and if so which one > @@ -304,7 +302,7 @@ static int amdgpu_atif_get_notification_params(struct amdgpu_atif *atif) > /** > * amdgpu_atif_query_backlight_caps - get min and max backlight input signal > * > - * @handle: acpi handle > + * @atif: acpi handle > * > * Execute the QUERY_BRIGHTNESS_TRANSFER_CHARACTERISTICS ATIF function > * to determine the acceptable range of backlight values > @@ -363,7 +361,7 @@ static int amdgpu_atif_query_backlight_caps(struct amdgpu_atif *atif) > /** > * amdgpu_atif_get_sbios_requests - get requested sbios event > * > - * @handle: acpi handle > + * @atif: acpi handle > * @req: atif sbios request struct > * > * Execute the ATIF_FUNCTION_GET_SYSTEM_BIOS_REQUESTS ATIF function > @@ -899,6 +897,8 @@ void amdgpu_acpi_fini(struct amdgpu_device *adev) > /** > * amdgpu_acpi_is_s0ix_supported > * > + * @adev: amdgpu_device_pointer > + * > * returns true if supported, false if not. > */ > bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c > index 5af464933976..98d31ebad9ce 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c > @@ -111,6 +111,8 @@ static const char *amdkfd_fence_get_timeline_name(struct dma_fence *f) > * a KFD BO and schedules a job to move the BO. > * If fence is already signaled return true. > * If fence is not signaled schedule a evict KFD process work item. > + * > + * @f: dma_fence > */ > static bool amdkfd_fence_enable_signaling(struct dma_fence *f) > { > @@ -131,7 +133,7 @@ static bool amdkfd_fence_enable_signaling(struct dma_fence *f) > /** > * amdkfd_fence_release - callback that fence can be freed > * > - * @fence: fence > + * @f: dma_fence > * > * This function is called when the reference count becomes zero. > * Drops the mm_struct reference and RCU schedules freeing up the fence. > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > index b43e68fc1378..ed3014fbb563 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > @@ -719,7 +719,7 @@ static void unlock_spi_csq_mutexes(struct amdgpu_device *adev) > } > > /** > - * @get_wave_count: Read device registers to get number of waves in flight for > + * get_wave_count: Read device registers to get number of waves in flight for > * a particular queue. The method also returns the VMID associated with the > * queue. > * > @@ -755,19 +755,19 @@ static void get_wave_count(struct amdgpu_device *adev, int queue_idx, > } > > /** > - * @kgd_gfx_v9_get_cu_occupancy: Reads relevant registers associated with each > + * kgd_gfx_v9_get_cu_occupancy: Reads relevant registers associated with each > * shader engine and aggregates the number of waves that are in flight for the > * process whose pasid is provided as a parameter. The process could have ZERO > * or more queues running and submitting waves to compute units. > * > * @kgd: Handle of device from which to get number of waves in flight > * @pasid: Identifies the process for which this query call is invoked > - * @wave_cnt: Output parameter updated with number of waves in flight that > + * @pasid_wave_cnt: Output parameter updated with number of waves in flight that > * belong to process with given pasid > * @max_waves_per_cu: Output parameter updated with maximum number of waves > * possible per Compute Unit > * > - * @note: It's possible that the device has too many queues (oversubscription) > + * Note: It's possible that the device has too many queues (oversubscription) > * in which case a VMID could be remapped to a different PASID. This could lead > * to an iaccurate wave count. Following is a high-level sequence: > * Time T1: vmid = getVmid(); vmid is associated with Pasid P1

5 years, 2 months

[PATCH] drivers: i2c: i2c-core-smbus.c: Fix alignment of comment

by Shubhankar Kuranagatti

Multi line comment have been aligned starting with a * The closing */ has been shifted to a new line. Single space replaced with tab space This is done to maintain code uniformity. Signed-off-by: Shubhankar Kuranagatti <shubhankarvk(a)gmail.com> --- drivers/i2c/i2c-core-smbus.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/i2c-core-smbus.c b/drivers/i2c/i2c-core-smbus.c index d2d32c0fd8c3..205750518c21 100644 --- a/drivers/i2c/i2c-core-smbus.c +++ b/drivers/i2c/i2c-core-smbus.c @@ -66,10 +66,11 @@ static inline void i2c_smbus_add_pec(struct i2c_msg *msg) } /* Return <0 on CRC error - If there was a write before this read (most cases) we need to take the - partial CRC from the write part into account. - Note that this function does modify the message (we need to decrease the - message length to hide the CRC byte from the caller). */ + * If there was a write before this read (most cases) we need to take the + * partial CRC from the write part into account. + * Note that this function does modify the message (we need to decrease the + * message length to hide the CRC byte from the caller). + */ static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg) { u8 rpec = msg->buf[--msg->len]; @@ -113,7 +114,7 @@ EXPORT_SYMBOL(i2c_smbus_read_byte); s32 i2c_smbus_write_byte(const struct i2c_client *client, u8 value) { return i2c_smbus_xfer(client->adapter, client->addr, client->flags, - I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL); + I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL); } EXPORT_SYMBOL(i2c_smbus_write_byte); @@ -387,7 +388,8 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr, if (read_write == I2C_SMBUS_READ) { msg[1].flags |= I2C_M_RECV_LEN; msg[1].len = 1; /* block length will be added by - the underlying bus driver */ + * the underlying bus driver + */ i2c_smbus_try_get_dmabuf(&msg[1], 0); } else { msg[0].len = data->block[0] + 2; @@ -418,7 +420,8 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr, msg[1].flags |= I2C_M_RECV_LEN; msg[1].len = 1; /* block length will be added by - the underlying bus driver */ + * the underlying bus driver + */ i2c_smbus_try_get_dmabuf(&msg[1], 0); break; case I2C_SMBUS_I2C_BLOCK_DATA: -- 2.17.1

5 years, 2 months

[PATCH] drm/msm: Do not unpin/evict exported dma-buf's

by Rob Clark

From: Rob Clark <robdclark(a)chromium.org> Our initial logic for excluding dma-bufs was not quite right. In particular we want msm_gem_get/put_pages() path used for exported dma-bufs to increment/decrement the pin-count. Also, in case the importer is vmap'ing the dma-buf, we need to be sure to update the object's status, because it is now no longer potentially evictable. Fixes: 63f17ef83428 drm/msm: Support evicting GEM objects to swap Signed-off-by: Rob Clark <robdclark(a)chromium.org> --- drivers/gpu/drm/msm/msm_gem.c | 16 +++++++++++++++- drivers/gpu/drm/msm/msm_gem.h | 4 ++-- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index 09ef4ec6eb34..17f85d2f23ab 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -190,13 +190,25 @@ struct page **msm_gem_get_pages(struct drm_gem_object *obj) } p = get_pages(obj); + + if (!IS_ERR(p)) { + msm_obj->pin_count++; + update_inactive(msm_obj); + } + msm_gem_unlock(obj); return p; } void msm_gem_put_pages(struct drm_gem_object *obj) { - /* when we start tracking the pin count, then do something here */ + struct msm_gem_object *msm_obj = to_msm_bo(obj); + + msm_gem_lock(obj); + msm_obj->pin_count--; + GEM_WARN_ON(msm_obj->pin_count < 0); + update_inactive(msm_obj); + msm_gem_unlock(obj); } int msm_gem_mmap_obj(struct drm_gem_object *obj, @@ -646,6 +658,8 @@ static void *get_vaddr(struct drm_gem_object *obj, unsigned madv) ret = -ENOMEM; goto fail; } + + update_inactive(msm_obj); } return msm_obj->vaddr; diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 1b519fcd8418..66fb40b87122 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -228,7 +228,7 @@ static inline bool is_active(struct msm_gem_object *msm_obj) /* imported/exported objects are not purgeable: */ static inline bool is_unpurgeable(struct msm_gem_object *msm_obj) { - return msm_obj->base.dma_buf && msm_obj->base.import_attach; + return msm_obj->base.import_attach || msm_obj->pin_count; } static inline bool is_purgeable(struct msm_gem_object *msm_obj) @@ -278,7 +278,7 @@ static inline void mark_unpurgeable(struct msm_gem_object *msm_obj) static inline bool is_unevictable(struct msm_gem_object *msm_obj) { - return is_unpurgeable(msm_obj) || msm_obj->pin_count || msm_obj->vaddr; + return is_unpurgeable(msm_obj) || msm_obj->vaddr; } static inline void mark_evictable(struct msm_gem_object *msm_obj) -- 2.30.2

5 years, 2 months

Re: [Linaro-mm-sig] [PATCH] ASoC: fsl: imx-pcm-dma: Don't request dma channel in probe

by Lucas Stach

Am Mittwoch, dem 21.04.2021 um 14:54 +0000 schrieb Robin Gong: > On 20201/04/20 22:01 Lucas Stach <l.stach(a)pengutronix.de> wrote: > > Am Dienstag, dem 20.04.2021 um 13:47 +0000 schrieb Robin Gong: > > > On 2021/04/19 17:46 Lucas Stach <l.stach(a)pengutronix.de> wrote: > > > > Am Montag, dem 19.04.2021 um 07:17 +0000 schrieb Robin Gong: > > > > > Hi Lucas, > > > > > > > > > > On 2021/04/14 Lucas Stach <l.stach(a)pengutronix.de> wrote: > > > > > > Hi Robin, > > > > > > > > > > > > Am Mittwoch, dem 14.04.2021 um 14:33 +0000 schrieb Robin Gong: > > > > > > > On 2020/05/20 17:43 Lucas Stach <l.stach(a)pengutronix.de> wrote: > > > > > > > > Am Mittwoch, den 20.05.2020, 16:20 +0800 schrieb Shengjiu > > Wang: > > > > > > > > > Hi > > > > > > > > > > > > > > > > > > On Tue, May 19, 2020 at 6:04 PM Lucas Stach > > > > > > > > > <l.stach(a)pengutronix.de> > > > > > > > > wrote: > > > > > > > > > > Am Dienstag, den 19.05.2020, 17:41 +0800 schrieb Shengjiu > > Wang: > > > > > > > > > > > There are two requirements that we need to move the > > > > > > > > > > > request of dma channel from probe to open. > > > > > > > > > > > > > > > > > > > > How do you handle -EPROBE_DEFER return code from the > > > > > > > > > > channel request if you don't do it in probe? > > > > > > > > > > > > > > > > > > I use the dma_request_slave_channel or dma_request_channel > > > > > > > > > instead of dmaengine_pcm_request_chan_of. so there should > > > > > > > > > be not -EPROBE_DEFER return code. > > > > > > > > > > > > > > > > This is a pretty weak argument. The dmaengine device might > > > > > > > > probe after you try to get the channel. Using a function to > > > > > > > > request the channel that doesn't allow you to handle probe > > > > > > > > deferral is IMHO a bug and should be fixed, instead of > > > > > > > > building even more assumptions on top > > > > > > of it. > > > > > > > > > > > > > > > > > > > - When dma device binds with power-domains, the power > > > > > > > > > > > will be enabled when we request dma channel. If the > > > > > > > > > > > request of dma channel happen on probe, then the > > > > > > > > > > > power-domains will be always enabled after kernel boot > > > > > > > > > > > up, which is not good for power saving, so we need > > > > > > > > > > > to move the request of dma channel to .open(); > > > > > > > > > > > > > > > > > > > > This is certainly something which could be fixed in the > > > > > > > > > > dmaengine driver. > > > > > > > > > > > > > > > > > > Dma driver always call the pm_runtime_get_sync in > > > > > > > > > device_alloc_chan_resources, the > > > > > > > > > device_alloc_chan_resources is called when channel is > > > > > > > > > requested. so power is enabled on channel > > > > > > request. > > > > > > > > > > > > > > > > So why can't you fix the dmaengine driver to do that RPM > > > > > > > > call at a later time when the channel is actually going to > > > > > > > > be used? This will allow further power savings with other > > > > > > > > slave devices than the audio > > > > PCM. > > > > > > > Hi Lucas, > > > > > > > Thanks for your suggestion. I have tried to implement > > > > > > > runtime autosuspend in fsl-edma driver on i.mx8qm/qxp with > > > > > > > delay time (2 > > > > > > > sec) for this feature as below (or you can refer to > > > > > > > drivers/dma/qcom/hidma.c), and pm_runtime_get_sync/ > > > > > > > pm_runtime_put_autosuspend in all dmaengine driver interface > > > > > > > like > > > > > > > device_alloc_chan_resources/device_prep_slave_sg/device_prep_d > > > > > > > ma_c > > > > > > > ycli > > > > > > > c/ > > > > > > > device_tx_status... > > > > > > > > > > > > > > > > > > > > > pm_runtime_use_autosuspend(fsl_chan->de > > v); > > > > > > > pm_runtime_set_autosuspend_delay(fsl_cha > > n-> > > > > dev, > > > > > > 2000); > > > > > > > > > > > > > > That could resolve this audio case since the autosuspend could > > > > > > > suspend runtime after > > > > > > > 2 seconds if there is no further dma transfer but only channel > > > > > > request(device_alloc_chan_resources). > > > > > > > But unfortunately, it cause another issue. As you know, on our > > > > > > > i.mx8qm/qxp, power domain done by scfw > > > > > > > (drivers/firmware/imx/scu-pd.c) > > > > > > over mailbox: > > > > > > > imx_sc_pd_power()->imx_scu_call_rpc()-> > > > > > > > imx_scu_ipc_write()->mbox_send_message() > > > > > > > which means have to 'waits for completion', meanwhile, some > > > > > > > driver like tty will call dmaengine interfaces in non-atomic > > > > > > > case as below, > > > > > > > > > > > > > > static int uart_write(struct tty_struct *tty, const unsigned > > > > > > > char *buf, int count) { > > > > > > > ....... > > > > > > > port = uart_port_lock(state, flags); > > > > > > > ...... > > > > > > > __uart_start(tty); //call > > > > start_tx()->dmaengine_prep_slave_sg... > > > > > > > uart_port_unlock(port, flags); > > > > > > > return ret; > > > > > > > } > > > > > > > > > > > > > > Thus dma runtime resume may happen in that timing window and > > > > > > > cause > > > > > > kernel alarm. > > > > > > > I'm not sure whether there are similar limitations on other > > > > > > > driver subsystem. But for me, It looks like the only way to > > > > > > > resolve the contradiction between tty and scu-pd (hardware > > > > > > > limitation on > > > > > > > i.mx8qm/qxp) is to give up autosuspend and keep > > > > > > > pm_runtime_get_sync > > > > > > only in device_alloc_chan_resources because request channel is a > > > > > > safe non-atomic phase. > > > > > > > Do you have any idea? Thanks in advance. > > > > > > > > > > > > If you look closely at the driver you used as an example > > > > > > (hidma.c) it looks like there is already something in there, > > > > > > which looks very much like what you need > > > > > > here: > > > > > > > > > > > > In hidma_issue_pending() the driver tries to get the device to > > > > > > runtime > > > > resume. > > > > > > If this doesn't work, maybe due to the power domain code not > > > > > > being able to be called in atomic context, the actual work of > > > > > > waking up the dma hardware and issuing the descriptor is shunted to a > > tasklet. > > > > > > > > > > > > If I'm reading this right, this is exactly what you need here to > > > > > > be able to call the dmaengine code from atomic context: try the > > > > > > rpm get and issue immediately when possible, otherwise shunt the > > > > > > work to a > > > > > > non- atomic context where you can deal with the requirements of > > scu-pd. > > > > > Yes, I can schedule_work to worker to runtime resume edma channel > > > > > by > > > > calling scu-pd. > > > > > But that means all dmaengine interfaces should be taken care, not > > > > > only > > > > > issue_pending() but also > > > > > dmaengine_terminate_all()/dmaengine_pause()/dmaengine_resume()/ > > > > > dmaengine_tx_status(). Not sure why hidma only take care > > > > > issue_pending. Maybe their user case is just for memcpy/memset so > > > > > that no further complicate case as ALSA or TTY. > > > > > Besides, for autosuspend in cyclic, we have to add > > > > > pm_runtime_get_sync into interrupt handler as qcom/bam_dma.c. but > > > > > how could resolve the scu-pd's non-atmoic limitation in interrupt > > handler? > > > > > > > > Sure, this all needs some careful analysis on how those functions > > > > are called and what to do about atomic callers, but it should be > > > > doable. I don't see any fundamental issues here. > > > > > > > > I don't see why you would ever need to wake the hardware in an > > > > interrupt handler. Surely the hardware is already awake, as it > > > > wouldn't signal an interrupt otherwise. And for the issue with > > > > scu-pd you only care about the state transition of > > > > suspended->running. If the hardware is already running/awake, the > > > > runtime pm state handling is nothing more than bumping a refcount, > > > > which is atomic safe. Putting the HW in suspend is already handled > > asynchronously in a worker, so this is also atomic safe. > > > But with autosuspend used, in corner case, may runtime suspended > > > before falling Into edma interrupt handler if timeout happen with the > > > delay value of pm_runtime_set_autosuspend_delay(). Thus, can't touch > > > any edma interrupt status register unless runtime resume edma in > > > interrupt handler while runtime resume function based on scu-pd's power > > domain may block or sleep. > > > I have a simple workaround that disable runtime suspend in > > > issue_pending worker by calling pm_runtime_forbid() and then enable > > > runtime auto suspend in dmaengine_terminate_all so that we could > > > easily regard that edma channel is always in runtime resume between > > > issue_pending and channel terminated and ignore the above interrupt > > handler/scu-pd limitation. > > > > The IRQ handler is the point where you are informed by the hardware that a > > specific operation is complete. I don't see any use-case where it would be valid > > to drop the rpm refcount to 0 before the IRQ is handled. Surely the hardware > > needs to stay awake until the currently queued operations are complete and if > > the IRQ handler is the completion point the IRQ handler is the first point in > > time where your autosuspend timer should start to run. There should never be > > a situation where the timer expiry can get between IRQ signaling and the > > handler code running. > But the timer of runtime_auto_suspend decide when enter runtime suspend rather > than hardware, while transfer data size and transfer rate on IP bus decide when the > dma interrupt happen. > But it isn't the hardware that decides to drop the rpm refcount to 0 and starting the autosuspend timer, it's the driver. > Generally, we can call pm_runtime_get_sync(fsl_chan->dev)/ > pm_runtime_mark_last_busy in interrupt handler to hope the runtime_auto_suspend > timer expiry later than interrupt coming, but if the transfer data size is larger in cyclic > and transfer rate is very slow like 115200 or lower on uart, the fix autosuspend timer > 100ms/200ms maybe not enough, hence, runtime suspend may execute meanwhile > the dma interrupt maybe triggered and caught by GIC(but interrupt handler prevent > by spin_lock_irqsave in pm_suspend_timer_fn() ), and then interrupt handler start > to run after runtime suspend. If your driver code drops the rpm refcount to 0 and starts the autosuspend timer while a cyclic transfer is still in flight this is clearly a bug. Autosuspend is not there to paper over driver bugs, but to amortize cost of actually suspending and resuming the hardware. Your driver code must still work even if the timeout is 0, i.e. the hardware is immediately suspended after you drop the rpm refcount to 0. If you still have transfers queued/in-flight the driver code must keep a rpm reference. Regards, Lucas

5 years, 2 months

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