[Linaro-mm-sig] Re: [PATCH 1/9] dt-bindings: display: Add yamls for JH7110 display subsystem

On 02/06/2023 09:40, Keith Zhao wrote:

Add bindings for JH7110 display subsystem which has a display controller verisilicon dc8200 and an HDMI interface.

Signed-off-by: Keith Zhao keith.zhao@starfivetech.com

.../display/verisilicon/starfive-hdmi.yaml | 93 +++++++++++++++ .../display/verisilicon/verisilicon-dc.yaml | 110 ++++++++++++++++++ .../display/verisilicon/verisilicon-drm.yaml | 42 +++++++ .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 7 ++ 5 files changed, 254 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/verisilicon/starfive-hdmi.yaml create mode 100644 Documentation/devicetree/bindings/display/verisilicon/verisilicon-dc.yaml create mode 100644 Documentation/devicetree/bindings/display/verisilicon/verisilicon-drm.yaml

diff --git a/Documentation/devicetree/bindings/display/verisilicon/starfive-hdmi.yaml b/Documentation/devicetree/bindings/display/verisilicon/starfive-hdmi.yaml new file mode 100644 index 000000000000..c30b7954a355 --- /dev/null +++ b/Documentation/devicetree/bindings/display/verisilicon/starfive-hdmi.yaml

Filename matching compatible.

@@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/verisilicon/starfive-hdmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#

+title: StarFive HDMI transmiter

+description:

• The StarFive SoC uses the HDMI signal transmiter based on innosilicon IP
• to generate HDMI signal from its input and transmit the signal to the screen.

+maintainers:

• • Keith Zhao keith.zhao@starfivetech.com
• • ShengYang Chen shengyang.chen@starfivetech.com

+properties:

• compatible:
• const: starfive,hdmi

Conor already commented on this.

• reg:
• minItems: 1
• interrupts:
• items:

•  - description: The HDMI hot plug detection interrupt.
  

• clocks:
• items:

•  - description: System clock of HDMI module.
  

•  - description: Mclk clock of HDMI audio.
  

•  - description: Bclk clock of HDMI audio.
  

•  - description: Pixel clock generated by HDMI module.
  

• clock-names:
• items:

•  - const: sysclk
  

•  - const: mclk
  

•  - const: bclk
  

•  - const: pclk
  

• resets:
• items:

•  - description: Reset for HDMI module.
  

• reset-names:
• items:

•  - const: hdmi_tx
  

• '#sound-dai-cells':
• const: 0
• port:
• $ref: /schemas/graph.yaml#/properties/port
• description:

•  Port node with one endpoint connected to a display connector node.
  

One port, so how do you get data? From where does it come?

+required:

• • compatible
• • reg
• • interrupts
• • clocks
• • clock-names
• • resets
• • reset-names
• • '#sound-dai-cells'
• • port

+additionalProperties: false

+examples:

• • |
• hdmi: hdmi@29590000 {

•  compatible = "starfive,hdmi";
  

•  reg = <0x29590000 0x4000>;
  

•  interrupts = <99>;
  

•  clocks = <&voutcrg 17>,
  

•           <&voutcrg 15>,
  

•           <&voutcrg 16>,
  

•           <&hdmitx0_pixelclk>;
  

•  clock-names = "sysclk", "mclk","bclk","pclk";
  

•  resets = <&voutcrg 9>;
  

•  reset-names = "hdmi_tx";
  

•  #sound-dai-cells = <0>;
  

•  hdmi_in: port {
  

•      #address-cells = <1>;
  

•      #size-cells = <0>;
  

•      hdmi_input: endpoint@0 {
  

•        reg = <0>;
  

•        remote-endpoint = <&dc_out_dpi0>;
  

Mixed up indentation.

•      };
  

•  };
  

• };

diff --git a/Documentation/devicetree/bindings/display/verisilicon/verisilicon-dc.yaml b/Documentation/devicetree/bindings/display/verisilicon/verisilicon-dc.yaml new file mode 100644 index 000000000000..1322502c4cde --- /dev/null +++ b/Documentation/devicetree/bindings/display/verisilicon/verisilicon-dc.yaml

Same problem.

@@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/verisilicon/verisilicon-dc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#

+title: StarFive display controller

+description:

• The StarFive SoC uses the display controller based on Verisilicon IP
• to transfer the image data from a video memory
• buffer to an external LCD interface.

+maintainers:

• • Keith Zhao keith.zhao@starfivetech.com
• • ShengYang Chen shengyang.chen@starfivetech.com

+properties:

• compatible:
• const: verisilicon,dc8200
• reg:
• maxItems: 3
• interrupts:
• items:

•  - description: The interrupt will be generated when DC finish one frame
  

• clocks:
• items:

•  - description: Clock for display system noc bus.
  

•  - description: Pixel clock for display channel 0.
  

•  - description: Pixel clock for display channel 1.
  

•  - description: Clock for axi interface of display controller.
  

•  - description: Core clock for display controller.
  

•  - description: Clock for ahb interface of display controller.
  

•  - description: External HDMI pixel clock.
  

•  - description: Parent clock for pixel clock
  

• clock-names:
• items:

•  - const: clk_vout_noc_disp
  

Why do you need "clk_" prefixes? Drop.

•  - const: clk_vout_pix0
  

•  - const: clk_vout_pix1
  

•  - const: clk_vout_axi
  

•  - const: clk_vout_core
  

•  - const: clk_vout_vout_ahb
  

•  - const: hdmitx0_pixel
  

•  - const: clk_vout_dc8200
  

• resets:
• items:

•  - description: Reset for axi interface of display controller.
  

•  - description: Reset for ahb interface of display controller.
  

•  - description: Core reset of display controller.
  

• reset-names:
• items:

•  - const: rst_vout_axi
  

Drop rst_

•  - const: rst_vout_ahb
  

•  - const: rst_vout_core
  

• port:
• $ref: /schemas/graph.yaml#/properties/port
• description:

•  Port node with one endpoint connected to a hdmi node.
  

Oh really? But your HDMI does not allow it! Submit DTS user of all this so we can see it.

+required:

• • compatible
• • reg
• • interrupts
• • clocks
• • clock-names
• • resets
• • reset-names
• • port

+additionalProperties: false

+examples:

• • |
• dc8200: dc8200@29400000 {

Node names should be generic. See also explanation and list of examples in DT specification: https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetre...

•  compatible = "verisilicon,dc8200";
  

•  reg = <0x29400000 0x100>,
  

•        <0x29400800 0x2000>,
  

•        <0x295B0000 0x90>;
  

Lowercase hex

•  interrupts = <95>;
  

•  clocks = <&syscrg 60>,
  

•           <&voutcrg 7>,
  

•           <&voutcrg 8>,
  

•           <&voutcrg 4>,
  

•           <&voutcrg 5>,
  

•           <&voutcrg 6>,
  

•           <&hdmitx0_pixelclk>,
  

•           <&voutcrg 1>;
  

•  clock-names = "clk_vout_noc_disp", "clk_vout_pix0", "clk_vout_pix1", "clk_vout_axi",
  

•                "clk_vout_core", "clk_vout_vout_ahb", "hdmitx0_pixel","clk_vout_dc8200";
  

•  resets = <&voutcrg 0>,
  

•           <&voutcrg 1>,
  

•           <&voutcrg 2>;
  

•  reset-names = "rst_vout_axi","rst_vout_ahb","rst_vout_core";
  

•  dc_out: port {
  

•      #address-cells = <1>;
  

•      #size-cells = <0>;
  

•      dc_out_dpi0: endpoint@0 {
  

•          reg = <0>;
  

•          remote-endpoint = <&hdmi_input>;
  

•      };
  

•  };
  

• };

diff --git a/Documentation/devicetree/bindings/display/verisilicon/verisilicon-drm.yaml b/Documentation/devicetree/bindings/display/verisilicon/verisilicon-drm.yaml new file mode 100644 index 000000000000..aed8d4af2c55 --- /dev/null +++ b/Documentation/devicetree/bindings/display/verisilicon/verisilicon-drm.yaml

Same comments

@@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/verisilicon/verisilicon-drm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#

+title: Verisilicon DRM master device

What is DRM? If Linux thingy, then it does not suit bindings.

Give it proper description of hardware.

+maintainers:

• • Keith Zhao keith.zhao@starfivetech.com
• • ShengYang Chen shengyang.chen@starfivetech.com

+description: |

Do not need '|' unless you need to preserve formatting.

• The Verisilicon DRM master device is a virtual device needed to list all

We do not describe virtual devices in bindings.

NAK.

• display controller or other display interface nodes that comprise the
• graphics subsystem.

+properties:

• compatible:
• const: verisilicon,display-subsystem
• ports:
• $ref: /schemas/types.yaml#/definitions/phandle-array

Ports is an object, not array. Drop entire property. It's just wrong.

Best regards, Krzysztof