CoreSight December 2024

coresight@lists.linaro.org

9 participants
40 discussions

Re: [PATCH v8 6/8] KVM: arm64: coresight: Give TRBE enabled state to KVM

by James Clark

On 20/12/2024 5:05 pm, Marc Zyngier wrote: > On Wed, 27 Nov 2024 10:01:23 +0000, > James Clark <james.clark(a)linaro.org> wrote: >> >> Currently in nVHE, KVM has to check if TRBE is enabled on every guest >> switch even if it was never used. Because it's a debug feature and is >> more likely to not be used than used, give KVM the TRBE buffer status to >> allow a much simpler and faster do-nothing path in the hyp. >> >> This is always called with preemption disabled except for probe/hotplug >> which gets wrapped with preempt_disable(). >> >> Protected mode disables trace regardless of TRBE (because >> guest_trfcr_el1 is always 0), which was not previously done. HAS_TRBE >> becomes redundant, but HAS_TRF is now required for this. >> >> Signed-off-by: James Clark <james.clark(a)linaro.org> >> --- >> arch/arm64/include/asm/kvm_host.h | 10 +++- >> arch/arm64/kvm/debug.c | 25 ++++++++-- >> arch/arm64/kvm/hyp/nvhe/debug-sr.c | 51 +++++++++++--------- >> drivers/hwtracing/coresight/coresight-trbe.c | 5 ++ >> 4 files changed, 65 insertions(+), 26 deletions(-) >> >> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h >> index 7e3478386351..ba251caa593b 100644 >> --- a/arch/arm64/include/asm/kvm_host.h >> +++ b/arch/arm64/include/asm/kvm_host.h >> @@ -611,7 +611,8 @@ struct cpu_sve_state { >> */ >> struct kvm_host_data { >> #define KVM_HOST_DATA_FLAG_HAS_SPE 0 >> -#define KVM_HOST_DATA_FLAG_HAS_TRBE 1 >> +#define KVM_HOST_DATA_FLAG_HAS_TRF 1 >> +#define KVM_HOST_DATA_FLAG_TRBE_ENABLED 2 >> unsigned long flags; >> >> struct kvm_cpu_context host_ctxt; >> @@ -657,6 +658,9 @@ struct kvm_host_data { >> u64 mdcr_el2; >> } host_debug_state; >> >> + /* Guest trace filter value */ >> + u64 guest_trfcr_el1; > > Guest value? Or host state while running the guest? If the former, > then this has nothing to do here. If the latter, this should be > spelled out (trfcr_in_guest?), and the comment amended. > >> + >> /* Number of programmable event counters (PMCR_EL0.N) for this CPU */ >> unsigned int nr_event_counters; >> }; >> @@ -1381,6 +1385,8 @@ static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr) >> void kvm_set_pmu_events(u64 set, struct perf_event_attr *attr); >> void kvm_clr_pmu_events(u64 clr); >> bool kvm_set_pmuserenr(u64 val); >> +void kvm_enable_trbe(void); >> +void kvm_disable_trbe(void); >> #else >> static inline void kvm_set_pmu_events(u64 set, struct perf_event_attr *attr) {} >> static inline void kvm_clr_pmu_events(u64 clr) {} >> @@ -1388,6 +1394,8 @@ static inline bool kvm_set_pmuserenr(u64 val) >> { >> return false; >> } >> +static inline void kvm_enable_trbe(void) {} >> +static inline void kvm_disable_trbe(void) {} >> #endif >> >> void kvm_vcpu_load_vhe(struct kvm_vcpu *vcpu); >> diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c >> index dd9e139dfd13..0c340ae7b5d1 100644 >> --- a/arch/arm64/kvm/debug.c >> +++ b/arch/arm64/kvm/debug.c >> @@ -314,7 +314,26 @@ void kvm_init_host_debug_data(void) >> !(read_sysreg_s(SYS_PMBIDR_EL1) & PMBIDR_EL1_P)) >> host_data_set_flag(HAS_SPE); >> >> - if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) && >> - !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P)) >> - host_data_set_flag(HAS_TRBE); >> + if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceFilt_SHIFT)) >> + host_data_set_flag(HAS_TRF); >> } >> + >> +void kvm_enable_trbe(void) >> +{ >> + if (has_vhe() || is_protected_kvm_enabled() || >> + WARN_ON_ONCE(preemptible())) >> + return; >> + >> + host_data_set_flag(TRBE_ENABLED); >> +} >> +EXPORT_SYMBOL_GPL(kvm_enable_trbe); >> + >> +void kvm_disable_trbe(void) >> +{ >> + if (has_vhe() || is_protected_kvm_enabled() || >> + WARN_ON_ONCE(preemptible())) >> + return; >> + >> + host_data_clear_flag(TRBE_ENABLED); >> +} >> +EXPORT_SYMBOL_GPL(kvm_disable_trbe); >> diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/debug-sr.c >> index 858bb38e273f..9479bee41801 100644 >> --- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c >> +++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c >> @@ -51,32 +51,39 @@ static void __debug_restore_spe(u64 pmscr_el1) >> write_sysreg_el1(pmscr_el1, SYS_PMSCR); >> } >> >> -static void __debug_save_trace(u64 *trfcr_el1) >> +static void __trace_do_switch(u64 *saved_trfcr, u64 new_trfcr) >> { >> - *trfcr_el1 = 0; >> + *saved_trfcr = read_sysreg_el1(SYS_TRFCR); >> + write_sysreg_el1(new_trfcr, SYS_TRFCR); >> >> - /* Check if the TRBE is enabled */ >> - if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E)) >> + /* No need to drain if going to an enabled state or from disabled state */ >> + if (new_trfcr || !*saved_trfcr) > > What if TRFCR_EL1.TS is set to something non-zero? I'd rather you > check for the E*TRE bits instead of assuming things. > Yeah it's probably better that way. TS is actually always set when any tracing session starts and then never cleared, so doing it the simpler way made it always flush even after tracing finished, which probably wasn't great. >> return; >> - /* >> - * Prohibit trace generation while we are in guest. >> - * Since access to TRFCR_EL1 is trapped, the guest can't >> - * modify the filtering set by the host. >> - */ >> - *trfcr_el1 = read_sysreg_el1(SYS_TRFCR); >> - write_sysreg_el1(0, SYS_TRFCR); >> + >> isb(); >> - /* Drain the trace buffer to memory */ >> tsb_csync(); >> } >> >> -static void __debug_restore_trace(u64 trfcr_el1) >> +static bool __trace_needs_switch(void) >> { >> - if (!trfcr_el1) >> - return; >> + return host_data_test_flag(TRBE_ENABLED) || >> + (is_protected_kvm_enabled() && host_data_test_flag(HAS_TRF)); >> +} >> >> - /* Restore trace filter controls */ >> - write_sysreg_el1(trfcr_el1, SYS_TRFCR); >> +static void __trace_switch_to_guest(void) >> +{ >> + /* Unsupported with TRBE so disable */ >> + if (host_data_test_flag(TRBE_ENABLED)) >> + *host_data_ptr(guest_trfcr_el1) = 0; >> + >> + __trace_do_switch(host_data_ptr(host_debug_state.trfcr_el1), >> + *host_data_ptr(guest_trfcr_el1)); >> +} >> + >> +static void __trace_switch_to_host(void) >> +{ >> + __trace_do_switch(host_data_ptr(guest_trfcr_el1), >> + *host_data_ptr(host_debug_state.trfcr_el1)); >> } >> >> void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu) >> @@ -84,9 +91,9 @@ void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu) >> /* Disable and flush SPE data generation */ >> if (host_data_test_flag(HAS_SPE)) >> __debug_save_spe(host_data_ptr(host_debug_state.pmscr_el1)); >> - /* Disable and flush Self-Hosted Trace generation */ >> - if (host_data_test_flag(HAS_TRBE)) >> - __debug_save_trace(host_data_ptr(host_debug_state.trfcr_el1)); >> + >> + if (__trace_needs_switch()) >> + __trace_switch_to_guest(); >> } >> >> void __debug_switch_to_guest(struct kvm_vcpu *vcpu) >> @@ -98,8 +105,8 @@ void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu) >> { >> if (host_data_test_flag(HAS_SPE)) >> __debug_restore_spe(*host_data_ptr(host_debug_state.pmscr_el1)); >> - if (host_data_test_flag(HAS_TRBE)) >> - __debug_restore_trace(*host_data_ptr(host_debug_state.trfcr_el1)); >> + if (__trace_needs_switch()) >> + __trace_switch_to_host(); >> } >> >> void __debug_switch_to_host(struct kvm_vcpu *vcpu) >> diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c >> index 96a32b213669..9c0f8c43e6fe 100644 >> --- a/drivers/hwtracing/coresight/coresight-trbe.c >> +++ b/drivers/hwtracing/coresight/coresight-trbe.c >> @@ -18,6 +18,7 @@ >> #include <asm/barrier.h> >> #include <asm/cpufeature.h> >> #include <linux/vmalloc.h> >> +#include <linux/kvm_host.h> > > Ordering of include files. > >> >> #include "coresight-self-hosted-trace.h" >> #include "coresight-trbe.h" >> @@ -221,6 +222,7 @@ static inline void set_trbe_enabled(struct trbe_cpudata *cpudata, u64 trblimitr) >> */ >> trblimitr |= TRBLIMITR_EL1_E; >> write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1); >> + kvm_enable_trbe(); >> >> /* Synchronize the TRBE enable event */ >> isb(); >> @@ -239,6 +241,7 @@ static inline void set_trbe_disabled(struct trbe_cpudata *cpudata) >> */ >> trblimitr &= ~TRBLIMITR_EL1_E; >> write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1); >> + kvm_disable_trbe(); >> >> if (trbe_needs_drain_after_disable(cpudata)) >> trbe_drain_buffer(); >> @@ -253,8 +256,10 @@ static void trbe_drain_and_disable_local(struct trbe_cpudata *cpudata) >> >> static void trbe_reset_local(struct trbe_cpudata *cpudata) >> { >> + preempt_disable(); >> trbe_drain_and_disable_local(cpudata); >> write_sysreg_s(0, SYS_TRBLIMITR_EL1); >> + preempt_enable(); > > This looks terribly wrong. If you need to disable preemption here, why > doesn't the critical section cover all register accesses? Surely you > don't want to nuke another CPU's context? > > But looking at the calling sites, this makes even less sense. The two > callers of this thing mess with *per-CPU* interrupts. Dealing with > per-CPU interrupts in preemptible context is a big no-no (hint: they > start with a call to smp_processor_id()). > > So what is this supposed to ensure? > > M. > These ones are only intended to silence the WARN_ON_ONCE(preemptible()) in kvm_enable_trbe() when this is called from boot/hotplug (arm_trbe_enable_cpu()). Preemption isn't disabled, but a guest can't run at that point either. The "real" calls to kvm_enable_trbe() _are_ called from an atomic context. I think there was a previous review comment about when it was safe to call the KVM parts of this change, which is why I added the warning making sure it was always called with preemption disabled. But actually I could remove the warning and these preempt_disables() and replace them with a comment. Thanks James

1 day, 13 hours

Re: [PATCH v3 0/9] coresight: change some driver' spinlock type to raw_spinlock_t

by Suzuki K Poulose

On 20/12/2024 11:39, Yeoreum Yun wrote: > Hi Suzuki, >> On 20/12/2024 10:38, Yeoreum Yun wrote: >>> Hi Mike. >>> >>>> Notably missing is the same changes for the etm3x driver. The ETMv3.x >>>> and PTM1.x are supported by this driver, and these trace source >>>> variants are also supported in perf in the cs_etm.c code. >>> >>> But I wonder etmv3 needs to change. Because its spinlock is used only >>> via sysfs enable/disable path. >>> So, I think it doesn't need to change the lock type. >> >> ETM3 can be used in perf mode, similar to the ETM4x. >> >> So, you need to fix it as well. > > Yes. But etmv3's etmdata->spinlock doesn't used in perf path > its usage is only in sysfs interface path. > That's why I think it could skip too. Ok, which I think is a problem, since the sysfs mode could overwrite the "config" while perf is preparing the config from the event parsing. And we would need it there. So, for the time being, we can accept this series, pending other review comments and address this issue separately Suzuki > > Thanks.

1 day, 19 hours

Re: [PATCH v3 0/9] coresight: change some driver' spinlock type to raw_spinlock_t

by Suzuki K Poulose

On 20/12/2024 10:38, Yeoreum Yun wrote: > Hi Mike. > >> Notably missing is the same changes for the etm3x driver. The ETMv3.x >> and PTM1.x are supported by this driver, and these trace source >> variants are also supported in perf in the cs_etm.c code. > > But I wonder etmv3 needs to change. Because its spinlock is used only > via sysfs enable/disable path. > So, I think it doesn't need to change the lock type. ETM3 can be used in perf mode, similar to the ETM4x. So, you need to fix it as well. > >> STM is also missing, though this is not directly enabled via perf - >> but could perhaps run concurrently as it can be a target output for >> ftrace. > > Actually, I couldn't find out the path where > the STM's lock could be grabbed under other raw_spin_lock (including csdev) > If you don't mind would you let me the code path please? STM can't be used in perf mode, and as such you may skip it. Suzuki > > Thanks >> -- >> Mike Leach >> Principal Engineer, ARM Ltd. >> Manchester Design Centre. UK

1 day, 19 hours

[PATCH v6 0/2] coresight: Add label sysfs node support

by Mao Jinlong

With current design, the name of the non-cpu bounded coresight component is the device type with the number. And with 'ls' command we can get the register address of the component. But from these information, we can't know what the HW or system the component belongs to. Add label in DT and show the hw information by reading label sysfs node. cti_sys0 -> ../../../devices/platform/soc(a)0/138f0000.cti/cti_sys0 cti_sys1 -> ../../../devices/platform/soc(a)0/13900000.cti/cti_sys1 tpdm0 -> ../../../devices/platform/soc(a)0/10b0d000.tpdm/tpdm0 tpdm1 -> ../../../devices/platform/soc(a)0/10c28000.tpdm/tpdm1 tpdm2 -> ../../../devices/platform/soc(a)0/10c29000.tpdm/tpdm2 /sys/bus/coresight/devices # cat cti*/label cti_dlct_0 cti_dlct_1 cti_apss_0 cti_apss_1 cti_apss_2 Change since V5: 1. Update the kernel version of ABI files. 2. Add link of different patch versions. V5 link: https://patchwork.kernel.org/project/linux-arm-msm/cover/20241210122253.319… Change since V4: 1. Add label in DT and add label sysfs node for each coresight device. V4 link: https://patchwork.kernel.org/project/linux-arm-msm/cover/20240703122340.268… Change since V3: 1. Change device-name to arm,cs-dev-name. 2. Add arm,cs-dev-name to only CTI and sources' dt-binding. V3 link: https://patchwork.kernel.org/project/linux-arm-msm/cover/20240131082628.628… Change since V2: 1. Fix the error in coresight core. drivers/hwtracing/coresight/coresight-core.c:1775:7: error: assigning to 'char *' from 'const char *' discards qualifiers 2. Fix the warning when run dtbinding check. Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml: device-name: missing type definition V2 link: https://patchwork.kernel.org/project/linux-arm-msm/cover/20240115164252.265… Change since V1: 1. Change coresight-name to device name. 2. Add the device-name in coresight dt bindings. V1 link: https://patchwork.kernel.org/project/linux-arm-kernel/patch/20230208110716.… Mao Jinlong (2): dt-bindings: arm: Add label in the coresight components coresight: Add label sysfs node support .../testing/sysfs-bus-coresight-devices-cti | 6 ++++ .../sysfs-bus-coresight-devices-funnel | 6 ++++ .../testing/sysfs-bus-coresight-devices-tpdm | 6 ++++ .../bindings/arm/arm,coresight-cti.yaml | 6 ++++ .../arm/arm,coresight-dummy-sink.yaml | 6 ++++ .../arm/arm,coresight-dummy-source.yaml | 6 ++++ .../arm/arm,coresight-dynamic-funnel.yaml | 6 ++++ .../arm/arm,coresight-dynamic-replicator.yaml | 6 ++++ .../arm/arm,coresight-static-funnel.yaml | 6 ++++ .../arm/arm,coresight-static-replicator.yaml | 6 ++++ .../bindings/arm/arm,coresight-tmc.yaml | 6 ++++ .../bindings/arm/qcom,coresight-tpda.yaml | 6 ++++ .../bindings/arm/qcom,coresight-tpdm.yaml | 6 ++++ drivers/hwtracing/coresight/coresight-sysfs.c | 32 +++++++++++++++++++ 14 files changed, 110 insertions(+) -- 2.17.1

2 days, 14 hours

[PATCH v2] selftests: arm coresight: sysfsmode testing

by Linu Cherian

Add sysfs mode selftest for ARM Coresight hardware tracer. The test will run below sequence for all possible sinks for every trace source available on the system. 1. Enable source and sink device to start tracing in sysfs mode 3. Run a standard dd command to be traced 4. Stop tracing 5. Readback tracedata - Test case is pass if the readback of tracedata is success else failure. - In case of ETR sink, the test is run with both default buffer mode and reserved buffer mode(if available). Sample output: selftests: drivers/hwtracing/coresight: sysfs_test_trace.sh Running sysfs trace with default settings 64+0 records in 64+0 records out 67108864 bytes (67 MB, 64 MiB) copied, 0.196945 s, 341 MB/s 32+0 records in 32+0 records out 16384 bytes (16 kB, 16 KiB) copied, 0.000805288 s, 20.3 MB/s CoreSight path testing (CPU0 -> tmc_etf0): PASS Signed-off-by: Linu Cherian <lcherian(a)marvell.com> --- Changelog from v1: - Added test description in commit message suggested by Shuah - Added config dependency file suggested by Shuah - Added TARGETS as suggested by James - Skipped TPIU as suggested by James - Added Reviewed-by tag tools/testing/selftests/Makefile | 1 + .../drivers/hwtracing/coresight/Makefile | 5 + .../drivers/hwtracing/coresight/config | 7 + .../hwtracing/coresight/sysfs_test_trace.sh | 146 ++++++++++++++++++ 4 files changed, 159 insertions(+) create mode 100644 tools/testing/selftests/drivers/hwtracing/coresight/Makefile create mode 100644 tools/testing/selftests/drivers/hwtracing/coresight/config create mode 100755 tools/testing/selftests/drivers/hwtracing/coresight/sysfs_test_trace.sh diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile index 363d031a16f7..15788c32de6b 100644 --- a/tools/testing/selftests/Makefile +++ b/tools/testing/selftests/Makefile @@ -18,6 +18,7 @@ TARGETS += devices/error_logs TARGETS += devices/probe TARGETS += dmabuf-heaps TARGETS += drivers/dma-buf +TARGETS += drivers/hwtracing/coresight TARGETS += drivers/s390x/uvdevice TARGETS += drivers/net TARGETS += drivers/net/bonding diff --git a/tools/testing/selftests/drivers/hwtracing/coresight/Makefile b/tools/testing/selftests/drivers/hwtracing/coresight/Makefile new file mode 100644 index 000000000000..7dc68ae1c0a9 --- /dev/null +++ b/tools/testing/selftests/drivers/hwtracing/coresight/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + +TEST_PROGS = sysfs_test_trace.sh + +include ../../../lib.mk diff --git a/tools/testing/selftests/drivers/hwtracing/coresight/config b/tools/testing/selftests/drivers/hwtracing/coresight/config new file mode 100644 index 000000000000..47e9256957d3 --- /dev/null +++ b/tools/testing/selftests/drivers/hwtracing/coresight/config @@ -0,0 +1,7 @@ +CONFIG_CORESIGHT=y +CONFIG_CORESIGHT_LINKS_AND_SINKS=y +CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y +CONFIG_CORESIGHT_SINK_ETBV10 +CONFIG_CORESIGHT_SOURCE_ETM3X +CONFIG_CORESIGHT_SOURCE_ETM4X=y +CONFIG_CORESIGHT_TRBE=y diff --git a/tools/testing/selftests/drivers/hwtracing/coresight/sysfs_test_trace.sh b/tools/testing/selftests/drivers/hwtracing/coresight/sysfs_test_trace.sh new file mode 100755 index 000000000000..1939bbede1af --- /dev/null +++ b/tools/testing/selftests/drivers/hwtracing/coresight/sysfs_test_trace.sh @@ -0,0 +1,146 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0 +# Copyright (C) 2024 Marvell. + +# Test Arm CoreSight trace capture in sysfs mode +# Based on tools/perf/tests/shell/test_arm_coresight.sh + +glb_err=0 + +arm_cs_report() { + if [ $2 != 0 ]; then + echo "$1: FAIL" + glb_err=$2 + else + echo "$1: PASS" + fi +} + +is_device_sink() { + # If the node of "enable_sink" is existed under the device path, this + # means the device is a sink device. Need to exclude 'tpiu' since it + # doesn't have a readable file. + echo "$1" | grep -E -q -v "tpiu" + + if [ $? -eq 0 ] && [ -e "$1/enable_sink" ]; then + + return 0 + else + return 1 + fi +} + +# Configure sink for buffer mode +cfg_sink_buf_mode() { + sink_dev=$1 + mode=$2 + # Set buffer mode if supported + if [ -e "$sink_dev/buf_modes_available" ]; then + cat $sink_dev/buf_modes_available | grep -E -q $mode + if [ $? -eq 0 ]; then + echo $mode > $sink_dev/buf_mode_preferred + return 0 + fi + fi + + return 1 +} + +run_app() { + + taskset -c $1 dd if=/dev/urandom of=/dev/null bs=1M count=64 +} + +sysfs_trace() { + src_dev=$1 + sink_dev=$2 + cpu=$3 + + # Enable sink device + echo 1 > $sink_dev/enable_sink + # Enable source device + echo 1 > $src_dev/enable_source + + # Run app to be traced + run_app $cpu + + # Read back trace data + dd if=/dev/$sink_dev_name of=/tmp/tracedata + + # Verify if read is successful + err=$? + + # Disable source device + echo 0 > $src_dev/enable_source + + # Diskable sink device + echo 0 > $sink_dev/enable_sink + + arm_cs_report "CoreSight path testing (CPU$cpu -> $sink_dev_name)" $err +} + +try_sysfs_trace_resrv_buf() { + src_dev=$1 + sink_dev=$2 + cpu=$3 + + # Configure the resrved buffer mode if available + cfg_sink_buf_mode $sink_dev "resrv" + if [ $? -eq 0 ]; then + echo "Running sysfs trace with resrv buf mode" + sysfs_trace $src_dev $sink_dev $cpu + # Restore buffer mode + cfg_sink_buf_mode $sink_dev "auto" + if [ $? -eq 1 ]; then + echo "Failed to restore default buf mode" + fi + fi +} + +arm_cs_iterate_devices() { + src_dev=$1 + cpu=$3 + for cdev in $2/connections/out\:*; do + + # Skip testing if it's not a directory + ! [ -d $cdev ] && continue; + + # Read out its symbol link file name + sink_dev=`readlink -f $cdev` + + # Extract device name from path, e.g. + # sink_dev = '/sys/devices/platform/20010000.etf/tmc_etf0' + # `> sink_dev_name = 'tmc_etf0' + sink_dev_name=$(basename $sink_dev) + + if is_device_sink $sink_dev; then + # Run trace with resrv buf mode (if available) + try_sysfs_trace_resrv_buf $src_dev $sink_dev $cpu + + # Run the default mode + echo "Running sysfs trace with default settings" + sysfs_trace $src_dev $sink_dev $cpu + fi + + arm_cs_iterate_devices $src_dev $cdev $cpu + + done +} + +arm_cs_etm_traverse_path_test() { + # Iterate for every ETM device + for dev in /sys/bus/event_source/devices/cs_etm/cpu*; do + # Canonicalize the path + dev=`readlink -f $dev` + + # Find the ETM device belonging to which CPU + cpu=`cat $dev/cpu` + + # Use depth-first search (DFS) to iterate outputs + arm_cs_iterate_devices $dev $dev $cpu + done +} + +arm_cs_etm_traverse_path_test + +exit $glb_err -- 2.34.1

2 days, 16 hours

Re: [PATCH v3 0/9] coresight: change some driver' spinlock type to raw_spinlock_t

by Mike Leach

Hi, On Mon, 16 Dec 2024 at 11:50, Yeoreum Yun <yeoreum.yun(a)arm.com> wrote: > > In some coresight drivers, drvdata->spinlock can be held during __schedule() > by perf_event_task_sched_out()/in(). > > Since drvdata->spinlock type is spinlock_t and > perf_event_task_sched_out()/in() is called after acquiring rq_lock, > which is raw_spinlock_t (an unsleepable lock), > this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. > > To address this,change type drvdata->spinlock in some coresight drivers, > which can be called by perf_event_task_sched_out()/in(), > from spinlock_t to raw_spinlock_t. > > Reviewed-by: James Clark <james.clark(a)linaro.org> > > v2 to v3: > - Fix build error > > v1 to v2: > - seperate patchsets to change locktype and apply gurad API. > > Yeoreum Yun (9): > coresight: change coresight_device lock type to raw_spinlock_t > coresight-etm4x: change etmv4_drvdata spinlock type to raw_spinlock_t > coresight: change coresight_trace_id_map's lock type to > raw_spinlock_t > coresight-cti: change cti_drvdata spinlock's type to raw_spinlock_t > coresight-etb10: change etb_drvdata spinlock's type to raw_spinlock_t > coresight-funnel: change funnel_drvdata spinlock's type to > raw_spinlock_t > coresight-replicator: change replicator_drvdata spinlock's type to > raw_spinlock_t > coresight-tmc: change tmc_drvdata spinlock's type to raw_spinlock_t > coresight/ultrasoc: change cti_drvdata spinlock's type to > raw_spinlock_t > > .../hwtracing/coresight/coresight-config.c | 8 +- > .../hwtracing/coresight/coresight-config.h | 2 +- > drivers/hwtracing/coresight/coresight-core.c | 2 +- > .../hwtracing/coresight/coresight-cti-core.c | 44 +-- > .../hwtracing/coresight/coresight-cti-sysfs.c | 76 +++--- > drivers/hwtracing/coresight/coresight-cti.h | 2 +- > drivers/hwtracing/coresight/coresight-etb10.c | 26 +- > .../coresight/coresight-etm4x-core.c | 18 +- > .../coresight/coresight-etm4x-sysfs.c | 250 +++++++++--------- > drivers/hwtracing/coresight/coresight-etm4x.h | 2 +- > .../hwtracing/coresight/coresight-funnel.c | 12 +- > .../coresight/coresight-replicator.c | 12 +- > .../hwtracing/coresight/coresight-syscfg.c | 26 +- > .../hwtracing/coresight/coresight-tmc-core.c | 6 +- > .../hwtracing/coresight/coresight-tmc-etf.c | 48 ++-- > .../hwtracing/coresight/coresight-tmc-etr.c | 40 +-- > drivers/hwtracing/coresight/coresight-tmc.h | 2 +- > .../hwtracing/coresight/coresight-trace-id.c | 22 +- > drivers/hwtracing/coresight/ultrasoc-smb.c | 12 +- > drivers/hwtracing/coresight/ultrasoc-smb.h | 2 +- > include/linux/coresight.h | 4 +- > 21 files changed, 308 insertions(+), 308 deletions(-) > > -- > LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} > Notably missing is the same changes for the etm3x driver. The ETMv3.x and PTM1.x are supported by this driver, and these trace source variants are also supported in perf in the cs_etm.c code. STM is also missing, though this is not directly enabled via perf - but could perhaps run concurrently as it can be a target output for ftrace. Regards Mike -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

2 days, 18 hours

Re: [PATCH v3 7/9] coresight-replicator: change replicator_drvdata spinlock's type to raw_spinlock_t

by Mike Leach

On Mon, 16 Dec 2024 at 11:50, Yeoreum Yun <yeoreum.yun(a)arm.com> wrote: > > In coresight-replicator drivers, replicator_drvdata->spinlock can be held > during __schedule() by perf_event_task_sched_out()/in(). > > Since replicator_drvdata->spinlock type is spinlock_t and > perf_event_task_sched_out()/in() is called after acquiring rq_lock, > which is raw_spinlock_t (an unsleepable lock), > this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. > > To address this, change type replicator_drvdata->spinlock in > coresight-replicator drivers, which can be called > by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. > > Signed-off-by: Yeoreum Yun <yeoreum.yun(a)arm.com> > --- > drivers/hwtracing/coresight/coresight-replicator.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c > index 0fba87de6d1a..7d36fe2176cc 100644 > --- a/drivers/hwtracing/coresight/coresight-replicator.c > +++ b/drivers/hwtracing/coresight/coresight-replicator.c > @@ -41,7 +41,7 @@ struct replicator_drvdata { > struct clk *atclk; > struct clk *pclk; > struct coresight_device *csdev; > - spinlock_t spinlock; > + raw_spinlock_t spinlock; > bool check_idfilter_val; > }; > > @@ -125,7 +125,7 @@ static int replicator_enable(struct coresight_device *csdev, > unsigned long flags; > bool first_enable = false; > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > if (atomic_read(&out->src_refcnt) == 0) { > if (drvdata->base) > rc = dynamic_replicator_enable(drvdata, in->dest_port, > @@ -135,7 +135,7 @@ static int replicator_enable(struct coresight_device *csdev, > } > if (!rc) > atomic_inc(&out->src_refcnt); > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > > if (first_enable) > dev_dbg(&csdev->dev, "REPLICATOR enabled\n"); > @@ -179,14 +179,14 @@ static void replicator_disable(struct coresight_device *csdev, > unsigned long flags; > bool last_disable = false; > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > if (atomic_dec_return(&out->src_refcnt) == 0) { > if (drvdata->base) > dynamic_replicator_disable(drvdata, in->dest_port, > out->src_port); > last_disable = true; > } > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > > if (last_disable) > dev_dbg(&csdev->dev, "REPLICATOR disabled\n"); > @@ -277,7 +277,7 @@ static int replicator_probe(struct device *dev, struct resource *res) > } > dev->platform_data = pdata; > > - spin_lock_init(&drvdata->spinlock); > + raw_spin_lock_init(&drvdata->spinlock); > desc.type = CORESIGHT_DEV_TYPE_LINK; > desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; > desc.ops = &replicator_cs_ops; > -- > LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} > Reviewed-by: Mike Leach <mike.leach(a)linaro.org> -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

2 days, 18 hours

Re: [PATCH v3 6/9] coresight-funnel: change funnel_drvdata spinlock's type to raw_spinlock_t

by Mike Leach

On Mon, 16 Dec 2024 at 11:50, Yeoreum Yun <yeoreum.yun(a)arm.com> wrote: > > In coresight-funnel drivers, cti_drvdata->spinlock can be held > during __schedule() by perf_event_task_sched_out()/in(). > > Since funnel_drvdata->spinlock type is spinlock_t and > perf_event_task_sched_out()/in() is called after acquiring rq_lock, > which is raw_spinlock_t (an unsleepable lock), > this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. > > To address this, change type funnel_drvdata->spinlock in > coresight-funnel drivers, which can be called by > perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. > > Signed-off-by: Yeoreum Yun <yeoreum.yun(a)arm.com> > --- > drivers/hwtracing/coresight/coresight-funnel.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c > index 33efe1acbef7..a566c8854327 100644 > --- a/drivers/hwtracing/coresight/coresight-funnel.c > +++ b/drivers/hwtracing/coresight/coresight-funnel.c > @@ -47,7 +47,7 @@ struct funnel_drvdata { > struct clk *pclk; > struct coresight_device *csdev; > unsigned long priority; > - spinlock_t spinlock; > + raw_spinlock_t spinlock; > }; > > static int dynamic_funnel_enable_hw(struct funnel_drvdata *drvdata, int port) > @@ -85,7 +85,7 @@ static int funnel_enable(struct coresight_device *csdev, > unsigned long flags; > bool first_enable = false; > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > if (atomic_read(&in->dest_refcnt) == 0) { > if (drvdata->base) > rc = dynamic_funnel_enable_hw(drvdata, in->dest_port); > @@ -94,7 +94,7 @@ static int funnel_enable(struct coresight_device *csdev, > } > if (!rc) > atomic_inc(&in->dest_refcnt); > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > > if (first_enable) > dev_dbg(&csdev->dev, "FUNNEL inport %d enabled\n", > @@ -129,13 +129,13 @@ static void funnel_disable(struct coresight_device *csdev, > unsigned long flags; > bool last_disable = false; > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > if (atomic_dec_return(&in->dest_refcnt) == 0) { > if (drvdata->base) > dynamic_funnel_disable_hw(drvdata, in->dest_port); > last_disable = true; > } > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > > if (last_disable) > dev_dbg(&csdev->dev, "FUNNEL inport %d disabled\n", > @@ -266,7 +266,7 @@ static int funnel_probe(struct device *dev, struct resource *res) > } > dev->platform_data = pdata; > > - spin_lock_init(&drvdata->spinlock); > + raw_spin_lock_init(&drvdata->spinlock); > desc.type = CORESIGHT_DEV_TYPE_LINK; > desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG; > desc.ops = &funnel_cs_ops; > -- > LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} > Reviewed-by: Mike Leach <mike.leach(a)linaro.org> -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

2 days, 18 hours

Re: [PATCH v3 9/9] coresight/ultrasoc: change cti_drvdata spinlock's type to raw_spinlock_t

by Mike Leach

Title of patch - this patch has nothing to do with cti_drvdata. Mike On Mon, 16 Dec 2024 at 11:50, Yeoreum Yun <yeoreum.yun(a)arm.com> wrote: > > In ultrasoc-smb drivers, smb_drv_data->spinlock can be held > during __schedule() by perf_event_task_sched_out()/in(). > > Since smb__drv_data->spinlock type is spinlock_t and > perf_event_task_sched_out()/in() is called after acquiring rq_lock, > which is raw_spinlock_t (an unsleepable lock), > this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. > > To address this, change type smb_drv_data->spinlock in ultrasoc-smb drivers, > which can be called by perf_event_task_sched_out()/in(), > from spinlock_t to raw_spinlock_t. > > Signed-off-by: Yeoreum Yun <yeoreum.yun(a)arm.com> > --- > drivers/hwtracing/coresight/ultrasoc-smb.c | 12 ++++++------ > drivers/hwtracing/coresight/ultrasoc-smb.h | 2 +- > 2 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.c b/drivers/hwtracing/coresight/ultrasoc-smb.c > index dc3c9504dd7c..26cfc939e5bd 100644 > --- a/drivers/hwtracing/coresight/ultrasoc-smb.c > +++ b/drivers/hwtracing/coresight/ultrasoc-smb.c > @@ -98,7 +98,7 @@ static int smb_open(struct inode *inode, struct file *file) > struct smb_drv_data *drvdata = container_of(file->private_data, > struct smb_drv_data, miscdev); > > - guard(spinlock)(&drvdata->spinlock); > + guard(raw_spinlock)(&drvdata->spinlock); > > if (drvdata->reading) > return -EBUSY; > @@ -152,7 +152,7 @@ static int smb_release(struct inode *inode, struct file *file) > struct smb_drv_data *drvdata = container_of(file->private_data, > struct smb_drv_data, miscdev); > > - guard(spinlock)(&drvdata->spinlock); > + guard(raw_spinlock)(&drvdata->spinlock); > drvdata->reading = false; > > return 0; > @@ -245,7 +245,7 @@ static int smb_enable(struct coresight_device *csdev, enum cs_mode mode, > struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); > int ret = 0; > > - guard(spinlock)(&drvdata->spinlock); > + guard(raw_spinlock)(&drvdata->spinlock); > > /* Do nothing, the trace data is reading by other interface now */ > if (drvdata->reading) > @@ -280,7 +280,7 @@ static int smb_disable(struct coresight_device *csdev) > { > struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent); > > - guard(spinlock)(&drvdata->spinlock); > + guard(raw_spinlock)(&drvdata->spinlock); > > if (drvdata->reading) > return -EBUSY; > @@ -378,7 +378,7 @@ static unsigned long smb_update_buffer(struct coresight_device *csdev, > if (!buf) > return 0; > > - guard(spinlock)(&drvdata->spinlock); > + guard(raw_spinlock)(&drvdata->spinlock); > > /* Don't do anything if another tracer is using this sink. */ > if (csdev->refcnt != 1) > @@ -563,7 +563,7 @@ static int smb_probe(struct platform_device *pdev) > > smb_reset_buffer(drvdata); > platform_set_drvdata(pdev, drvdata); > - spin_lock_init(&drvdata->spinlock); > + raw_spin_lock_init(&drvdata->spinlock); > drvdata->pid = -1; > > ret = smb_register_sink(pdev, drvdata); > diff --git a/drivers/hwtracing/coresight/ultrasoc-smb.h b/drivers/hwtracing/coresight/ultrasoc-smb.h > index a91d39cfccb8..c4c111275627 100644 > --- a/drivers/hwtracing/coresight/ultrasoc-smb.h > +++ b/drivers/hwtracing/coresight/ultrasoc-smb.h > @@ -115,7 +115,7 @@ struct smb_drv_data { > struct coresight_device *csdev; > struct smb_data_buffer sdb; > struct miscdevice miscdev; > - spinlock_t spinlock; > + raw_spinlock_t spinlock; > bool reading; > pid_t pid; > }; > -- > LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} > -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

2 days, 18 hours

Re: [PATCH v3 5/9] coresight-etb10: change etb_drvdata spinlock's type to raw_spinlock_t

by Mike Leach

On Mon, 16 Dec 2024 at 11:50, Yeoreum Yun <yeoreum.yun(a)arm.com> wrote: > > In coresight-etb10 drivers, etb_drvdata->spinlock can be held > during __schedule() by perf_event_task_sched_out()/in(). > > Since etb_drvdata->spinlock type is spinlock_t and > perf_event_task_sched_out()/in() is called after acquiring rq_lock, > which is raw_spinlock_t (an unsleepable lock), > this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. > > To address this, change type etb_drvdata->spinlock in coresight-etb10 drivers, > which can be called by perf_event_task_sched_out()/in(), > from spinlock_t to raw_spinlock_t. > > Signed-off-by: Yeoreum Yun <yeoreum.yun(a)arm.com> > --- > drivers/hwtracing/coresight/coresight-etb10.c | 26 +++++++++---------- > 1 file changed, 13 insertions(+), 13 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c > index aea9ac9c4bd0..7948597d483d 100644 > --- a/drivers/hwtracing/coresight/coresight-etb10.c > +++ b/drivers/hwtracing/coresight/coresight-etb10.c > @@ -84,7 +84,7 @@ struct etb_drvdata { > struct clk *atclk; > struct coresight_device *csdev; > struct miscdevice miscdev; > - spinlock_t spinlock; > + raw_spinlock_t spinlock; > local_t reading; > pid_t pid; > u8 *buf; > @@ -145,7 +145,7 @@ static int etb_enable_sysfs(struct coresight_device *csdev) > unsigned long flags; > struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > > /* Don't messup with perf sessions. */ > if (coresight_get_mode(csdev) == CS_MODE_PERF) { > @@ -163,7 +163,7 @@ static int etb_enable_sysfs(struct coresight_device *csdev) > > csdev->refcnt++; > out: > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > return ret; > } > > @@ -176,7 +176,7 @@ static int etb_enable_perf(struct coresight_device *csdev, void *data) > struct perf_output_handle *handle = data; > struct cs_buffers *buf = etm_perf_sink_config(handle); > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > > /* No need to continue if the component is already in used by sysFS. */ > if (coresight_get_mode(drvdata->csdev) == CS_MODE_SYSFS) { > @@ -219,7 +219,7 @@ static int etb_enable_perf(struct coresight_device *csdev, void *data) > } > > out: > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > return ret; > } > > @@ -352,11 +352,11 @@ static int etb_disable(struct coresight_device *csdev) > struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); > unsigned long flags; > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > > csdev->refcnt--; > if (csdev->refcnt) { > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > return -EBUSY; > } > > @@ -366,7 +366,7 @@ static int etb_disable(struct coresight_device *csdev) > /* Dissociate from monitored process. */ > drvdata->pid = -1; > coresight_set_mode(csdev, CS_MODE_DISABLED); > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > > dev_dbg(&csdev->dev, "ETB disabled\n"); > return 0; > @@ -443,7 +443,7 @@ static unsigned long etb_update_buffer(struct coresight_device *csdev, > > capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS; > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > > /* Don't do anything if another tracer is using this sink */ > if (csdev->refcnt != 1) > @@ -566,7 +566,7 @@ static unsigned long etb_update_buffer(struct coresight_device *csdev, > __etb_enable_hw(drvdata); > CS_LOCK(drvdata->base); > out: > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > > return to_read; > } > @@ -587,13 +587,13 @@ static void etb_dump(struct etb_drvdata *drvdata) > { > unsigned long flags; > > - spin_lock_irqsave(&drvdata->spinlock, flags); > + raw_spin_lock_irqsave(&drvdata->spinlock, flags); > if (coresight_get_mode(drvdata->csdev) == CS_MODE_SYSFS) { > __etb_disable_hw(drvdata); > etb_dump_hw(drvdata); > __etb_enable_hw(drvdata); > } > - spin_unlock_irqrestore(&drvdata->spinlock, flags); > + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); > > dev_dbg(&drvdata->csdev->dev, "ETB dumped\n"); > } > @@ -746,7 +746,7 @@ static int etb_probe(struct amba_device *adev, const struct amba_id *id) > drvdata->base = base; > desc.access = CSDEV_ACCESS_IOMEM(base); > > - spin_lock_init(&drvdata->spinlock); > + raw_spin_lock_init(&drvdata->spinlock); > > drvdata->buffer_depth = etb_get_buffer_depth(drvdata); > > -- > LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} > Reviewed-by: Mike Leach <mike.leach(a)linaro.org> -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

2 days, 18 hours

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

CoreSight December 2024