CoreSight

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2845 discussions

[PATCH 0/6] perf: cs-etm: HW_ID improvements

by James Clark

The driver might not always be able to write HW_IDs, but we don't need them for unformatted mode anyway, so fix that in commit ("perf cs-etm: Synthesize missing HW_ID mappings for raw trace"). At the same time, give the driver another chance to send them in commit ("coresight: perf: Retry failed HW_ID writes"). The other commits are semi-related improvements and fixes. ("perf: cs-etm: Respect --no-itrace option") makes debugging broken Coresight perf.data files easier. Applies on top of "[PATCH v2 00/14] perf cs-etm: Per-thread mode fixes and snapshot wrap support" Signed-off-by: James Clark <james.clark(a)linaro.org> --- James Clark (5): perf: cs-etm: Don't add global v0 HW_IDs to unformatted queues perf cs-etm: Free partially created queues perf: cs-etm: Respect --no-itrace option perf/core: Return errors from perf_report_aux_output_id() coresight: perf: Retry failed HW_ID writes Leo Yan (1): perf cs-etm: Synthesize missing HW_ID mappings for raw trace drivers/hwtracing/coresight/coresight-etm-perf.c | 52 +++++---- include/linux/perf_event.h | 2 +- kernel/events/core.c | 6 +- tools/perf/util/auxtrace.c | 2 +- tools/perf/util/auxtrace.h | 1 + tools/perf/util/cs-etm.c | 143 ++++++++++++++++------- 6 files changed, 139 insertions(+), 67 deletions(-) --- base-commit: 78148c85297024ffe7a709acb7cc4fc907271176 change-id: 20260706-james-cs-hw_id-output-failure-1d06d042ef96 prerequisite-change-id: 20260605-james-cs-unformatted-per-thread-fix-50e723aa7f0e:v2 prerequisite-patch-id: 1aa32269a3a7dc76840dd8a24cb5a8715507e898 prerequisite-patch-id: ef471f468351462f67efa58a09a3461306ac5a0a prerequisite-patch-id: c78946cf4ec1c7722570865403a3562625bdaa33 prerequisite-patch-id: 0b953eee0252db3c7ba3ef1e3397048a94482ca2 prerequisite-patch-id: 27da72c2f01bcc68205bbcc14d5019369c02cb83 prerequisite-patch-id: 365c6d5f71c754e4c690b5ebed3453565bb5b809 prerequisite-patch-id: 64e9419a41082a2db3daf255baf0fb40efbae5dd prerequisite-patch-id: 1dc2e6ef8e76b369736b4c88560302861b2e4faf prerequisite-patch-id: b7de38ec4d90f5b45d56390a4e5919a1d6439951 prerequisite-patch-id: 3548d5b161cfb8c11a166ca2b3228ca4821f1ca0 prerequisite-patch-id: 97e66600218a2b32e5b21d0abcb6321590f98de9 prerequisite-patch-id: 292282b20bd8ad7d096ee7ffbc55dcfb75455f53 prerequisite-patch-id: c80259b47850ba65c985c85a29c8cf4948463d59 Best regards, -- James Clark <james.clark(a)linaro.org>

1 week

Re: [PATCH] coresight: fix typos in comments

by Leo Yan

On Fri, Sep 04, 2026 at 04:40:51PM +0530, Hemanth Selam wrote: > Fix typos in comments, reported by scripts/checkpatch.pl using the > misspelling list in scripts/spelling.txt. Only touches comments, no code > changes. > > Assisted-by: Cursor:claude-opus-5 > Signed-off-by: Hemanth Selam <hemanth.selam(a)gmail.com> Reviewed-by: Leo Yan <leo.yan(a)arm.com>

1 week

Re: [PATCH] docs: fix typos in Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x

by Leo Yan

On Fri, Sep 04, 2026 at 09:49:42AM +0530, tspamiitesh(a)gmail.com wrote: [...] > -Description: (RW) Enable/disable tracing on this specific trace entiry. > +Description: (RW) Enable/disable tracing on this specific trace entry. > Enabling a source implies the source has been configured > - properly and a sink has been identidifed for it. The path > + properly and a sink has been indentified for it. The path s/indentified/identified ?

1 week

Re: [PATCH v2] coresight: tnoc: fix trace ID path assignment failure on non-AMBA tnoc

by Leo Yan

On Wed, Sep 02, 2026 at 05:41:43PM +0800, Jie Gan wrote: > For a tnoc device not on the AMBA bus, atid was set to -EOPNOTSUPP. > trace_noc_id() returns this value directly to > coresight_path_assign_trace_id(), which only treats a literal 0 > return as "this device has no ID, keep searching the path" - > any other value is checked against IS_VALID_CS_TRACE_ID() and > rejected. A negative atid therefore made path assignment fail with > -EINVAL instead of falling through to the next device in the path > that could supply a valid trace ID. > > Use 0, the same sentinel coresight_path_assign_trace_id() already > recognizes as "not allocated", instead of -EOPNOTSUPP. > > Fixes: 5799dee92dc2 ("coresight-tnoc: add platform driver to support Interconnect TNOC") > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> Reviewed-by: Leo Yan <leo.yan(a)arm.com>

1 week, 2 days

Re: [PATCH] coresight: fix trace ID search skipping pass-through NoC devices

by Leo Yan

On Wed, Sep 02, 2026 at 04:35:11PM +0800, Jie Gan wrote: [...] > Hi Leo, > > Thanks for the suggestion. You're welcome! > I will fix this in the TNOC driver. I agree that there is no need to use > additional error codes to report the failure. > > I will post the new fix patch after below patch[1] to be applied to avoid > conflict. The patch in the link has no fix tag, but current patch is a simple fix. I'd suggest to give priority this patch - this is friendly for porting to stable kernels. If there have dependency (based on your local test), you could explictly mention the dependency in cover letter and resend the tnoc probe series. Thanks, Leo > [1] https://lore.kernel.org/all/20260710-fix-tracenoc-probe-issue-v6-2-41eb36fe…

1 week, 2 days

Re: [PATCH] coresight: fix trace ID search skipping pass-through NoC devices

by Leo Yan

Hi Jie, On Mon, Aug 17, 2026 at 04:50:15PM +0800, Jie Gan wrote: [...] > @@ -953,8 +953,12 @@ int coresight_path_assign_trace_id(struct coresight_path *path, > /* Assign a trace ID to the path for the first device that wants to do it */ > trace_id = coresight_get_trace_id(nd->csdev, mode, sink); > > - /* 0 means the device has no ID assignment, so keep searching */ > - if (trace_id == 0) > + /* > + * 0 means the device has no ID assignment, and -EOPNOTSUPP > + * means the device explicitly declines to assign one (e.g. a > + * pass-through NoC) - in both cases keep searching downstream. > + */ > + if (trace_id == 0 || trace_id == -EOPNOTSUPP) > continue; Based on IS_VALID_CS_TRACE_ID(), I see 0 is for no ID assignment, could you improve a bit tnoc.c instead? If so, We don't need to add a new error for the same purpose. ---8<--- diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c index 9e8de4323d28..bf221c1e5c48 100644 --- a/drivers/hwtracing/coresight/coresight-tnoc.c +++ b/drivers/hwtracing/coresight/coresight-tnoc.c @@ -51,8 +51,8 @@ static void trace_noc_enable_hw(struct trace_noc_drvdata *drvdata) { u32 val; - /* No valid ATID, simply enable the unit */ - if (drvdata->atid == -EOPNOTSUPP) { + /* 0 means no ID assignment, simply enable the unit */ + if (!drvdata->atid) { writel(TRACE_NOC_CTRL_PORTEN, drvdata->base + TRACE_NOC_CTRL); return; } @@ -130,10 +130,8 @@ static int trace_noc_init_default_data(struct trace_noc_drvdata *drvdata) { int atid; - if (!dev_is_amba(drvdata->dev)) { - drvdata->atid = -EOPNOTSUPP; + if (!dev_is_amba(drvdata->dev)) return 0; - } atid = coresight_trace_id_get_system_id(); if (atid < 0)

1 week, 2 days

Re: [PATCH 2/2] perf: arm_spe: Prefer large AUX mappings

by Leo Yan

On Mon, Aug 10, 2026 at 04:10:48PM +0100, Will Deacon wrote: > On Mon, Aug 10, 2026 at 03:44:42PM +0100, Leo Yan wrote: > > Commit 18049c8cff9c ("perf/aux: Allocate non-contiguous AUX pages by > > default") made the AUX allocator use order-0 pages by default unless a > > PMU explicitly asks for contiguous allocations. > > But that commit specifically calls out SPE as benefitting from > non-contiguous pages: > > "For instance, ARM SPE and TRBE operate with virtual pages, and > Coresight ETR allocates a separate buffer. For these PMUs, > allocating contiguous AUX pages unnecessarily exacerbates memory > fragmentation. This fragmentation can prevent their use on > long-running devices." > > so why doesn't passing PERF_PMU_CAP_AUX_PREFER_LARGE reintroduce the > problems that 18049c8cff9c was trying to solve? The question is how "allocating contiguous AUX pages unnecessarily exacerbates memory fragmentation." The relevant information I could find is [1]: "On Android, we collect ETM data periodically on internal user devices for AutoFDO optimization (for both userspace libraries and the kernel). Allocating a large chunk of contiguous AUX pages (4M for each CPU) periodically is almost unbearable. The kernel may need to kill many processes to fulfill the request. It affects user experience even after using PMU." We might have missed chance to clarify how the fragmentation issue occurs in the first place. Let's say, a phone with 8 CPUs, allocating 4MB per CPU requires 32MB in total, which is a relatively small portion of 4GiB or 8GiB of RAM commonly found in phones. Moreover, once contiguous pages are freed, the buddy allocator can coalesce them again into buddy list. It is not obvious to me that PREFER_LARGE directly causes fragmentation. One case where AUX allocation could exacerbate fragmentation is when the system is already fragmented. If a high-order allocation fails and the allocator falls back to smaller-order blocks, those allocations may consume free blocks scattered across different buddy regions and make subsequent high-order allocations more difficult. If this is the main concern, I'd suggest using a smaller AUX buffer (e.g. 1MB or even 512KB) for TRBE/SPE to reduce memory pressure. Snapshot mode '-S' could also be considered, as it allows the buffer to be allocated once and reused for subsequent recordings by signals. OTOH, using only order-0 pages can significantly increase TTW overhead on the trace path and lead to overflows, we observe this causes huge trace discontinuity. In the end, we need to trace-off the fragmentation concern against the trace discontinuity. Thanks, Leo [1] https://lore.kernel.org/lkml/CALJ9ZPNLgEBxOmDim-vztUknEETwdL-Z2gJ8K9s44TiPg…

1 week, 3 days

Re: [PATCH v4] coresight: coresight.h: add '*' to kernel-doc lines

by Leo Yan

On Sun, Aug 30, 2026 at 08:09:12PM -0700, Randy Dunlap wrote: > kernel-doc reports 2 (kernel-doc) lines in coresight.h that don't have > a beginning '*' in them, so fix these lines. > > Also convert struct coresight_trace_id_map to kernel-doc format to > remove another warning. > > Warning: include/linux/coresight.h:173 bad line: > connected to @src_port. NULL until the device is created > Warning: include/linux/coresight.h:177 bad line: > needs to be filtered. > Warning: include/linux/coresight.h:236 This comment starts with '/**', > but isn't a kernel-doc comment. > > Fixes: ec9903d6cc34 ("coresight: Add support for trace filtering by source") > Fixes: d49c9cf15f89 ("coresight: Rename connection members to make the direction explicit") > Signed-off-by: Randy Dunlap <rdunlap(a)infradead.org> Reviewed-by: Leo Yan <leo.yan(a)arm.com>

1 week, 3 days

[PATCH 0/3] perf: Suppress redundant ITRACE start records for Arm SPE and CoreSight

by Leo Yan

Thanks to Tamas Petz for noticing that Arm CoreSight perf data can contain many PERF_RECORD_ITRACE_START records. PERF_RECORD_ITRACE_START provides the decoder with the initial thread context when that information is absent from the trace stream. Once tracing has started, Arm SPE and CoreSight decoders track subsequent context changes using context packets or recorded sched_switch events. Have both drivers call perf_event_itrace_started() after successfully starting event. This prevents perf core from emitting redundant PERF_RECORD_ITRACE_START records when an event is scheduled in again. Since the Arm SPE and CoreSight drivers can be built as modules, export perf_event_itrace_started() before using it in those drivers. This series was verified with Arm CoreSight using the commands below. The perf data contains 100 sched_switch events but only one PERF_RECORD_ITRACE_START record: taskset -c 2 perf record -e cs_etm//u -e sched:sched_switch -- \ taskset -c 2 bash -c 'while true; do sleep 0.01; done' ^C perf script -D 2>&1 | grep -c sched_switch 100 perf script -D 2>&1 | grep -c PERF_RECORD_ITRACE_START 1 Signed-off-by: Leo Yan <leo.yan(a)arm.com> --- Leo Yan (3): perf/core: Export perf_event_itrace_started() perf: arm_spe: Suppress redundant ITRACE start records coresight: perf: Suppress ITRACE start records drivers/hwtracing/coresight/coresight-etm-perf.c | 2 ++ drivers/perf/arm_spe_pmu.c | 2 ++ kernel/events/core.c | 1 + 3 files changed, 5 insertions(+) --- base-commit: 786262be6048deab760f68c8acc2c85607165894 change-id: 20260901-perf_suppress_itrace_start_records-42faf45e9ce9 Best regards, -- Leo Yan <leo.yan(a)arm.com>

1 week, 3 days

[PATCH v2 00/14] perf cs-etm: Per-thread mode fixes and snapshot wrap support

by James Clark

Fix a few issues with per-thread mode: - With TRBE, thread migrations hit a queue without a decoder assert - On nVHE, everything looks like guest trace instead of host - Tracing multiple threads didn't really work After adding a tests for those, it turns out there were some snapshot bugs not picked up by the other snapshot tests. That showed that the different snapshot searches for Intel BTS and Arm SPE were inconsistent and I think all tracers can benefit from using the same pointer fixup logic, so that gets refactored into the common auxtrace.c. Then SPE can just share the Intel BTS search as it was obviously copied from it originally. IntelPT keeps the more advanced duplicate data search, but in the future that could probably be made the common one and all tracers would benefit from using it (except maybe BTS if it always has a very small buffer, but I doubt the overhead of the duplicate search would be an issue). For now this is more of a refactor rather than behavioral change so don't do that yet. Signed-off-by: James Clark <james.clark(a)linaro.org> --- Changes in v2: - Remove stale "may be reset to -1 in per-thread mode" comment - Set CPU when queueing auxtrace fragments otherwise auxtrace_queues__add_event() overwrites the queue's CPU - Link to v1: https://patch.msgid.link/20260811-james-cs-unformatted-per-thread-fix-v1-0-… --- James Clark (14): perf cs-etm: Fix nVHE per-thread decoding perf cs-etm: Warn for invalid timestamp option perf cs-etm: Turn on context packet timestamps in per-thread mode perf cs-etm: Use per-CPU queues for per-thread mode perf cs-etm: Increase default timestamp generation period perf auxtrace: Turn Intel BTS snapshot search into a generic one perf arm-spe: Use generic snapshot search perf auxtrace: intel-pt: Use new snapshot_has_wrapped callback perf cs-etm: Queue partial AUX records perf cs-etm: Don't print missing buffers in snapshot mode perf auxtrace: cs-etm: Capture wrapped snapshots perf test: Allow infinite named_thread loops perf test: Add test for per-thread mode perf cs-etm: Test multiple per-thread threads Documentation/userspace-api/perf_ring_buffer.rst | 6 +- tools/perf/Documentation/perf-test.txt | 2 +- tools/perf/arch/arm/util/cs-etm.c | 30 ++++- tools/perf/arch/arm64/util/arm-spe.c | 147 +-------------------- tools/perf/arch/x86/util/intel-bts.c | 115 +--------------- tools/perf/arch/x86/util/intel-pt.c | 58 +++----- .../perf/tests/shell/coresight/per-thread-multi.sh | 78 +++++++++++ tools/perf/tests/shell/coresight/per-thread.sh | 48 +++++++ .../perf/tests/shell/coresight/raw_dump_stress.sh | 5 - tools/perf/tests/workloads/named_threads.c | 7 +- tools/perf/util/auxtrace.c | 136 +++++++++++++++++-- tools/perf/util/auxtrace.h | 20 ++- tools/perf/util/cs-etm.c | 101 ++++++++++---- 13 files changed, 384 insertions(+), 369 deletions(-) --- base-commit: 9453bc6a69ef43755f1c28d5688cacdd69fa16bd change-id: 20260605-james-cs-unformatted-per-thread-fix-50e723aa7f0e Best regards, -- James Clark <james.clark(a)linaro.org>

2 weeks, 1 day

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