Good localtime,
I am the project manager assigned to CS/TSDL Project by Linaro. I hope
this journey will be something pleasant and fruitful for all the
participants of this project as well as for the community around ARM
technologies and Linux.
So, let's start with an answer to "what?" question.
In order to be able to properly plan the scope of the project we need to
define the first approximation of the project work item structure. Quite
many of the people subscribed to this mailing list have practical
experience implementing trace stream decoders for CoreSight. That
increases our chances of defining a decent approximation of the project
scope, which then will be refined gradually as project continues.
I need your help brainstorming this topic. So, please, throw your ideas
about the potential work items into this thread and I'll be summarizing
your ideas and putting them into a single "backlog", which will get
prioritized according to needs and dependencies afterwards.
Usage of a hierarchical representation of the work items might be a good
idea as it allows seeing the dependencies from the very beginning. So,
something along the lines of the example below is proposed to be used
(the structure below is just an example - I don't have enough technical
knowledge for the area to propose a good initial structure):
1. Frontend
1.1. ...
2. Core
2.1. ...
2. Backends
2.1. ETMv3
2.1.1. ...
2.2. ETMv4
2.2.1. ...
2.3. STM
2.3.1. ...
3. ...
Also, please share your relevant DOs and DONTs from your past
experience. This undertaking needs all your skills and knowledge to
create a fast, reliable and easy to use decoding library.
PS. "CS/TSDL" in the subject stands for "CoreSight/Trace Stream Decoding
Library". Proposals for a better name are welcome. :)
--
Best Regards,
Serge Broslavsky <serge.broslavsky(a)linaro.org>
Core Development Project Manager, Linaro
M: +37129426328 IRC: ototo Skype: serge.broslavsky
http://linaro.org | Open source software for ARM SoCs
Good afternoon,
As promised in our last meeting I have generated traces for ETMv3 and
ETMv4. ETMv3 traces have been generated on a A7 (vexpress-TC2) core
while the latter on an A53 (Juno).
Both bundles have been updated here [1]. A while back I used DS-5's
command line interface to decode ETMv3 traces[2]. I figured that
capturing the same files and content for this exercise would likely
suffice. Please get back to me if you don't fine what you are looking
for.
Last but not least I'm not sure about the ETMv4 traces. I wasn't able
to use the address range resource the same way I did on ETMv3,
something I will rectify when I get back on the week of the 15th of
June.
Regards,
Mathieu
[1]. http://people.linaro.org/~mathieu.poirier/coresight/trace_decode/
[2]. https://wiki.linaro.org/WorklingGroups/Kernel/Coresight/traceDecodingWithDS5
