Mapping just one page of STM is all right when there is just one agent (e.g.
low-level firmware) but if there are multiple software agents it creates a problem. Is there now enough documentation on how the Linux STM driver will map pages of STM channel space, for us to use this in setting expectations on how much should be physically mapped in?
Sorry, I don't understand the question clearly enough to give you an accurate answer. Right now the CS-STM driver reads the amount of available channels in STMDEVID::NUMSP to map the right amount of space. That value can be tuned in the device tree by specifying the amount of IO space allocated to that device - the boot code will take the minimum of the two values. As such the amount of mapped space can be fined tune in the DT.
Get back to me if you still have questions on that topic.
No, I understand that, thanks.
In particular, will the driver support mapping parts of STM channel space into
userspace processes, allowing userspace to generate STM messages by storing directly into channel space without going via the kernel?
The generic STM API has an optional mmio_addr() callback used especially for mmap() operations in user space, allowing to bypass the kernel when writing to channels. The CS-STM driver that has just been released for public review doesn't implement this interface (simply because we haven't done it yet).
That's more what I was after, although I don't grasp exactly what you mean by mmio_addr(). What I am envisaging is that a userspace process could request a page of STM channels. Then the kernel might return a file descriptor and the process mmap()s that into its address space, so that the process can write STM messages directly. Is that roughly what will happen when it's done?
So the implication of that would be you need at least one page worth of channels per process, plus one for the kernel. There is kernel-enforced channel separation between pages, but channel usage within a page relies on the various users of that page coordinating their channel use.
Given that, we would want to recommend an STM channel space (size of physically memory-mapped area) that allowed separate pages for the kernel and for the maximum concurrent number of userspace processes using STM pages.
It doesn't have to work like that - everything could go through the kernel. But direct access from userspace is far more efficient. Are you already looking at timescales for doing that in CoreSight STM?
Al
Thanks, Mathieu
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