27 Jan
2016
27 Jan
'16
11:11 a.m.
Hi Mike,
The "Appendix A. CoreSight Port List" in [1] documents that many of CoreSight components have a clock signal called 'ATCLK', but I didn't see the description on STM ATCLK. So is there the 'ATCLK' signal on STM too? At what situations the CoreSight components need ATCLK?
Many thanks, Chunyan
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0314h/Cihejfi...