Adds a notify callback for CPU PM events to the CTI driver - for CPU bound CTI devices.
Signed-off-by: Mike Leach mike.leach@linaro.org --- drivers/hwtracing/coresight/coresight-cti.c | 82 +++++++++++++++++++++ 1 file changed, 82 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-cti.c b/drivers/hwtracing/coresight/coresight-cti.c index 9af66719ae5b..0f0c14528701 100644 --- a/drivers/hwtracing/coresight/coresight-cti.c +++ b/drivers/hwtracing/coresight/coresight-cti.c @@ -8,6 +8,7 @@ #include <linux/atomic.h> #include <linux/bits.h> #include <linux/coresight.h> +#include <linux/cpu_pm.h> #include <linux/device.h> #include <linux/io.h> #include <linux/kernel.h> @@ -655,6 +656,84 @@ static void cti_remove_conn_xrefs(struct cti_drvdata *drvdata) } }
+/** cti PM callbacks **/ +static int cti_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, + void *v) +{ + struct cti_drvdata *drvdata; + unsigned int cpu = smp_processor_id(); + int notify_res = NOTIFY_OK; + + if (!cti_cpu_drvdata[cpu]) + return NOTIFY_OK; + + drvdata = cti_cpu_drvdata[cpu]; + + if (WARN_ON_ONCE(drvdata->ctidev.cpu != cpu)) + return NOTIFY_BAD; + + spin_lock(&drvdata->spinlock); + + switch (cmd) { + case CPU_PM_ENTER: + /* CTI regs all static - we have a copy & nothing to save */ + drvdata->config.hw_powered = false; + if (drvdata->config.hw_enabled) + coresight_disclaim_device(drvdata->base); + break; + + case CPU_PM_ENTER_FAILED: + drvdata->config.hw_powered = true; + if (drvdata->config.hw_enabled) { + if (coresight_claim_device(drvdata->base)) + drvdata->config.hw_enabled = false; + } + break; + + case CPU_PM_EXIT: + /* write hardware registers to re-enable. */ + drvdata->config.hw_powered = true; + drvdata->config.hw_enabled = false; + + /* check enable reference count to enable HW */ + if (atomic_read(&drvdata->config.enable_req_count)) { + /* check we can claim the device as we re-power */ + if (coresight_claim_device(drvdata->base)) + goto cti_notify_exit; + + drvdata->config.hw_enabled = true; + cti_write_all_hw_regs(drvdata); + } + break; + + default: + notify_res = NOTIFY_DONE; + break; + } + +cti_notify_exit: + spin_unlock(&drvdata->spinlock); + return notify_res; +} + +static struct notifier_block cti_cpu_pm_nb = { + .notifier_call = cti_cpu_pm_notify, +}; + +static int cti_cpu_pm_register(void) +{ + if (IS_ENABLED(CONFIG_CPU_PM)) + return cpu_pm_register_notifier(&cti_cpu_pm_nb); + + return 0; +} + +static void cti_cpu_pm_unregister(void) +{ + if (IS_ENABLED(CONFIG_CPU_PM)) + cpu_pm_unregister_notifier(&cti_cpu_pm_nb); +} + /* CPU HP handlers */ static int cti_starting_cpu(unsigned int cpu) { @@ -686,6 +765,8 @@ static void cti_pm_release(struct cti_drvdata *drvdata) { if (drvdata->ctidev.cpu >= 0) { if (--nr_cti_cpu == 0) { + cti_cpu_pm_unregister(); + cpuhp_remove_state_nocalls( CPUHP_AP_ARM_CORESIGHT_CTI_STARTING); } @@ -814,6 +895,7 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) "arm/coresight_cti:starting", cti_starting_cpu, cti_dying_cpu);
+ ret = cti_cpu_pm_register(); cpus_read_unlock(); if (ret) goto err_out;