Greetings,
I'm trying to enable the Coresight ETMv4 trace from kernel mode. I saw there is no documentation on how to do this, except using the sysfs user mode interface and perf.
To overcome this i looked a little bit in the coresight.h header file, and came to these APIs:
extern int coresight_enable(struct coresight_device *csdev);
extern void coresight_disable(struct coresight_device *csdev);
And the sysfs implementation uses these APIs when enabing/disabling the trace code, so i thought this could suit my needs. The next problem was actually getting the coresight devices data structures, which aren't exported and are actually provided internally to perf and sysfs. So i exported the coresight bus type:
struct bus_type coresight_bustype = {
.name = "coresight",};
EXPORT_SYMBOL(coresight_bustype);
And enumerated the bus and just looked for the type CORESIGHT_DEV_TYPE_SOURCE, since the only source on my board is ETMv4, there isn't any conflicts so i should get only ETMv4s.
This worked, and indeed i collected a coresight device for every CPU, and enabled the trace successfully while being in *non-atomic context*.
The problem is, i must enable the trace in *atomic context synchronously *on the current thread's CPU(i can't issue a work-queue to enable the trace for me). So.. i got many BUG() errors because of non-atomic API usage, for example, the allocation of the TMC-ETR buffer:
dma_alloc_coherent(drvdata->dev, etr_buf->size, &flat_buf->daddr, *GFP_KERNEL*);
So my questions are:
1) Is there a more documented way of enabling coresight from kernel mode? i believe i achieved this using cheats. 2) I see there is no exported kernel API to config the coresight trace attributes(for example, filter EL0). I can only do so from sysfs.. am i missing something? 3) Are there any plans to make the Coresight infrastructure atomic-context friendly? If there are, is the development in progress? if not.. how would you suggest tackling the issues i've described in this message?
Thank you!