Re: [PATCH v4 7/7] coresight: Add pmu_pulse/extout_pulse

On 26/10/2026 05:48, Amir Ayupov wrote:

Add ETMv4 configuration 'pmu_pulse' with 'extout_pulse' feature which requires an ETE whose PMU counts its external outputs (CS_CFG_MATCH_CAP_TRCEXTOUT): event 1 selects the always-true resource and drives TRCEXTOUT1 PMU event which pulses on every cycle while the trace unit is enabled.

Assisted-by: Devmate:Opus-5.5 Signed-off-by: Amir Ayupov aaupov@fb.com Reviewed-by: Daniel Pereira danielmaraboo@gmail.com

---

.../trace/coresight/coresight-config.rst | 5 ++ .../trace/coresight/coresight-perf.rst | 15 +++++ drivers/hwtracing/coresight/Makefile | 1 + .../coresight/coresight-cfg-pmu-pulse.c | 55 +++++++++++++++++++ .../coresight/coresight-cfg-preload.c | 2 + .../coresight/coresight-cfg-preload.h | 2 + 6 files changed, 80 insertions(+) create mode 100644 drivers/hwtracing/coresight/coresight-cfg-pmu-pulse.c

diff --git a/Documentation/trace/coresight/coresight-config.rst b/Documentation/trace/coresight/coresight-config.rst index 6d5ffa6f73471..3eed728bf0de1 100644 --- a/Documentation/trace/coresight/coresight-config.rst +++ b/Documentation/trace/coresight/coresight-config.rst @@ -129,6 +129,11 @@ The following steps take place in the operation of a configuration. 5) At the end of the perf session, the configuration will be disabled. +The built-in 'pmu_pulse' configuration pulses ETM external output 1 for a PMU +event to count. It only pulses while the ETM is enabled, so combined with AUX +pause and resume the PMU event can time each trace window (see +coresight-perf.rst).

Viewing Configurations and Features =================================== diff --git a/Documentation/trace/coresight/coresight-perf.rst b/Documentation/trace/coresight/coresight-perf.rst index 0a77741a431ef..6770a455c6b59 100644 --- a/Documentation/trace/coresight/coresight-perf.rst +++ b/Documentation/trace/coresight/coresight-perf.rst @@ -109,6 +109,21 @@ Example for triggering AUX pause and resume with PMU event:: -e cycles/aux-action=pause,period=10000000/ \ -e cycles/aux-action=resume,period=1050000/ -- sleep 1 +ETM-timed pause events +~~~~~~~~~~~~~~~~~~~~~~

+The built-in ``pmu_pulse`` configuration pulses ETM external output 1 on every +cycle of allowed trace, and a PMU event counting that output pauses trace after +``N`` pulses, here 1000 cycles::

• perf record -a -e cs_etm/pmu_pulse,aux-action=start-paused/u \
• -e cycles/aux-action=resume,period=10000000/u \
• -e trcextout1/aux-action=pause,period=1000/u \
• -- sleep 1

+Each window is about ``N`` traced cycles plus the pause interrupt latency. +The configuration only loads on an ETE whose PMU counts its external outputs.

• Perf test - Verify kernel and userspace perf CoreSight work

diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile index ab16d06783a57..568e797ac5a17 100644 --- a/drivers/hwtracing/coresight/Makefile +++ b/drivers/hwtracing/coresight/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_CORESIGHT) += coresight.o coresight-y := coresight-core.o coresight-etm-perf.o coresight-platform.o \ coresight-sysfs.o coresight-syscfg.o coresight-config.o \ coresight-cfg-preload.o coresight-cfg-afdo.o coresight-cfg-pstop.o \

• coresight-cfg-pmu-pulse.o \
  

  coresight-syscfg-configfs.o coresight-trace-id.o obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o coresight-tmc-y := coresight-tmc-core.o coresight-tmc-etf.o \

diff --git a/drivers/hwtracing/coresight/coresight-cfg-pmu-pulse.c b/drivers/hwtracing/coresight/coresight-cfg-pmu-pulse.c new file mode 100644 index 0000000000000..61472154dd02a --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-cfg-pmu-pulse.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0 +/*

• • Pulse ETM external output 1 on every traced cycle for a PMU event to count.
• • Based on coresight-cfg-afdo.c
• */

+#include "coresight-config.h"

+/* ETMv4 includes and features */ +#if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X) +#include "coresight-etm4x-cfg.h"

+/*

• • extout_pulse feature: event 1 selects the always-true resource, so ETM
• • external output 1 pulses on every cycle while the trace unit is enabled. A
• • PMU event counting that output (TRCEXTOUT1), for example with
• • aux-action=pause, then fires after as many traced cycles as its sample
• • period. Event 0 is avoided because it is the trace unit trigger, and the
• • TRBE driver treats a detected trigger as fatal.
• */

+static struct cscfg_regval_desc extout_pulse_regs[] = {

• /* event 1: resource selector 1 (always true), drives external output 1 */
• {

• .type = CS_CFG_REG_TYPE_STD | CS_CFG_REG_TYPE_VAL_MASK,
  

• .offset = TRCEVENTCTL0R,
  

• .val32 = 0x0100,
  

• .mask32 = 0xff00,
  

• },
• /* end of regs */

+};

+struct cscfg_feature_desc extout_pulse_etm4x = {

• .name = "extout_pulse",
• .description = "Pulse external output 1 on every traced cycle.\n",
• .match_flags = CS_CFG_MATCH_CLASS_SRC_ETM4 | CS_CFG_MATCH_CAP_TRCEXTOUT,
• .nr_regs = ARRAY_SIZE(extout_pulse_regs),
• .regs_desc = extout_pulse_regs,

+};

+/* create a pmu_pulse configuration */

+static const char *pmu_pulse_ref_names[] = {

• "extout_pulse",

+};

+struct cscfg_config_desc pmu_pulse_etm4x = {

• .name = "pmu_pulse",
• .description = "Pulse ETM external output 1 on every traced cycle for the PMU\n"
• "to count as TRCEXTOUT1\n",
• .nr_feat_refs = ARRAY_SIZE(pmu_pulse_ref_names),
• .feat_ref_names = pmu_pulse_ref_names,

+};

+/* end of ETM4x configurations */ +#endif /* IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X) */ diff --git a/drivers/hwtracing/coresight/coresight-cfg-preload.c b/drivers/hwtracing/coresight/coresight-cfg-preload.c index 4980e68483c5b..a9a60a1c40845 100644 --- a/drivers/hwtracing/coresight/coresight-cfg-preload.c +++ b/drivers/hwtracing/coresight/coresight-cfg-preload.c @@ -14,6 +14,7 @@ static struct cscfg_feature_desc *preload_feats[] = { #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X) &strobe_etm4x, &gen_etrig_etm4x,

• &extout_pulse_etm4x, #endif NULL };

@@ -22,6 +23,7 @@ static struct cscfg_config_desc *preload_cfgs[] = { #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X) &afdo_etm4x, &pstop_etm4x,

• &pmu_pulse_etm4x, #endif NULL };

diff --git a/drivers/hwtracing/coresight/coresight-cfg-preload.h b/drivers/hwtracing/coresight/coresight-cfg-preload.h index 291ba530a6a52..0058627f65ae5 100644 --- a/drivers/hwtracing/coresight/coresight-cfg-preload.h +++ b/drivers/hwtracing/coresight/coresight-cfg-preload.h @@ -12,4 +12,6 @@ extern struct cscfg_feature_desc strobe_etm4x; extern struct cscfg_config_desc afdo_etm4x; extern struct cscfg_feature_desc gen_etrig_etm4x; extern struct cscfg_config_desc pstop_etm4x; +extern struct cscfg_feature_desc extout_pulse_etm4x; +extern struct cscfg_config_desc pmu_pulse_etm4x; #endif

Reviewed-by: James Clark james.clark@linaro.org