This converts TRBTRG_EL1 register to automatic generation without causing any functional change.
Cc: Catalin Marinas catalin.marinas@arm.com Cc: Will Deacon will@kernel.org Cc: Marc Zyngier maz@kernel.org Cc: Mark Brown broonie@kernel.org Cc: Rob Herring robh@kernel.org Cc: Suzuki K Poulose suzuki.poulose@arm.com Cc: James Morse james.morse@arm.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual anshuman.khandual@arm.com --- arch/arm64/include/asm/sysreg.h | 3 --- arch/arm64/tools/sysreg | 5 +++++ 2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 131442f850dd..b3a32a67088f 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -235,13 +235,10 @@
/*** End of Statistical Profiling Extension ***/
-#define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7)
#define TRBSR_EL1_BSC_MASK GENMASK(5, 0) #define TRBSR_EL1_BSC_SHIFT 0 -#define TRBTRG_EL1_TRG_MASK GENMASK(31, 0) -#define TRBTRG_EL1_TRG_SHIFT 0 #define TRBIDR_EL1_F BIT(5) #define TRBIDR_EL1_P BIT(4) #define TRBIDR_EL1_Align_MASK GENMASK(3, 0) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index b3f9a545e1e7..98dff7010b86 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2250,3 +2250,8 @@ Field 11:10 PAS Field 9:8 SH Field 7:0 Attr EndSysreg + +Sysreg TRBTRG_EL1 3 0 9 11 6 +Res0 63:32 +Field 31:0 TRG +EndSysreg