On 29 June 2017 at 05:46, Leo Yan leo.yan@linaro.org wrote:
Hi Mathieu, Mike,
Good morning Leo,
Guodong and me have planning to enable coresight on Hikey960, but we are not quite sure if you have requirement for this or not.
I currently don't have the bandwidth to work on this.
Due Guodong told me so far community has no many inputs for coresight enabling on Hikey960, so want to check with you if you are intreseting on this platform for coresight works, if you think there have strong requirement we can start related enabling with Hisilicon.
I would be delighted to have CS support on Hikey960 - current platforms are well supported but the passage of time can't be ignored.
Methieu/Chunyan before have took much efforts to enable Hikey, you could see Hikey960 we still have very poor doc for coresight module in below section; so if you think this is important for your work, Guodong and me will sync with Hisilicon for coresight enabling ASAP (we heavily depend Hisilicon to provide info for clock and coresight topology), from Hikey experience this took very long time, but we can summary the check points based on previous experience and accelerate a bit for this (if necessary, I'm glad to work in Hisilicon lab to enable it).
If you think this platform is redundant with others, I still will send to Hisilicon and will take it as a low priority task.
I don't think it's redundant at all...
Before you start implementing anything I'd like to see the CoreSight topology for this board. Newer design are getting more creative and there may be cases we haven't expected in the initial design. If that's the case I'll spot them right away and offer ways to address the problems.
Regards, Mathieu
2.7.2 CoreSight Debugging The Hi3660 has a powerful debug system that integrates an ARM CoreSight system. The CoreSight system supports the following features:
- Top-level CoreSight and local CoreSight in each cluster. The local CoreSight contains the A73 CoreSight and A53 CoreSight.
- Intrusive debugging (debug) and non-intrusive debugging (trace) A73 and A53 support both debug and trace.
- Software debugging and traditional JTAG debugging
Thanks, Leo Yan
Hi Mathieu,
On Thu, Jun 29, 2017 at 10:49:33AM -0600, Mathieu Poirier wrote:
On 29 June 2017 at 05:46, Leo Yan leo.yan@linaro.org wrote:
Hi Mathieu, Mike,
Good morning Leo,
Guodong and me have planning to enable coresight on Hikey960, but we are not quite sure if you have requirement for this or not.
I currently don't have the bandwidth to work on this.
Due Guodong told me so far community has no many inputs for coresight enabling on Hikey960, so want to check with you if you are intreseting on this platform for coresight works, if you think there have strong requirement we can start related enabling with Hisilicon.
I would be delighted to have CS support on Hikey960 - current platforms are well supported but the passage of time can't be ignored.
Methieu/Chunyan before have took much efforts to enable Hikey, you could see Hikey960 we still have very poor doc for coresight module in below section; so if you think this is important for your work, Guodong and me will sync with Hisilicon for coresight enabling ASAP (we heavily depend Hisilicon to provide info for clock and coresight topology), from Hikey experience this took very long time, but we can summary the check points based on previous experience and accelerate a bit for this (if necessary, I'm glad to work in Hisilicon lab to enable it).
If you think this platform is redundant with others, I still will send to Hisilicon and will take it as a low priority task.
I don't think it's redundant at all...
Before you start implementing anything I'd like to see the CoreSight topology for this board. Newer design are getting more creative and there may be cases we haven't expected in the initial design. If that's the case I'll spot them right away and offer ways to address the problems.
Thanks a lot. I will summary the check points and loop you.
P.s. I notice we loop cs mainling list, it's good we can engage community in early time :)
Thanks, Leo Yan