Hello,
I am a graduate student from Virginia Commonwealth University working on execution and data monitoring of my application running on a STM32F4 board. I have a runtime monitor on an FPGA that would analyse the trace information.
But, to transfer the instruction traces from ETM and data traces to the FPGA, I would need a trace decoder on the FPGA. This trace decoder would be help decode the ETM traces from STM32 board to the FPGA monitor. I want to do monitoring at runtime. I came across the OpenCSD github repository. Do you think this could fit well for our application? Can the OpenCSD be implemented on an FPGA to decode ETM traces?
Thank you for any inputs on this.
regards, Smitha
Hello Smitha,
I would advise you to read carefully the documentation provided with the library - particularly the section "OpenCSD Library - Programmers Guide". This explains how the decoder works - the three stage decode process - and the outputs it provides.
The input requirements for decoding are the raw trace stream, the memory image of the program being decoded and the programmed settings of the ETM. The library output for full decode is a list of executed instruction address ranges.
ETM trace is a highly compressed format - a single bit in the output stream can represent a range of many executed instructions. Thus it requires much more time / computing power to decode trace than to generate it. Bear this in mind if you are considering the realtime decode of a trace stream.
I cannot comment on the feasibility of converting the C++ decoder classes into a format suitable for implementing on an FPGA. However, I would say that for a specific application, it may be possible to ignore the usual library API (DeviceTree) and use the C++ classes directly to build a custom decoder using only the most essential components.
Regards
Mike
-----Original Message----- From: CoreSight coresight-bounces@lists.linaro.org On Behalf Of Smitha Gautham Sent: 04 June 2019 16:56 To: coresight@lists.linaro.org Subject: ETM trace decode using OpenCSD
Hello,
I am a graduate student from Virginia Commonwealth University working on execution and data monitoring of my application running on a STM32F4 board. I have a runtime monitor on an FPGA that would analyse the trace information.
But, to transfer the instruction traces from ETM and data traces to the FPGA, I would need a trace decoder on the FPGA. This trace decoder would be help decode the ETM traces from STM32 board to the FPGA monitor. I want to do monitoring at runtime. I came across the OpenCSD github repository. Do you think this could fit well for our application? Can the OpenCSD be implemented on an FPGA to decode ETM traces?
Thank you for any inputs on this.
regards, Smitha
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Hi Smitha,collecting the traces does not require a big fpga. decoding the traces requires a bit of processing power. It should be possible to use an fpga with a cortex A hardcore to combine trace collection and trace decoding. Xilinx and intel both have such a product. The library itself has no dependency towards system api, but the test example build around it requires posix to read trace files, etm config files and print the decoded packets...Please notice that itm decoding as well as etm data traces decoding is still not implemented in opencsd. if you need one of them, you will have to write the decoder.RegardsZied
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On Wed, Jun 5, 2019 at 10:38 AM, Mike LeachMike.Leach@arm.com wrote: Hello Smitha,
I would advise you to read carefully the documentation provided with the library - particularly the section "OpenCSD Library - Programmers Guide". This explains how the decoder works - the three stage decode process - and the outputs it provides.
The input requirements for decoding are the raw trace stream, the memory image of the program being decoded and the programmed settings of the ETM. The library output for full decode is a list of executed instruction address ranges.
ETM trace is a highly compressed format - a single bit in the output stream can represent a range of many executed instructions. Thus it requires much more time / computing power to decode trace than to generate it. Bear this in mind if you are considering the realtime decode of a trace stream.
I cannot comment on the feasibility of converting the C++ decoder classes into a format suitable for implementing on an FPGA. However, I would say that for a specific application, it may be possible to ignore the usual library API (DeviceTree) and use the C++ classes directly to build a custom decoder using only the most essential components.
Regards
Mike
-----Original Message----- From: CoreSight coresight-bounces@lists.linaro.org On Behalf Of Smitha Gautham Sent: 04 June 2019 16:56 To: coresight@lists.linaro.org Subject: ETM trace decode using OpenCSD
Hello,
I am a graduate student from Virginia Commonwealth University working on execution and data monitoring of my application running on a STM32F4 board. I have a runtime monitor on an FPGA that would analyse the trace information.
But, to transfer the instruction traces from ETM and data traces to the FPGA, I would need a trace decoder on the FPGA. This trace decoder would be help decode the ETM traces from STM32 board to the FPGA monitor. I want to do monitoring at runtime. I came across the OpenCSD github repository. Do you think this could fit well for our application? Can the OpenCSD be implemented on an FPGA to decode ETM traces?
Thank you for any inputs on this.
regards, Smitha
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. _______________________________________________ CoreSight mailing list CoreSight@lists.linaro.org https://lists.linaro.org/mailman/listinfo/coresight
Hi Mike and Zied,
Thank you both for the detailed information. I now understand that the Xilinix FPGA has the processing power to collect the instruction and data traces from a STM32 board. However, I may have to write a trace decoder.
Thank you for your inputs.
regards, Smitha
On Wed, Jun 5, 2019 at 5:36 PM zied guermazi guermazi_zied@yahoo.com wrote:
Hi Smitha, collecting the traces does not require a big fpga. decoding the traces requires a bit of processing power. It should be possible to use an fpga with a cortex A hardcore to combine trace collection and trace decoding. Xilinx and intel both have such a product. The library itself has no dependency towards system api, but the test example build around it requires posix to read trace files, etm config files and print the decoded packets... Please notice that itm decoding as well as etm data traces decoding is still not implemented in opencsd. if you need one of them, you will have to write the decoder. Regards Zied
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On Wed, Jun 5, 2019 at 10:38 AM, Mike Leach Mike.Leach@arm.com wrote: Hello Smitha,
I would advise you to read carefully the documentation provided with the library - particularly the section "OpenCSD Library - Programmers Guide". This explains how the decoder works - the three stage decode process - and the outputs it provides.
The input requirements for decoding are the raw trace stream, the memory image of the program being decoded and the programmed settings of the ETM. The library output for full decode is a list of executed instruction address ranges.
ETM trace is a highly compressed format - a single bit in the output stream can represent a range of many executed instructions. Thus it requires much more time / computing power to decode trace than to generate it. Bear this in mind if you are considering the realtime decode of a trace stream.
I cannot comment on the feasibility of converting the C++ decoder classes into a format suitable for implementing on an FPGA. However, I would say that for a specific application, it may be possible to ignore the usual library API (DeviceTree) and use the C++ classes directly to build a custom decoder using only the most essential components.
Regards
Mike
-----Original Message----- From: CoreSight coresight-bounces@lists.linaro.org On Behalf Of Smitha Gautham Sent: 04 June 2019 16:56 To: coresight@lists.linaro.org Subject: ETM trace decode using OpenCSD
Hello,
I am a graduate student from Virginia Commonwealth University working on execution and data monitoring of my application running on a STM32F4
board.
I have a runtime monitor on an FPGA that would analyse the trace information.
But, to transfer the instruction traces from ETM and data traces to the
FPGA,
I would need a trace decoder on the FPGA. This trace decoder would be
help
decode the ETM traces from STM32 board to the FPGA monitor. I want to do monitoring at runtime. I came across the OpenCSD github repository. Do
you
think this could fit well for our application? Can the OpenCSD be implemented on an FPGA to decode ETM traces?
Thank you for any inputs on this.
regards, Smitha
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
CoreSight mailing list CoreSight@lists.linaro.org https://lists.linaro.org/mailman/listinfo/coresight
-
Mike Leach -
Smitha Gautham -
zied guermazi