Except stm, there could be other sources which are not associated with cpus. Use IDR to store and search these sources' paths.

Reviewed-by: Mike Leach mike.leach@linaro.org Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com --- drivers/hwtracing/coresight/coresight-core.c | 37 ++++++++++++++------ 1 file changed, 26 insertions(+), 11 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index da416800a7de..eace5b7ada02 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -8,6 +8,7 @@ #include <linux/types.h> #include <linux/device.h> #include <linux/io.h> +#include <linux/idr.h> #include <linux/err.h> #include <linux/export.h> #include <linux/slab.h> @@ -27,6 +28,13 @@ static DEFINE_MUTEX(coresight_mutex); static DEFINE_PER_CPU(struct coresight_device *, csdev_sink);

+/* + * Use IDR to map the hash of the source's device name + * to the pointer of path for the source. The idr is for + * the sources which aren't associated with CPU. + */ +static DEFINE_IDR(path_idr); + /** * struct coresight_node - elements of a path, from source to sink * @csdev: Address of an element. @@ -43,14 +51,6 @@ struct coresight_node { */ static DEFINE_PER_CPU(struct list_head *, tracer_path);

-/* - * As of this writing only a single STM can be found in CS topologies. Since - * there is no way to know if we'll ever see more and what kind of - * configuration they will enact, for the time being only define a single path - * for STM. - */ -static struct list_head *stm_path; - /* * Set up a global trace ID map. * We may need a per sink ID map in future for larger / multi sink systems. @@ -1061,6 +1061,7 @@ int coresight_enable(struct coresight_device *csdev) struct coresight_device *sink; struct list_head *path; enum coresight_dev_subtype_source subtype; + u32 hash;

subtype = csdev->subtype.source_subtype;

@@ -1115,7 +1116,14 @@ int coresight_enable(struct coresight_device *csdev) per_cpu(tracer_path, cpu) = path; break; case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: - stm_path = path; + /* + * Use the hash of source's device name as ID + * and map the ID to the pointer of the path. + */ + hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev))); + ret = idr_alloc_u32(&path_idr, path, &hash, hash, GFP_KERNEL); + if (ret) + goto err_source; break; default: /* We can't be here */ @@ -1139,6 +1147,7 @@ void coresight_disable(struct coresight_device *csdev) { int cpu, ret; struct list_head *path = NULL; + u32 hash;

mutex_lock(&coresight_mutex);

@@ -1156,14 +1165,20 @@ void coresight_disable(struct coresight_device *csdev) per_cpu(tracer_path, cpu) = NULL; break; case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: - path = stm_path; - stm_path = NULL; + hash = hashlen_hash(hashlen_string(NULL, dev_name(&csdev->dev))); + /* Find the path by the hash. */ + path = idr_find(&path_idr, hash); + if (path == NULL) { + pr_err("Path is not found for %s\n", dev_name(&csdev->dev)); + goto out; + } break; default: /* We can't be here */ break; }

+ idr_remove(&path_idr, hash); coresight_disable_path(path); coresight_release_path(path);

Adds new coresight-tpdm.yaml file describing the bindings required to define tpdm in the device trees.

Acked-by: Suzuki K Poulose suzuki.poulose@arm.com Reviewed-by: Mike Leach mike.leach@linaro.org Reviewed-by: Rob Herring robh@kernel.org Signed-off-by: Tao Zhang quic_taozha@quicinc.com Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com --- .../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 94 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml

diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml new file mode 100644 index 000000000000..5881cb41da70 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Trace, Profiling and Diagnostics Monitor - TPDM + +description: | + The TPDM or Monitor serves as data collection component for various dataset + types specified in the QPMDA spec. It covers Implementation defined ((ImplDef), + Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete + Single Bit (DSB). It performs data collection in the data producing clock + domain and transfers it to the data collection time domain, generally ATB + clock domain. + + The primary use case of the TPDM is to collect data from different data + sources and send it to a TPDA for packetization, timestamping, and funneling. + +maintainers: + - Mao Jinlong quic_jinlmao@quicinc.com + - Tao Zhang quic_taozha@quicinc.com + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + enum: + - qcom,coresight-tpdm + required: + - compatible + +properties: + $nodename: + pattern: "^tpdm(@[0-9a-f]+)$" + compatible: + items: + - const: qcom,coresight-tpdm + - const: arm,primecell + + reg: + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + out-ports: + description: | + Output connections from the TPDM to coresight funnel/TPDA. + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port: + description: Output connection from the TPDM to coresight + funnel/TPDA. + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + # minimum TPDM definition. TPDM connect to coresight TPDA. + - | + tpdm@684c000 { + compatible = "qcom,coresight-tpdm", "arm,primecell"; + reg = <0x0684c000 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_prng_out_tpda_qdss: endpoint { + remote-endpoint = + <&tpda_qdss_in_tpdm_prng>; + }; + }; + }; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 3cf9842d9233..5666b4ef26a1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1983,6 +1983,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git F: Documentation/ABI/testing/sysfs-bus-coresight-devices-* F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt F: Documentation/devicetree/bindings/arm/coresight-cti.yaml +F: Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml F: Documentation/devicetree/bindings/arm/coresight.txt F: Documentation/devicetree/bindings/arm/ete.yaml F: Documentation/devicetree/bindings/arm/trbe.yaml

Integration test for tpdm can help to generate the data for verification of the topology during TPDM software bring up.

Sample: echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test cat /dev/tmc_etf0 > /data/etf-tpdm0.bin

Signed-off-by: Tao Zhang quic_taozha@quicinc.com Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com --- .../testing/sysfs-bus-coresight-devices-tpdm | 13 +++++ drivers/hwtracing/coresight/coresight-tpdm.c | 54 +++++++++++++++++++ drivers/hwtracing/coresight/coresight-tpdm.h | 14 +++++ 3 files changed, 81 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm

diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm new file mode 100644 index 000000000000..e1c2b5a59cb4 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm @@ -0,0 +1,13 @@ +What: /sys/bus/coresight/devices/<tpdm-name>/integration_test +Date: June 2022 +KernelVersion 5.20 +Contact: Jinlong Mao (QUIC) quic_jinlmao@quicinc.com, Tao Zhang (QUIC) quic_taozha@quicinc.com +Description: + (Write) Run integration test for tpdm. Integration test + will generate test data for tpdm. It can help to make + sure that the trace path is enabled and the link configurations + are fine. + + Accepts only one of the 2 values - 1 or 2. + 1 : Generate 64 bits data + 2 : Generate 32 bits data diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c index f6d653a45c99..88df3e687ce2 100644 --- a/drivers/hwtracing/coresight/coresight-tpdm.c +++ b/drivers/hwtracing/coresight/coresight-tpdm.c @@ -121,6 +121,59 @@ static void tpdm_init_default_data(struct tpdm_drvdata *drvdata) CS_LOCK(drvdata->base); }

+/* + * value 1: 64 bits test data + * value 2: 32 bits test data + */ +static ssize_t integration_test_store(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t size) +{ + int i, ret = 0; + unsigned long val; + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent); + + ret = kstrtoul(buf, 10, &val); + if (ret) + return ret; + + if (val != 1 && val != 2) + return -EINVAL; + + if (!drvdata->enable) + return -EINVAL; + + if (val == 1) + val = ATBCNTRL_VAL_64; + else + val = ATBCNTRL_VAL_32; + CS_UNLOCK(drvdata->base); + writel_relaxed(0x1, drvdata->base + TPDM_ITCNTRL); + + for (i = 0; i < INTEGRATION_TEST_CYCLE; i++) + writel_relaxed(val, drvdata->base + TPDM_ITATBCNTRL); + + writel_relaxed(0, drvdata->base + TPDM_ITCNTRL); + CS_LOCK(drvdata->base); + return size; +} +static DEVICE_ATTR_WO(integration_test); + +static struct attribute *tpdm_attrs[] = { + &dev_attr_integration_test.attr, + NULL, +}; + +static struct attribute_group tpdm_attr_grp = { + .attrs = tpdm_attrs, +}; + +static const struct attribute_group *tpdm_attr_grps[] = { + &tpdm_attr_grp, + NULL, +}; + static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) { void __iomem *base; @@ -157,6 +210,7 @@ static int tpdm_probe(struct amba_device *adev, const struct amba_id *id) desc.pdata = adev->dev.platform_data; desc.dev = &adev->dev; desc.access = CSDEV_ACCESS_IOMEM(base); + desc.groups = tpdm_attr_grps; drvdata->csdev = coresight_register(&desc); if (IS_ERR(drvdata->csdev)) return PTR_ERR(drvdata->csdev); diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h index c8a101cbb4c7..d808fa1e8d4a 100644 --- a/drivers/hwtracing/coresight/coresight-tpdm.h +++ b/drivers/hwtracing/coresight/coresight-tpdm.h @@ -14,6 +14,20 @@ /* Enable bit for DSB subunit */ #define TPDM_DSB_CR_ENA BIT(0)

+/* TPDM integration test registers */ +#define TPDM_ITATBCNTRL (0xEF0) +#define TPDM_ITCNTRL (0xF00) + +/* Register value for integration test */ +#define ATBCNTRL_VAL_32 0xC00F1409 +#define ATBCNTRL_VAL_64 0xC01F1409 + +/* + * Number of cycles to write value when + * integration test. + */ +#define INTEGRATION_TEST_CYCLE 10 + /** * The bits of PERIPHIDR0 register. * The fields [6:0] of PERIPHIDR0 are used to determine what

Adds new coresight-tpda.yaml file describing the bindings required to define tpda in the device trees.

Reviewed-by: Rob Herring robh@kernel.org Reviewed-by: Mike Leach mike.leach@linaro.org Signed-off-by: Tao Zhang quic_taozha@quicinc.com Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com --- .../bindings/arm/qcom,coresight-tpda.yaml | 111 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml

diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml new file mode 100644 index 000000000000..eb9bfc5f93a2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Trace, Profiling and Diagnostics Aggregator - TPDA + +description: | + TPDAs are responsible for packetization and timestamping of data sets + utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or + more attached TPDM and pushing the resultant (packetized) data out a + master ATB interface. Performing an arbitrated ATB interleaving (funneling) + task for free-flowing data from TPDM (i.e. CMB and DSB data set flows). + +maintainers: + - Mao Jinlong quic_jinlmao@quicinc.com + - Tao Zhang quic_taozha@quicinc.com + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + enum: + - qcom,coresight-tpda + required: + - compatible + +properties: + $nodename: + pattern: "^tpda(@[0-9a-f]+)$" + compatible: + items: + - const: qcom,coresight-tpda + - const: arm,primecell + + reg: + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + in-ports: + type: object + description: | + Input connections from TPDM to TPDA + $ref: /schemas/graph.yaml#/properties/ports + + out-ports: + type: object + description: | + Output connections from the TPDA to legacy CoreSight trace bus. + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port: + description: + Output connection from the TPDA to legacy CoreSight Trace bus. + $ref: /schemas/graph.yaml#/properties/port + +required: + - compatible + - reg + - clocks + - clock-names + - in-ports + - out-ports + +additionalProperties: false + +examples: + # minimum tpda definition. + - | + tpda@6004000 { + compatible = "qcom,coresight-tpda", "arm,primecell"; + reg = <0x6004000 0x1000>; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_qdss_0_in_tpdm_dcc: endpoint { + remote-endpoint = + <&tpdm_dcc_out_tpda_qdss_0>; + }; + }; + }; + + out-ports { + port { + tpda_qdss_out_funnel_in0: endpoint { + remote-endpoint = + <&funnel_in0_in_tpda_qdss>; + }; + }; + }; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 5666b4ef26a1..07bf601df92b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1983,6 +1983,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git F: Documentation/ABI/testing/sysfs-bus-coresight-devices-* F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt F: Documentation/devicetree/bindings/arm/coresight-cti.yaml +F: Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml F: Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml F: Documentation/devicetree/bindings/arm/coresight.txt F: Documentation/devicetree/bindings/arm/ete.yaml

Add tpdm mm and tpdm prng for sm8250.

+---------------+ +-------------+ | tpdm@6c08000 | |tpdm@684C000 | +-------|-------+ +------|------+ | | +-------|-------+ | | funnel@6c0b000| | +-------|-------+ | | | +-------|-------+ | |funnel@6c2d000 | | +-------|-------+ | | | | +---------------+ | +----- tpda@6004000 -----------+ +-------|-------+ | +-------|-------+ |funnel@6005000 | +---------------+

Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 173 +++++++++++++++++++++++++++ 1 file changed, 173 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index d6bcbf7667b6..9c1aed51ce81 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2730,6 +2730,76 @@ }; };

+ tpda@6004000 { + compatible = "arm,primecell"; + reg = <0 0x06004000 0 0x1000>; + reg-names = "tpda-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tpda_out_funnel_qatb: endpoint { + remote-endpoint = <&funnel_qatb_in_tpda>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@9 { + reg = <9>; + tpda_9_in_tpdm_mm: endpoint { + remote-endpoint = <&tpdm_mm_out_tpda9>; + }; + }; + + port@17 { + reg = <23>; + tpda_23_in_tpdm_prng: endpoint { + remote-endpoint = <&tpdm_prng_out_tpda_23>; + }; + }; + }; + }; + + funnel@6005000 { + compatible = "arm,primecell"; + + reg = <0 0x06005000 0 0x1000>; + reg-names = "funnel-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_qatb_out_funnel_in0: endpoint { + remote-endpoint = <&funnel_in0_in_funnel_qatb>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + funnel_qatb_in_tpda: endpoint { + remote-endpoint = <&tpda_out_funnel_qatb>; + }; + }; + }; + }; + funnel@6041000 { compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; reg = <0 0x06041000 0 0x1000>; @@ -2749,6 +2819,13 @@ #address-cells = <1>; #size-cells = <0>;

+ port@6 { + reg = <6>; + funnel_in0_in_funnel_qatb: endpoint { + remote-endpoint = <&funnel_qatb_out_funnel_in0>; + }; + }; + port@7 { reg = <7>; funnel0_in7: endpoint { @@ -2867,6 +2944,23 @@ }; };

+ tpdm@684c000 { + compatible = "arm,primecell"; + reg = <0 0x0684c000 0 0x1000>; + reg-names = "tpdm-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_prng_out_tpda_23: endpoint { + remote-endpoint = <&tpda_23_in_tpdm_prng>; + }; + }; + }; + }; + funnel@6b04000 { compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; arm,primecell-periphid = <0x000bb908>; @@ -2951,6 +3045,85 @@ }; };

+ tpdm@6c08000 { + compatible = "arm,primecell"; + reg = <0 0x06c08000 0 0x1000>; + reg-names = "tpdm-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + tpdm_mm_out_funnel_dl_mm: endpoint { + remote-endpoint = <&funnel_dl_mm_in_tpdm_mm>; + }; + }; + }; + }; + + funnel@6c0b000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg = <0 0x06c0b000 0 0x1000>; + reg-names = "funnel-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + port { + funnel_dl_mm_out_funnel_dl_center: endpoint { + remote-endpoint = <&funnel_dl_center_in_funnel_dl_mm>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@3 { + reg = <3>; + funnel_dl_mm_in_tpdm_mm: endpoint { + remote-endpoint = <&tpdm_mm_out_funnel_dl_mm>; + }; + }; + }; + }; + + funnel@6c2d000 { + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; + + reg = <0 0x06c2d000 0 0x1000>; + reg-names = "funnel-base"; + + clocks = <&aoss_qmp>; + clock-names = "apb_pclk"; + + out-ports { + #address-cells = <1>; + #size-cells = <0>; + port { + tpdm_mm_out_tpda9: endpoint { + remote-endpoint = <&tpda_9_in_tpdm_mm>; + }; + }; + }; + + in-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@2 { + reg = <2>; + funnel_dl_center_in_funnel_dl_mm: endpoint { + remote-endpoint = <&funnel_dl_mm_out_funnel_dl_center>; + }; + }; + }; + }; + etm@7040000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x07040000 0 0x1000>;

On 20/06/2022 13:00, Mao Jinlong wrote:

TPDA(Trace, Profiling and Diagnostics Aggregator) is to provide packetization, funneling and timestamping of TPDM data. Multiple monitors are connected to different input ports of TPDA.This change is to add tpda enable/disable/probe functions for coresight tpda driver.

---

| TPDM 0| | TPDM 1 | | TPDM 2|

---

 |               |             |
 |_ _ _ _ _ _    |     _ _ _ _ |
             |   |    |
             |   |    |
        ------------------
       |        TPDA      |
        ------------------

Signed-off-by: Tao Zhang quic_taozha@quicinc.com Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com

---

drivers/hwtracing/coresight/Kconfig | 11 + drivers/hwtracing/coresight/Makefile | 1 + drivers/hwtracing/coresight/coresight-tpda.c | 206 +++++++++++++++++++ drivers/hwtracing/coresight/coresight-tpda.h | 35 ++++ 4 files changed, 253 insertions(+) create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h

diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index b2b72a35e416..0cbebfd0d23e 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -205,6 +205,7 @@ config CORESIGHT_TRBE config CORESIGHT_TPDM tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver" select CORESIGHT_LINKS_AND_SINKS

• select CORESIGHT_TPDA help This driver provides support for configuring monitor. Monitors are primarily responsible for data set collection and support the

@@ -213,4 +214,14 @@ config CORESIGHT_TPDM To compile this driver as a module, choose M here: the module will be called coresight-tpdm. +config CORESIGHT_TPDA

• tristate "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
• help

•  This driver provides support for configuring aggregator. This is
  

•  primarily useful for pulling the data sets from one or more
  

•  attached monitors and pushing the resultant data out. Multiple
  

•  monitors are connected on different input ports of TPDA.
  

•  To compile this driver as a module, choose M here: the module will be
  

•  called coresight-tpda.
  

  endif

diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile index 6bb9b1746bc7..1712d82e7260 100644 --- a/drivers/hwtracing/coresight/Makefile +++ b/drivers/hwtracing/coresight/Makefile @@ -26,5 +26,6 @@ obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o +obj-$(CONFIG_CORESIGHT_TPDA) += coresight-tpda.o coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ coresight-cti-sysfs.o diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c new file mode 100644 index 000000000000..7a0478a8b63e --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: GPL-2.0 +/*

• • Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
• */

+#include <linux/amba/bus.h> +#include <linux/bitfield.h> +#include <linux/coresight.h> +#include <linux/device.h> +#include <linux/err.h> +#include <linux/fs.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h>

+#include "coresight-priv.h" +#include "coresight-tpda.h" +#include "coresight-trace-id.h"

+DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda");

+/* Settings pre enabling port control register */ +static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) +{

• u32 val;
• val = readl_relaxed(drvdata->base + TPDA_CR);

Even though the drvdata->atid is constant during the life time of the driver, I would recommend clearing the field and then setting it. e.g, if you get a different ATID on unload-load sequence of the driver, the field will corrupted.

val &= ~TPDA_CR_ATID;

• val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid);

• writel_relaxed(val, drvdata->base + TPDA_CR);

+}

Is there no global turn-ON for the TPDA ? Or is it per-port enable only via TPDA_Pn_CR ?

+static void tpda_enable_port(struct tpda_drvdata *drvdata, int port) +{

• u32 val;
• val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
• /* Enable the port */
• val |= TPDA_Pn_CR_ENA;
• writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));

+}

+static void __tpda_enable(struct tpda_drvdata *drvdata, int port) +{

• CS_UNLOCK(drvdata->base);
• if (!drvdata->csdev->enable)

• tpda_enable_pre_port(drvdata);
  

• tpda_enable_port(drvdata, port);
• CS_LOCK(drvdata->base);

+}

+static int tpda_enable(struct coresight_device *csdev, int inport, int outport) +{

• struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
• spin_lock(&drvdata->spinlock);
• if (atomic_read(&csdev->refcnt[inport]) == 0)

• __tpda_enable(drvdata, inport);
  

• atomic_inc(&csdev->refcnt[inport]);
• spin_unlock(&drvdata->spinlock);
• dev_dbg(drvdata->dev, "TPDA inport %d enabled.\n", inport);
• return 0;

+}

+static void __tpda_disable(struct tpda_drvdata *drvdata, int port) +{

• u32 val;
• CS_UNLOCK(drvdata->base);
• val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
• val &= ~TPDA_Pn_CR_ENA;
• writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));
• CS_LOCK(drvdata->base);

+}

+static void tpda_disable(struct coresight_device *csdev, int inport,

• 	   int outport)
  

+{

• struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
• spin_lock(&drvdata->spinlock);
• if (atomic_dec_return(&csdev->refcnt[inport]) == 0)

• __tpda_disable(drvdata, inport);
  

• spin_unlock(&drvdata->spinlock);
• dev_dbg(drvdata->dev, "TPDA inport %d disabled\n", inport);

+}

+static const struct coresight_ops_link tpda_link_ops = {

• .enable = tpda_enable,
• .disable = tpda_disable,

+};

+static const struct coresight_ops tpda_cs_ops = {

• .link_ops = &tpda_link_ops,

+};

+static int tpda_init_default_data(struct tpda_drvdata *drvdata) +{

Is there a register that indicates the number of ports on the device ? We don't seem to be using that information.

• int atid;
• /*

• * TPDA must has a unique atid. This atid can uniquely
  

• * identify the TPDM trace source connected to the TPDA.
  

• */
  

• atid = coresight_trace_id_get_system_id(coresight_get_trace_id_map());
• if (atid < 0)

• return atid;
  

You need to release this id at module exit. Otherwise, we are leaking the id.

Suzuki

Hi Suzuki,

Thanks for the review.

On 7/1/2022 6:24 PM, Suzuki K Poulose wrote:

On 20/06/2022 13:00, Mao Jinlong wrote:

...

TPDA(Trace, Profiling and Diagnostics Aggregator) is to provide packetization, funneling and timestamping of TPDM data. Multiple monitors are connected to different input ports of TPDA.This change is to add tpda enable/disable/probe functions for coresight tpda driver.

- - - -         - - - -        - - - - | TPDM 0|      | TPDM 1 |     | TPDM 2|   - - - -         - - - -        - - - -      |               |             |      |_ _ _ _ _ _    |     _ _ _ _ |                  |   |    |                  |   |    |             ------------------            |        TPDA      |             ------------------

Signed-off-by: Tao Zhang quic_taozha@quicinc.com Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com

---

drivers/hwtracing/coresight/Kconfig          |  11 +   drivers/hwtracing/coresight/Makefile         |   1 +   drivers/hwtracing/coresight/coresight-tpda.c | 206 +++++++++++++++++++   drivers/hwtracing/coresight/coresight-tpda.h |  35 ++++   4 files changed, 253 insertions(+)   create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c   create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h

diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index b2b72a35e416..0cbebfd0d23e 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -205,6 +205,7 @@ config CORESIGHT_TRBE   config CORESIGHT_TPDM       tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver"       select CORESIGHT_LINKS_AND_SINKS +    select CORESIGHT_TPDA       help         This driver provides support for configuring monitor. Monitors are         primarily responsible for data set collection and support the @@ -213,4 +214,14 @@ config CORESIGHT_TPDM         To compile this driver as a module, choose M here: the module will be         called coresight-tpdm.   +config CORESIGHT_TPDA +    tristate "CoreSight Trace, Profiling & Diagnostics Aggregator driver" +    help +      This driver provides support for configuring aggregator. This is +      primarily useful for pulling the data sets from one or more +      attached monitors and pushing the resultant data out. Multiple +      monitors are connected on different input ports of TPDA.

+      To compile this driver as a module, choose M here: the module will be +      called coresight-tpda.   endif diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile index 6bb9b1746bc7..1712d82e7260 100644 --- a/drivers/hwtracing/coresight/Makefile +++ b/drivers/hwtracing/coresight/Makefile @@ -26,5 +26,6 @@ obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o   obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o   obj-$(CONFIG_CORESIGHT_TRBE) += coresight-trbe.o   obj-$(CONFIG_CORESIGHT_TPDM) += coresight-tpdm.o +obj-$(CONFIG_CORESIGHT_TPDA) += coresight-tpda.o   coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \              coresight-cti-sysfs.o diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c new file mode 100644 index 000000000000..7a0478a8b63e --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: GPL-2.0 +/*

• • Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights

reserved.

• */

+#include <linux/amba/bus.h> +#include <linux/bitfield.h> +#include <linux/coresight.h> +#include <linux/device.h> +#include <linux/err.h> +#include <linux/fs.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h>

+#include "coresight-priv.h" +#include "coresight-tpda.h" +#include "coresight-trace-id.h"

+DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda");

+/* Settings pre enabling port control register */ +static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) +{ +    u32 val;

+    val = readl_relaxed(drvdata->base + TPDA_CR);

Even though the drvdata->atid is constant during the life time of the driver, I would recommend clearing the field and then setting it. e.g, if you get a different ATID on unload-load sequence of the driver, the field will corrupted.

I will release the id in module exist function.

val &= ~TPDA_CR_ATID;

...

+    val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid);

...

+    writel_relaxed(val, drvdata->base + TPDA_CR); +}

Is there no global turn-ON for the TPDA ? Or is it per-port enable only via TPDA_Pn_CR ?

No global turn-on for the TPDA.  It is per-port enable via TPDA_Pn_CR.

...

+static void tpda_enable_port(struct tpda_drvdata *drvdata, int port) +{ +    u32 val;

+    val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); +    /* Enable the port */ +    val |= TPDA_Pn_CR_ENA; +    writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port)); +}

+static void __tpda_enable(struct tpda_drvdata *drvdata, int port) +{ +    CS_UNLOCK(drvdata->base);

+    if (!drvdata->csdev->enable) +        tpda_enable_pre_port(drvdata);

+    tpda_enable_port(drvdata, port);

+    CS_LOCK(drvdata->base); +}

+static int tpda_enable(struct coresight_device *csdev, int inport, int outport) +{ +    struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);

+    spin_lock(&drvdata->spinlock); +    if (atomic_read(&csdev->refcnt[inport]) == 0) +        __tpda_enable(drvdata, inport);

+    atomic_inc(&csdev->refcnt[inport]); +    spin_unlock(&drvdata->spinlock);

+    dev_dbg(drvdata->dev, "TPDA inport %d enabled.\n", inport); +    return 0; +}

+static void __tpda_disable(struct tpda_drvdata *drvdata, int port) +{ +    u32 val;

+    CS_UNLOCK(drvdata->base);

+    val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); +    val &= ~TPDA_Pn_CR_ENA; +    writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));

+    CS_LOCK(drvdata->base); +}

+static void tpda_disable(struct coresight_device *csdev, int inport, +               int outport) +{ +    struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);

+    spin_lock(&drvdata->spinlock); +    if (atomic_dec_return(&csdev->refcnt[inport]) == 0) +        __tpda_disable(drvdata, inport);

+    spin_unlock(&drvdata->spinlock);

+    dev_dbg(drvdata->dev, "TPDA inport %d disabled\n", inport); +}

+static const struct coresight_ops_link tpda_link_ops = { +    .enable        = tpda_enable, +    .disable    = tpda_disable, +};

+static const struct coresight_ops tpda_cs_ops = { +    .link_ops    = &tpda_link_ops, +};

+static int tpda_init_default_data(struct tpda_drvdata *drvdata) +{

Is there a register that indicates the number of ports on the device ? We don't seem to be using that information.

No such register.

...

+    int atid; +    /* +     * TPDA must has a unique atid. This atid can uniquely +     * identify the TPDM trace source connected to the TPDA. +     */ +    atid = coresight_trace_id_get_system_id(coresight_get_trace_id_map()); +    if (atid < 0) +        return atid;

You need to release this id at module exit. Otherwise, we are leaking the id.

I will address the comments.

Suzuki