Patch 1 is a resend of https://lore.kernel.org/patchwork/patch/1230367/ since that patch seems to have added the property to replicator node instead of etm7 node either when the patch was applied to the tree.
Patch 2 adds support to skip powering up of ETM to workaround the hardware errata where CPU watchdog counter is stopped when power up bit is set. Depends on https://lore.kernel.org/patchwork/cover/1242100/ changes.
Sai Prakash Ranjan (2): arm64: dts: qcom: sc7180: Support ETMv4 power management arm64: dts: qcom: sc7180: Add support to skip powering up of ETM
arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
Now that deep idle states are properly supported on SC7180, we need to add "coresight-loses-context-with-cpu" property to avoid failure of trace session because of losing context on entering deep idle states.
Reviewed-by: Stephen Boyd swboyd@chromium.org Signed-off-by: Sai Prakash Ranjan saiprakash.ranjan@codeaurora.org ---
Resending this because the last patch sent here - https://lore.kernel.org/patchwork/patch/1230367/ seems to have added "coresight-loses-context-with-cpu" to replicator node instead of etm7 node.
--- arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 4069bb1c93af..8b3707347547 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1656,6 +1656,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu;
out-ports { port { @@ -1674,6 +1675,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu;
out-ports { port { @@ -1692,6 +1694,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu;
out-ports { port { @@ -1710,6 +1713,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu;
out-ports { port { @@ -1728,6 +1732,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu;
out-ports { port { @@ -1746,6 +1751,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu;
out-ports { port { @@ -1764,6 +1770,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu;
out-ports { port { @@ -1782,6 +1789,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu;
out-ports { port {
Hi Bjorn,
On 2020-05-15 16:21, Sai Prakash Ranjan wrote:
Now that deep idle states are properly supported on SC7180, we need to add "coresight-loses-context-with-cpu" property to avoid failure of trace session because of losing context on entering deep idle states.
Reviewed-by: Stephen Boyd swboyd@chromium.org Signed-off-by: Sai Prakash Ranjan saiprakash.ranjan@codeaurora.org
Resending this because the last patch sent here - https://lore.kernel.org/patchwork/patch/1230367/ seems to have added "coresight-loses-context-with-cpu" to replicator node instead of etm7 node.
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 4069bb1c93af..8b3707347547 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1656,6 +1656,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1674,6 +1675,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1692,6 +1694,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1710,6 +1713,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1728,6 +1732,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1746,6 +1751,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1764,6 +1770,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1782,6 +1789,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {
The previous version of this patch in QCOM tree seems to have added the property to replicator node instead of etm7 node, can you please drop that from the tree and apply this one?
Thanks, Sai
On Fri 15 May 03:55 PDT 2020, Sai Prakash Ranjan wrote:
Hi Bjorn,
Hi Sai,
On 2020-05-15 16:21, Sai Prakash Ranjan wrote:
Now that deep idle states are properly supported on SC7180, we need to add "coresight-loses-context-with-cpu" property to avoid failure of trace session because of losing context on entering deep idle states.
Reviewed-by: Stephen Boyd swboyd@chromium.org Signed-off-by: Sai Prakash Ranjan saiprakash.ranjan@codeaurora.org
Resending this because the last patch sent here - https://lore.kernel.org/patchwork/patch/1230367/ seems to have added "coresight-loses-context-with-cpu" to replicator node instead of etm7 node.
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 4069bb1c93af..8b3707347547 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1656,6 +1656,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1674,6 +1675,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1692,6 +1694,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1710,6 +1713,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1728,6 +1732,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1746,6 +1751,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1764,6 +1770,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {@@ -1782,6 +1789,7 @@
clocks = <&aoss_qmp>; clock-names = "apb_pclk";
arm,coresight-loses-context-with-cpu; out-ports { port {The previous version of this patch in QCOM tree seems to have added the property to replicator node instead of etm7 node, can you please drop that from the tree and apply this one?
I'm not able to replace the old commit without rewriting the history of the branch. So I've applied a patch ontop of the branch to fix this up instead.
Please review the branch and let me know if there's any issues.
Regards, Bjorn
Hi Bjorn,
On 2020-05-19 00:21, Bjorn Andersson wrote:
On Fri 15 May 03:55 PDT 2020, Sai Prakash Ranjan wrote:
[...]
The previous version of this patch in QCOM tree seems to have added the property to replicator node instead of etm7 node, can you please drop that from the tree and apply this one?
I'm not able to replace the old commit without rewriting the history of the branch. So I've applied a patch ontop of the branch to fix this up instead.
Please review the branch and let me know if there's any issues.
Thanks for the patch, I checked the branch and its good. Sorry, I should have sent a patch on top of the old one instead of repost.
Thanks, Sai
On Mon 18 May 12:08 PDT 2020, Sai Prakash Ranjan wrote:
Hi Bjorn,
On 2020-05-19 00:21, Bjorn Andersson wrote:
On Fri 15 May 03:55 PDT 2020, Sai Prakash Ranjan wrote:
[...]
The previous version of this patch in QCOM tree seems to have added the property to replicator node instead of etm7 node, can you please drop that from the tree and apply this one?
I'm not able to replace the old commit without rewriting the history of the branch. So I've applied a patch ontop of the branch to fix this up instead.
Please review the branch and let me know if there's any issues.
Thanks for the patch, I checked the branch and its good. Sorry, I should have sent a patch on top of the old one instead of repost.
No worries, now you know for next time. Thanks confirming my fix.
Thanks, Bjorn
Add "qcom,skip-power-up" property to skip powering up ETM on SC7180 SoC to workaround a hardware errata where CPU watchdog counter is stopped when ETM power up bit is set (i.e., when TRCPDCR.PU = 1).
Signed-off-by: Sai Prakash Ranjan saiprakash.ranjan@codeaurora.org ---
Depends on ETM driver change here - https://lore.kernel.org/patchwork/cover/1242100/
--- arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 8b3707347547..de4bae4ec224 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1657,6 +1657,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu; + qcom,skip-power-up;
out-ports { port { @@ -1676,6 +1677,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu; + qcom,skip-power-up;
out-ports { port { @@ -1695,6 +1697,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu; + qcom,skip-power-up;
out-ports { port { @@ -1714,6 +1717,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu; + qcom,skip-power-up;
out-ports { port { @@ -1733,6 +1737,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu; + qcom,skip-power-up;
out-ports { port { @@ -1752,6 +1757,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu; + qcom,skip-power-up;
out-ports { port { @@ -1771,6 +1777,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu; + qcom,skip-power-up;
out-ports { port { @@ -1790,6 +1797,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu; + qcom,skip-power-up;
out-ports { port {
Hi Bjorn,
On 2020-05-15 16:21, Sai Prakash Ranjan wrote:
Add "qcom,skip-power-up" property to skip powering up ETM on SC7180 SoC to workaround a hardware errata where CPU watchdog counter is stopped when ETM power up bit is set (i.e., when TRCPDCR.PU = 1).
Signed-off-by: Sai Prakash Ranjan saiprakash.ranjan@codeaurora.org
Depends on ETM driver change here - https://lore.kernel.org/patchwork/cover/1242100/
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 8b3707347547..de4bae4ec224 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1657,6 +1657,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu;
qcom,skip-power-up; out-ports { port {@@ -1676,6 +1677,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu;
qcom,skip-power-up; out-ports { port {@@ -1695,6 +1697,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu;
qcom,skip-power-up; out-ports { port {@@ -1714,6 +1717,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu;
qcom,skip-power-up; out-ports { port {@@ -1733,6 +1737,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu;
qcom,skip-power-up; out-ports { port {@@ -1752,6 +1757,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu;
qcom,skip-power-up; out-ports { port {@@ -1771,6 +1777,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu;
qcom,skip-power-up; out-ports { port {@@ -1790,6 +1797,7 @@ clocks = <&aoss_qmp>; clock-names = "apb_pclk"; arm,coresight-loses-context-with-cpu;
qcom,skip-power-up; out-ports { port {
I have sent this patch as a part of other coresight changes to keep all coresight DT changes together[1], we can drop this patch now.
[1] - https://lore.kernel.org/patchwork/cover/1253969/
Thanks, Sai
-
Bjorn Andersson -
Sai Prakash Ranjan