On 26/10/2026 05:48, Amir Ayupov wrote:
Drivers outside the PMU driver may need to know whether the local CPU's PMU implements a common event before relying on it, for example a trace unit driver checking that the PMU counts its external outputs as TRCEXTOUTn.
Add pmuv3_event_implemented() to the arm64 asm/arm_pmuv3.h, next to read_pmceid0() and read_pmceid1(). It reads PMCEID0/1 on the calling CPU: events 0x0000-0x003f are reported in bits [31:0], and the common events from ARMV8_PMUV3_EXT_COMMON_EVENT_BASE in bits [63:32] from PMUv3p1. Move ARMV8_PMUV3_EXT_COMMON_EVENT_BASE next to the event numbers in linux/perf/arm_pmuv3.h so it is available without CONFIG_ARM_PMU.
Suggested-by: James Clark james.clark@linaro.org Assisted-by: Devmate:Opus-5.5 Signed-off-by: Amir Ayupov aaupov@fb.com
arch/arm64/include/asm/arm_pmuv3.h | 19 +++++++++++++++++++ include/linux/perf/arm_pmu.h | 1 - include/linux/perf/arm_pmuv3.h | 3 +++ 3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/arm_pmuv3.h b/arch/arm64/include/asm/arm_pmuv3.h index 8a777dec8d88a..acd62c4f16743 100644 --- a/arch/arm64/include/asm/arm_pmuv3.h +++ b/arch/arm64/include/asm/arm_pmuv3.h @@ -173,6 +173,25 @@ static inline bool pmuv3_implemented(int pmuver) pmuver == ID_AA64DFR0_EL1_PMUVer_NI); } +/*
- Whether this CPU's PMU implements a common event, as reported by
- PMCEID{0,1}: events 0x0000-0x003f in bits [31:0], and from PMUv3p1 events
- 0x4000-0x403f in bits [63:32], which read as zero before PMUv3p1.
- Must run on the CPU whose PMU is queried.
- */
+static inline bool pmuv3_event_implemented(u16 event) +{
- bool ext = event >= ARMV8_PMUV3_EXT_COMMON_EVENT_BASE;
- u16 id = ext ? event - ARMV8_PMUV3_EXT_COMMON_EVENT_BASE : event;
- u64 pmceid;
- if (id >= 64 || !pmuv3_implemented(read_pmuver()))
return false;- pmceid = id < 32 ? :() : read_pmceid1();
- return pmceid & BIT_ULL(id % 32 + (ext ? 32 : 0));
+}
- static inline bool is_pmuv3p4(int pmuver) { return pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P4;
diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 02d2c7f45b527..792283d29d7b5 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -124,7 +124,6 @@ struct arm_pmu { u64 reg_brbidr; #define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40 DECLARE_BITMAP(pmceid_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS); -#define ARMV8_PMUV3_EXT_COMMON_EVENT_BASE 0x4000 DECLARE_BITMAP(pmceid_ext_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS);
Could we not avoid this change ? Or why not move both of the definitions ?
Also, I would need an ACK from the arm_pmu maintainers to accept this change via coresight tree.
Cheers Suzuki
/* Only to be used by ACPI probing code */ diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h index d698efba28a27..c21f185a283d6 100644 --- a/include/linux/perf/arm_pmuv3.h +++ b/include/linux/perf/arm_pmuv3.h @@ -78,6 +78,9 @@ #define ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND 0x003E #define ARMV8_PMUV3_PERFCTR_STALL_SLOT 0x003F +/* Base of the common events reported in PMCEID{0,1}[63:32] from PMUv3p1 */ +#define ARMV8_PMUV3_EXT_COMMON_EVENT_BASE 0x4000
- /* Statistical profiling extension microarchitectural events */ #define ARMV8_SPE_PERFCTR_SAMPLE_POP 0x4000 #define ARMV8_SPE_PERFCTR_SAMPLE_FEED 0x4001
On 05/11/2026 14:54, Suzuki K Poulose wrote:
On 26/10/2026 05:48, Amir Ayupov wrote:
Drivers outside the PMU driver may need to know whether the local CPU's PMU implements a common event before relying on it, for example a trace unit driver checking that the PMU counts its external outputs as TRCEXTOUTn.
Add pmuv3_event_implemented() to the arm64 asm/arm_pmuv3.h, next to read_pmceid0() and read_pmceid1(). It reads PMCEID0/1 on the calling CPU: events 0x0000-0x003f are reported in bits [31:0], and the common events from ARMV8_PMUV3_EXT_COMMON_EVENT_BASE in bits [63:32] from PMUv3p1. Move ARMV8_PMUV3_EXT_COMMON_EVENT_BASE next to the event numbers in linux/perf/arm_pmuv3.h so it is available without CONFIG_ARM_PMU.
Suggested-by: James Clark james.clark@linaro.org Assisted-by: Devmate:Opus-5.5 Signed-off-by: Amir Ayupov aaupov@fb.com
arch/arm64/include/asm/arm_pmuv3.h | 19 +++++++++++++++++++ include/linux/perf/arm_pmu.h | 1 - include/linux/perf/arm_pmuv3.h | 3 +++ 3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/arm_pmuv3.h b/arch/arm64/include/ asm/arm_pmuv3.h index 8a777dec8d88a..acd62c4f16743 100644 --- a/arch/arm64/include/asm/arm_pmuv3.h +++ b/arch/arm64/include/asm/arm_pmuv3.h @@ -173,6 +173,25 @@ static inline bool pmuv3_implemented(int pmuver) pmuver == ID_AA64DFR0_EL1_PMUVer_NI); } +/*
- Whether this CPU's PMU implements a common event, as reported by
- PMCEID{0,1}: events 0x0000-0x003f in bits [31:0], and from PMUv3p1
events
- 0x4000-0x403f in bits [63:32], which read as zero before PMUv3p1.
- Must run on the CPU whose PMU is queried.
- */
+static inline bool pmuv3_event_implemented(u16 event) +{ + bool ext = event >= ARMV8_PMUV3_EXT_COMMON_EVENT_BASE; + u16 id = ext ? event - ARMV8_PMUV3_EXT_COMMON_EVENT_BASE : event; + u64 pmceid;
+ if (id >= 64 || !pmuv3_implemented(read_pmuver())) + return false;
+ pmceid = id < 32 ? :() : read_pmceid1(); + return pmceid & BIT_ULL(id % 32 + (ext ? 32 : 0)); +}
static inline bool is_pmuv3p4(int pmuver) { return pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P4; diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 02d2c7f45b527..792283d29d7b5 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -124,7 +124,6 @@ struct arm_pmu { u64 reg_brbidr; #define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40 DECLARE_BITMAP(pmceid_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS); -#define ARMV8_PMUV3_EXT_COMMON_EVENT_BASE 0x4000 DECLARE_BITMAP(pmceid_ext_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS);
Could we not avoid this change ? Or why not move both of the definitions ?
I don't think you can avoid it unless you redefine it. But the place it's moved to has similar event number definitions, so it seems ok to me.
Moving both makes sense though.
Also, I would need an ACK from the arm_pmu maintainers to accept this change via coresight tree.
Cheers Suzuki
/* Only to be used by ACPI probing code */ diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/ arm_pmuv3.h index d698efba28a27..c21f185a283d6 100644 --- a/include/linux/perf/arm_pmuv3.h +++ b/include/linux/perf/arm_pmuv3.h @@ -78,6 +78,9 @@ #define ARMV8_PMUV3_PERFCTR_STALL_SLOT_FRONTEND 0x003E #define ARMV8_PMUV3_PERFCTR_STALL_SLOT 0x003F +/* Base of the common events reported in PMCEID{0,1}[63:32] from PMUv3p1 */ +#define ARMV8_PMUV3_EXT_COMMON_EVENT_BASE 0x4000
/* Statistical profiling extension microarchitectural events */ #define ARMV8_SPE_PERFCTR_SAMPLE_POP 0x4000 #define ARMV8_SPE_PERFCTR_SAMPLE_FEED 0x4001
-
James Clark -
Suzuki K Poulose