This set addresses 3 problems observed with the CLAIM tag feature. The first patch adds support for CLAIM tags to the ETB10 drivers. The second and third patch deal with releasing the tags on ETF and ETM3x devices.
Review and testing would be appreciated.
Regards, Mathieu
Mathieu Poirier (3): coresight: etb10: Add support for CLAIM tag coresight: etf: Release CLAIM tag after disabling the HW coresight: etm3x: Release CLAIM tag when operated from perf
drivers/hwtracing/coresight/coresight-etb10.c | 23 +++++++++++++++++------ drivers/hwtracing/coresight/coresight-etm3x.c | 2 ++ drivers/hwtracing/coresight/coresight-tmc-etf.c | 2 +- 3 files changed, 20 insertions(+), 7 deletions(-)
Following in the footstep of what was done for other CoreSight devices, add CLAIM tag support to ETB10 in order to synchronise access to the HW between the kernel and an external agent.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/hwtracing/coresight/coresight-etb10.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 824be0c5f592..105782ea64c7 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -136,6 +136,11 @@ static void __etb_enable_hw(struct etb_drvdata *drvdata)
static int etb_enable_hw(struct etb_drvdata *drvdata) { + int rc = coresight_claim_device(drvdata->base); + + if (rc) + return rc; + __etb_enable_hw(drvdata); return 0; } @@ -223,7 +228,7 @@ static int etb_enable(struct coresight_device *csdev, u32 mode, void *data) return 0; }
-static void etb_disable_hw(struct etb_drvdata *drvdata) +static void __etb_disable_hw(struct etb_drvdata *drvdata) { u32 ffcr;
@@ -313,6 +318,13 @@ static void etb_dump_hw(struct etb_drvdata *drvdata) CS_LOCK(drvdata->base); }
+static void etb_disable_hw(struct etb_drvdata *drvdata) +{ + __etb_disable_hw(drvdata); + etb_dump_hw(drvdata); + coresight_disclaim_device(drvdata->base); +} + static void etb_disable(struct coresight_device *csdev) { struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -323,7 +335,6 @@ static void etb_disable(struct coresight_device *csdev) /* Disable the ETB only if it needs to */ if (drvdata->mode != CS_MODE_DISABLED) { etb_disable_hw(drvdata); - etb_dump_hw(drvdata); drvdata->mode = CS_MODE_DISABLED; } spin_unlock_irqrestore(&drvdata->spinlock, flags); @@ -402,7 +413,7 @@ static unsigned long etb_update_buffer(struct coresight_device *csdev,
capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
- etb_disable_hw(drvdata); + __etb_disable_hw(drvdata); CS_UNLOCK(drvdata->base);
/* unit is in words, not bytes */ @@ -510,7 +521,7 @@ static unsigned long etb_update_buffer(struct coresight_device *csdev, handle->head = (cur * PAGE_SIZE) + offset; to_read = buf->nr_pages << PAGE_SHIFT; } - etb_enable_hw(drvdata); + __etb_enable_hw(drvdata); CS_LOCK(drvdata->base);
return to_read; @@ -534,9 +545,9 @@ static void etb_dump(struct etb_drvdata *drvdata)
spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->mode == CS_MODE_SYSFS) { - etb_disable_hw(drvdata); + __etb_disable_hw(drvdata); etb_dump_hw(drvdata); - etb_enable_hw(drvdata); + __etb_enable_hw(drvdata); } spin_unlock_irqrestore(&drvdata->spinlock, flags);
Hi Mathieu,
On 05/11/2018 22:26, Mathieu Poirier wrote:
Following in the footstep of what was done for other CoreSight devices, add CLAIM tag support to ETB10 in order to synchronise access to the HW between the kernel and an external agent.
Thanks for spotting this. Somehow I missed the etb10 in the original series.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org
Reviewed-by: Suzuki K Poulose suzuki.poulose@arm.com
This patch rectifies the sequence of events in function tmc_etb_disable_hw() by disabling the HW first and then releasing the CLAIM tag. Otherwise we could be corrupting the configuration done by an external agent that would have claimed the device after we have released it.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 5864ac55e275..a5f053f2db2c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -86,8 +86,8 @@ static void __tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) { - coresight_disclaim_device(drvdata->base); __tmc_etb_disable_hw(drvdata); + coresight_disclaim_device(drvdata->base); }
static void __tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
On 05/11/2018 22:26, Mathieu Poirier wrote:
This patch rectifies the sequence of events in function tmc_etb_disable_hw() by disabling the HW first and then releasing the CLAIM tag. Otherwise we could be corrupting the configuration done by an external agent that would have claimed the device after we have released it.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org
drivers/hwtracing/coresight/coresight-tmc-etf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 5864ac55e275..a5f053f2db2c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -86,8 +86,8 @@ static void __tmc_etb_disable_hw(struct tmc_drvdata *drvdata) static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) {
- coresight_disclaim_device(drvdata->base); __tmc_etb_disable_hw(drvdata);
- coresight_disclaim_device(drvdata->base); }
Well spotted.
Reviewed-by: Suzuki K Poulose suzuki.poulose@arm.com
This patch deals with the release of the CLAIM tag when the ETM is operated from perf. Otherwise the tag is left asserted and subsequent requests to use the device fail.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org --- drivers/hwtracing/coresight/coresight-etm3x.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index fd5c4cca7db5..000796394662 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -603,6 +603,8 @@ static void etm_disable_perf(struct coresight_device *csdev) */ etm_set_pwrdwn(drvdata);
+ coresight_disclaim_device_unlocked(drvdata->base); + CS_LOCK(drvdata->base); }
Hi Mathieu,
On Mon, Nov 05, 2018 at 03:26:30PM -0700, Mathieu Poirier wrote:
This patch deals with the release of the CLAIM tag when the ETM is operated from perf. Otherwise the tag is left asserted and subsequent requests to use the device fail.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org
drivers/hwtracing/coresight/coresight-etm3x.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index fd5c4cca7db5..000796394662 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -603,6 +603,8 @@ static void etm_disable_perf(struct coresight_device *csdev) */ etm_set_pwrdwn(drvdata);
- coresight_disclaim_device_unlocked(drvdata->base);
Just remind, this isn't consistent with the sequency in function etm_disable_hw(), which has the reversed sequence between etm_set_pwrdwn() and coresight_disclaim_device_unlocked().
Not sure which one sequence is more suitable, at the first glance, accessing register after pwrdwn related operation might have risk for deadlock?
Thanks, Leo Yan
CS_LOCK(drvdata->base); } -- 2.7.4
Leo,
On 07/11/2018 03:23, leo.yan@linaro.org wrote:
Hi Mathieu,
On Mon, Nov 05, 2018 at 03:26:30PM -0700, Mathieu Poirier wrote:
This patch deals with the release of the CLAIM tag when the ETM is operated from perf. Otherwise the tag is left asserted and subsequent requests to use the device fail.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org
drivers/hwtracing/coresight/coresight-etm3x.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index fd5c4cca7db5..000796394662 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -603,6 +603,8 @@ static void etm_disable_perf(struct coresight_device *csdev) */ etm_set_pwrdwn(drvdata);
- coresight_disclaim_device_unlocked(drvdata->base);
Just remind, this isn't consistent with the sequency in function etm_disable_hw(), which has the reversed sequence between etm_set_pwrdwn() and coresight_disclaim_device_unlocked().
Not sure which one sequence is more suitable, at the first glance, accessing register after pwrdwn related operation might have risk for deadlock?
Good point.
I assume that the CLAIMSET/CLR registers are in the same power domain as the LAR (Software Lock Access register) accessed below. But I will confirm this with the architect. Based on the response, we could streamline both the sequences.
Suzuki
Thanks, Leo Yan
CS_LOCK(drvdata->base); } -- 2.7.4
On Thu, 8 Nov 2018 at 02:49, Suzuki K Poulose suzuki.poulose@arm.com wrote:
Leo,
On 07/11/2018 03:23, leo.yan@linaro.org wrote:
Hi Mathieu,
On Mon, Nov 05, 2018 at 03:26:30PM -0700, Mathieu Poirier wrote:
This patch deals with the release of the CLAIM tag when the ETM is operated from perf. Otherwise the tag is left asserted and subsequent requests to use the device fail.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org
drivers/hwtracing/coresight/coresight-etm3x.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index fd5c4cca7db5..000796394662 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -603,6 +603,8 @@ static void etm_disable_perf(struct coresight_device *csdev) */ etm_set_pwrdwn(drvdata);
- coresight_disclaim_device_unlocked(drvdata->base);
Just remind, this isn't consistent with the sequency in function etm_disable_hw(), which has the reversed sequence between etm_set_pwrdwn() and coresight_disclaim_device_unlocked().
Not sure which one sequence is more suitable, at the first glance, accessing register after pwrdwn related operation might have risk for deadlock?
Good point.
I assume that the CLAIMSET/CLR registers are in the same power domain as the LAR (Software Lock Access register) accessed below. But I will confirm this with the architect. Based on the response, we could streamline both the sequences.
In this case etm_set_pwrdwn() sets bit 0 of ETMCR, which disables the ETM. That being said the Embedded Trace Macrocell Architecture Specification (ID101211) mentions in section 3.5.1 that despite ETMCR bit 0 being set to 1, it is always possible to write to the claim set registers. As such I moved the release of the claim tag in function etm_disable_hw() below etm_set_pwrdwn() in the second revision of this set [1].
[1]. https://lkml.org/lkml/2018/11/8/223
Suzuki
Thanks, Leo Yan
CS_LOCK(drvdata->base);}
-- 2.7.4
-
leo.yan＠linaro.org -
Mathieu Poirier -
Suzuki K Poulose