Linaro-mm-sig October 2026

linaro-mm-sig@lists.linaro.org

21 participants
57 discussions

Re: [PATCH v7 06/13] nvme-pci: implement dma-buf backed requests

by Christoph Hellwig

On Mon, Sep 28, 2026 at 02:32:22PM +0100, Pavel Begunkov wrote: > +static void nvme_dmabuf_map_sync_for_cpu(struct nvme_dev *nvme_dev, > + struct request *req) > +{ > + struct device *dev = nvme_dev->dev; > + enum dma_data_direction dma_dir; > + struct bio *bio = req->bio; > + struct nvme_dmabuf_map *map = to_nvme_dmabuf_map(bio->bi_dmabuf_map); > + > + dma_dir = rq_data_dir(req) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE; > + dma_sync_sgtable_for_cpu(dev, map->sgt, dma_dir); This can use rq_dma_dir in the argument. Same for the other DMA API calls. Btw, given how larger the dmabuf code is now, have you considered splitting it into a new nvme-pci-dmabuf.c file?

2 weeks, 2 days

Re: [PATCH v7 06/13] nvme-pci: implement dma-buf backed requests

by Christophe JAILLET

Le 28/09/2026 à 15:32, Pavel Begunkov a écrit : > Enable BIO_DMABUF_MAP backed requests. On registration we map the > dma-buf and store it as a prp list, which is then used to initialise > requests. All attached contexts are stored in a new list dmabuf_ctxs, > and additions/removals are synchronised with dmabuf_lock. > > Suggested-by: Keith Busch <kbusch(a)kernel.org> > Signed-off-by: Pavel Begunkov <asml.silence(a)gmail.com> Hi, a few nitpick below, should it help. > --- > drivers/nvme/host/core.c | 12 ++ > drivers/nvme/host/nvme.h | 2 + > drivers/nvme/host/pci.c | 308 +++++++++++++++++++++++++++++++++++++++ > 3 files changed, 322 insertions(+) > [...] > diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c > index a953c0697f99..e58bdd9a4098 100644 > --- a/drivers/nvme/host/pci.c > +++ b/drivers/nvme/host/pci.c > @@ -27,6 +27,8 @@ > #include <linux/io-64-nonatomic-lo-hi.h> > #include <linux/io-64-nonatomic-hi-lo.h> > #include <linux/sed-opal.h> > +#include <linux/dma-buf-io.h> > +#include <linux/dma-resv.h> Move up, to keep better alphabetical order ? > > #include "trace.h" > #include "nvme.h" > @@ -318,6 +320,8 @@ struct nvme_dev { > bool hmb; > struct sg_table *hmb_sgt; > mempool_t *dmavec_mempool; > + struct list_head dmabuf_ctxs; > + struct mutex dmabuf_lock; > > /* shadow doorbell buffer support: */ > __le32 *dbbuf_dbs; > @@ -397,6 +401,13 @@ struct nvme_queue { > struct completion delete_done; > }; > > +struct nvme_dmabuf_map { > + struct dma_buf_io_map base; > + struct sg_table *sgt; > + unsigned nr_entries; > + dma_addr_t dma_list[]; Add __counted_by(nr_entries) and update nvme_dma_buf_io_map() so that nr_entries is set at the right time ? > +}; > + > /* bits for iod->flags */ > enum nvme_iod_flags { > /* this command has been aborted by the timeout handler */ ... > +static struct dma_buf_io_map *nvme_dma_buf_io_map(struct dma_buf_io_ctx *ctx) > +{ > + unsigned nr_entries = ctx->dmabuf->size / NVME_CTRL_PAGE_SIZE; > + struct nvme_dma_buf_io_ctx *nvme_ctx = ctx->dev_priv; > + struct dma_buf_attachment *attach = nvme_ctx->attach; > + unsigned long tmp, i = 0; > + struct nvme_dmabuf_map *map; > + struct scatterlist *sg; > + struct sg_table *sgt; > + int ret; > + > + dma_resv_assert_held(ctx->dmabuf->resv); > + > + map = kvmalloc_flex(*map, dma_list, nr_entries); > + if (!map) > + return ERR_PTR(-ENOMEM); > + > + sgt = dma_buf_map_attachment(attach, ctx->dir); > + if (IS_ERR(sgt)) { > + ret = PTR_ERR(sgt); > + sgt = NULL; > + goto err; > + } > + > + for_each_sgtable_dma_sg(sgt, sg, tmp) { > + dma_addr_t dma_addr = sg_dma_address(sg); > + unsigned long sg_len = sg_dma_len(sg); > + > + if ((sg_len % NVME_CTRL_PAGE_SIZE) || > + (dma_addr % NVME_CTRL_PAGE_SIZE)) { > + ret = -EINVAL; > + goto err; > + } > + while (sg_len) { > + map->dma_list[i++] = dma_addr; > + dma_addr += NVME_CTRL_PAGE_SIZE; > + sg_len -= NVME_CTRL_PAGE_SIZE; > + } > + } > + > + ret = dma_buf_io_init_map(ctx, &map->base, sgt); > + if (ret) > + goto err; > + map->nr_entries = nr_entries; > + map->sgt = sgt; > + return &map->base; > +err: > + if (sgt) > + dma_buf_unmap_attachment(attach, sgt, ctx->dir); > + kfree(map); kvfree()? > + return ERR_PTR(ret); > +} ... CJ

2 weeks, 2 days

Re: [PATCH v7 05/13] block: add dma-buf support for raw bdev

by Christoph Hellwig

On Mon, Sep 28, 2026 at 02:32:21PM +0100, Pavel Begunkov wrote: > Add a simple proxy implementation of init_dma_buf_io_ctx() forwarding > the call to a new struct block_device_operations operation. Also reject > dma-buf backed iterators for buffered IO. > > Reviewed-by: Christoph Hellwig <hch(a)lst.de> > [pavel: reject dma-buf without O_DIRECT] > Signed-off-by: Pavel Begunkov <asml.silence(a)gmail.com> The Sashiko report about the errno on fallback here looks real, and is probably easily fixed by setting a proper errno.

2 weeks, 2 days

Re: [PATCH v7 02/13] iov_iter: add iterator type for dmabuf maps

by Christoph Hellwig

On Mon, Sep 28, 2026 at 02:32:18PM +0100, Pavel Begunkov wrote: > Introduce a new iterator type for dmabuf maps. The map in an opaque > object with internals and format specific to the subsystem / driver, and > only it can use that subsystem / driver for issuing IO. The task of the > middle layers is to pass the map / iterator further down, maybe doing > basic splitting and length checking. The iterator can only be used by > operations of the file the associated map was created for. > > Suggested-by: Keith Busch <kbusch(a)kernel.org> > Reviewed-by: Christoph Hellwig <hch(a)lst.de> > Signed-off-by: Pavel Begunkov <asml.silence(a)gmail.com> FYI, I think the Sashiko complaint about iterate_and_advance2 is correct here. We don't really hit that in the series, but leaving iov_iter methods partially implemented and fall through to others seems dangerous. At minimum that needs a WARN_ON to catch that case.

2 weeks, 2 days

[PATCH v7 0/9] vfio/pci: Add mmap() for DMABUFs

by Matt Evans

Hi all, The goal of this series is to enable userspace driver designs that use VFIO to export DMABUFs representing subsets of PCI device BARs, and "vend" those buffers from a primary process to other subordinate processes by fd. This is achieved by allowing the processes to mmap() the DMABUFs; their access to the device is isolated to the exported ranges. The primary userspace driver process can forcibly revoke access to previously-shared buffers upon cleanup (without requiring cooperation from the subordinate processes). This is an improvement on sharing the VFIO device fd to subordinate processes, which would allow global access. See the RFCs for background. The existing VFIO PCI BAR mmap() becomes backed by a DMABUF too, keeping common vm_ops and fault handler for VMAs from the VFIO device and explicitly-exported DMABUFs. This will help future iommufd emulation of VFIO Type1 peer-to-peer, making it easier to get a DMABUF for a VFIO BAR as a DMA target. Below are per-patch notes & background info, and at the bottom are several related questions that reviewers may like to consider (worth at least skipping to #1, a possible bug). Notes on patches ================ mmap() conversion to use DMABUF underneath has been done for vfio-pci, but not sub-drivers: nvgrace-gpu's mmap() override path is unchanged; I kept this out of scope for now not least because I don't have a thorough test setup for this system. I would prefer to help the nvgrace-gpu maintainers enable BAR mmap() DMABUFs themselves. vfio/pci: Remove DMABUF export dependency on vdev->memory_lock In v5 of this series we discover that doing an export from the VFIO mmap() path (fundamental!) adds a dependency between mmap_lock and vdev->memory_lock(W) because export was using memory_lock(W) to protect the vdev->dmabufs list and state within, and a deadlock scenario leapt out to bite: https://lore.kernel.org/kvm/9a615f22-c0d4-46ae-9654-db11e94e5fec@ozlabs.org/ The suggestion was to add a dedicated mutex/rwsem specifically for the DMABUFs/list, which is cleaner than overloading memory_lock(W). But whilst export could now downgrade to holding memory_lock(R) to test __vfio_pci_memory_enabled(), a very similar deadlock can still arise due to a memory_lock(W) elsewhere depending on a prior memory_lock(R) to be released, and attempting to take memory_lock(R) will queue behind the (W) for fairness (effectively an R->R dependency). I'd overlooked that rwsem cannot guarantee multiple readers. To be able to export while holding mmap_lock, export cannot hold memory_lock at all. Instead of testing __vfio_pci_memory_enabled() (which tracks PCI_COMMAND.MSE and PM state), this patch tracks device-global DMABUF revocation state in a new vdev->bars_revoked flag updated by vfio_pci_dma_buf_move(). If an mmap() is somehow performed during a period when DMABUFs are all revoked, then the DMABUF is created revoked. Move() already bookends reset, PM transitions etc., so subsequent revocation state changes work as-is. This flag is also protected by the dmabuf_lock and thus memory_lock is not required to export. vfio/pci: Un-revoke DMABUFs in LOW_POWER_ENTRY_WITH_WAKEUP resume On LOW_POWER entry, DMABUFs have a move(revoke=true), but the runtime resume path didn't un-revoke. This adds a corresponding move(revoke=false), which will later turn into vfio_pci_unrevoke_bars(). NOTE: the unrevoke is reordered _before_ the eventfd_signal() in vfio_pci_core_runtime_resume() to remove a window in which a waking waiter could have observed the DMABUF state as still revoked (or pm_runtime_engaged = true). (The UAPI docs state the event means the resume's complete, so observing otherwise seemed unintended.) Also, when DMABUFs are later mmap()ed, a waiter waking and taking a fault could have seen the unrevoked state and SIGBUS just before taking the memory_lock. (If the handler gets to acquire the lock, though, the resume sequence is complete, and the handler observes pm_runtime_engaged = false.) This fix is in this series because the issue will impact CPU access to the VMA as well (once they use DMABUFs), and so it's a strict dependency of later commits. dma-buf: Provide dma_buf_set_name() Makes dma_buf_set_name() available for use (by helper patch), taking a kernel-allocated string. The pre-existing local helper becomes a wrapper copying a __user string for the set-name ioctl. vfio/pci: Add a helper to look up PFNs for DMABUFs Adds a DMABUF VMA fault handler helper to determine arbitrary-sized PFNs from ranges in DMABUF. vfio/pci: Add a helper to create a DMABUF for a BAR-map VMA Refactors DMABUF export for use by the existing export feature, and adds a helper that creates a DMABUF corresponding to a VFIO BAR mmap() request. There was a request for decent debug naming in /proc/<pid>/maps etc. comparable to the existing VFIO names: since the VMAs are DMABUFs, they have a "dmabuf:" prefix and can't be 100% identical to before. This is a user-visible change, but this patch at least now gives us extra info on the BDF & BAR being mmap()ed. The name is installed with the new dma_buf_set_name() above. vfio/pci: Convert BAR mmap() to use a DMABUF The vfio-pci core mmap() creates a DMABUF with the helper above, and the vm_ops fault handler uses the other helper to resolve the fault. Because this depends on DMABUF structs/code, CONFIG_VFIO_PCI_CORE needs to depend on CONFIG_DMA_SHARED_BUFFER. The CONFIG_VFIO_PCI_DMABUF still conditionally enables the export support code. NOTE: The user mmap()s a device fd, but the resulting VMA's vm_file becomes that of the DMABUF. The DMABUF takes ownership of the device file and put()s it on release, which maintains the existing behaviour of a VMA keeping the VFIO device open. BAR zapping then happens via the existing vfio_pci_dma_buf_move() path, which now needs to unmap PTEs in the DMABUF's address_space. NOTE: As local LLM reviews did, Sashiko might falsely worry about the DMABUF fd being obtained through /proc/pid/map_files and remapped, but the file is an anon inode and doesn't support the open op (-ENXIO) so AFAICT this is currently impossible. NOTE: A side-effect of this is that is_mergeable_vma() will be false between adjacent mappings of VFIO BARs; merging would require rebuilding a larger DMABUF representing the union, not just plugging the VMAs together. The DMABUF backing the BAR is an implicit/internal export, even when the CONFIG_VFIO_PCI_DMABUF feature is not included because CONFIG_PCI_P2PDMA is not available. Without P2PDMA, it's acceptable for the DMABUF to not have a P2PDMA provider. In this configuration, the VFIO DMABUF .attach prohibits any import, which avoids getting as far as a WARN in dma_buf_map_attachment(), which would fail without P2PDMA anyway. vfio/pci: Clean up BAR zap and revocation In general (see NOTE!) the vfio_pci_zap_bars() is now obsolete, since it unmaps PTEs in the VFIO device address_space which is now unused. This consolidates all calls (e.g. around reset) with the neighbouring vfio_pci_dma_buf_move()s into new functions, to revoke/unrevoke (making the steps clearer). NOTE: Because drivers can use their own vm_ops and override .mmap, the core must conservatively assume an overridden .mmap might still add PTEs to the VFIO device address_space and therefore still does the zap. A new flag, zap_bars_on_revoke, enables the zap when .mmap is overridden. A driver that does not need the zap can clear this to opt-out, e.g. if the driver calls down to the common mmap (and so uses DMABUFs). hisi-acc-vfio-pci does just this, and thus sets the opt-out flag. vfio/pci: Support mmap() of a VFIO DMABUF Adds mmap() for a DMABUF fd exported from vfio-pci. It was a goal to keep the VFIO device fd lifetime behaviour unchanged with respect to the DMABUFs. An application can close all device fds, and this will revoke/clean up all DMABUFs; then, no mappings or other access can be performed. When enabling mmap() of the DMABUFs, this means access through the VMA is also revoked. This complicates the fault handler because whilst the DMABUF exists, it has no guarantee that the corresponding VFIO device is still alive. Adds synchronisation ensuring the vdev is available before the locks in vdev are touched; this holds the device registration so that even if the buffer has been cleaned up, vdev hasn't been freed and so the locks can be safely taken. vfio/pci: Revoke a DMABUF on request from userspace This is mostly a rename of `revoked` to an enum, `status`, and adding a third state for a buffer: usable, revoked temporary, revoked permanent. A new VFIO feature is added, VFIO_DEVICE_FEATURE_DMA_BUF_REVOKE, which takes a DMABUF (exported from the same device) and permanently revokes it. Thus a userspace driver can guarantee any downstream consumers of a shared fd are prevented from accessing a BAR range, and that range can be reused. NOTE: This might block userspace, waiting on importers to detach. The code doing revocation in vfio_pci_dma_buf_move() is moved, to a common function used by ..._move() and this new feature. Testing ======= (The [RFC ONLY] userspace test program, which drives a QEMU bochs-display function, can be found in the GitHub branch below. It at least illustrates how the export, map, revoke, and close semantics interoperate. WIP on a follow-up with a proper vfio-selftests style test based on this -- this won't be part of this series.) This code has been tested in mapping DMABUFs of single/multiple ranges from multiple BARs, aliasing mmap()s, aliasing ranges across DMABUFs, vm_pgoff > 0, revocation, shutdown/cleanup scenarios, and hugepage mappings. No regressions observed on the VFIO selftests, or on our internal vfio-pci applications. VFIO on i386 has been build-tested. Thanks to Alex Mastro for building a (WIP) testcase for the prior mmap_lock->memory_lock issue. Dear Reviewers, =============== Along the way several related issues came up that warrant more eyes, and I'd be grateful for your input: 1. If VFIO fd is opened O_RDONLY, it currently can't be mmap()ed (because PROT_WRITE is rejected in do_mmap(), and PROT_READ alone drops the VM_SHARED so VFIO's mmap rejects it). BUT it seems we can export a DMABUF from it, and then pass the resulting fd around for P2P writes. I don't know if this is intentional/relied on/a known limitation, or a bug? a) We could reject export w/ -EPERM unless the device fd's f_mode has O_RDWR, to reflect the RW abilities of P2P If we agree it's a bug, I want to do this fix (a), as we can now export a DMABUF RW from an O_RDONLY device fd and then succeed to mmap() the DMABUF with RW. (That said, even with an O_RDONLY device fd, the device state can still be changed/reset. But it feels cleaner to prevent export for a O_RDONLY device fd, and match the device fd mmap() behaviour.) In future, we could consider finer-grained RD/WR if there's a future goal to tie DMABUF permissions to, say, iommufd IOMMU_READ/IOMMU_WRITE permissions: b) Instead of just failing if !O_RDWR, we could limit the get_dma_buf.open_flags to the VFIO device fd's f_mode, such as: VFIO device fd perms: Export flags: Result: O_RDWR O_RDWR, O_RDONLY OK O_RDONLY O_RDONLY OK O_RDONLY O_RDWR -EPERM O_WRONLY * -EPERM * O_WRONLY -EPERM (Skipping WRONLY because a PROT_WRITE-only mmap() won't work, though it probably should be included for P2P.) 2. The mmap fault handler takes a bunch of locks non-interruptibly, and potentially depends on a lot of DMABUF-related activities completing. I'd had a go at converting them to interruptible/killable forms, but that revealed there seems to be a wider issue if move/revoke doesn't complete in a timely fashion (due to buggy importers). Where I got to was that just updating the fault handler won't fix the user experience of an unkillable task, and move()/revocation will need thought too. I don't intend to fix this here but wanted to start discussion so we can address it in a follow up. There's now a dependency between mmap_lock in the fault handler and the DMABUF resv (which might take a while to resolve), though revocation will be rare in practice. 3. vfio_basic_config_write() has an error path if vfio_default_config_write() fails that releases memory_lock but doesn't un-revoke BARs in the case of PCI_COMMAND.MSE being cleared. When can the write fail, in practice, perhaps surprise removal? The effect on this series would be: a write of MSE=0 revokes BARs, vconfig[PCI_COMMAND]'s MSE becomes 0, but if the physical write fails then the physical MSE remains 1 and BAR VMAs stay revoked. This seemed a mess; fixing isn't as simple as un-revoking on the error path since vfio_default_config_write() has already trampled vconfig so that'd need unwinding. It felt like a catastrophic scenario where BARs staying revoked isn't a bad outcome, but want to hear your experience of the likelihood of this issue. 4. The exchange of a VFIO fd mmap()'s vma->vm_file with an implicitly created DMABUF's file has implications on LSM. For example, an mmap will be checked against the policy for a VFIO fd, but a subsequent mprotect() relates to the policy of the DMABUF file (which is anon/unique to the mapping). This is pretty confusing. END === This is based on v7.3-rc4 These commits are on GitHub for easier browsing, along with "[RFC ONLY] selftests: vfio: Add standalone vfio_dmabuf_mmap_test": https://github.com/metamev/linux/compare/v7.3-rc4...dev/mev/vfio-dmabuf-mma… Thanks for reading, Matt ================================================================================ Changelog: v7: - Rebased, v7.3-rc4 - "dma-buf: Export dma_buf_set_name()" is now "dma-buf: Provide dma_buf_set_name()": reworded commit message with rationale, and indicate it is only expected to be used by exporters. Remove static helper for user ioctl & copy from user inline in the ioctl. - "vfio/pci: Permanently revoke a DMABUF on request" is now "vfio/pci: Revoke a DMABUF on request from userspace", with a clarified commit message, and removal of "temporary/permanent" language. This still replaces the priv->revoked flag with an enum/third state, named OK/REVOKED for the existing two. The new state, DEAD, is "sticky" from the VFIO-internal perspective, meaning it prevents any of the move-style transitions from REVOKED back to OK, guaranteeing that a DEAD buffer cannot ever be attached/mapped by a new or existing importer. Clarified language around attach vs map to not imply a racing import will be detached; it might attach, but cannot map (and has no existing maps) after the ioctl returns. - Reworded several commit messages for more clarity/brevity. - "vfio/pci: Add a helper to create a DMABUF for a BAR-map VMA": As of the recent e8efdf02d3a97 ("vfio: Enable cdev noiommu mode under iommufd") dev_name() can be much larger (e.g. noiommu_vfio1048575) and the discovery that drivers/pci/controller/vmd.c (others?) could create a domain up to MAX_INT means there isn't a nice way to guarantee a debug name is available across all cdev names and maximum sizes of all properties (e.g. 1M cdevs, 4G domains). So, removed the cdev name from the debug name construction, which now looks like 'vfio:0001:02:03.4/5'. The cdev can be fished out of sysfs given the domain+BDF, and it's still useful debug. Adjusted comments & commit message. v6: https://lore.kernel.org/all/20260911214200.33793-1-matt@ozlabs.org/ v5: https://lore.kernel.org/all/20260715174737.15287-1-matt@ozlabs.org/ v4: https://lore.kernel.org/all/20260701171245.90111-1-matt@ozlabs.org/ v3: https://lore.kernel.org/all/20260610154327.37758-1-matt@ozlabs.org/ v2: https://lore.kernel.org/all/20260527102319.100128-1-mattev@meta.com/ v1: https://lore.kernel.org/kvm/20260416131815.2729131-1-mattev@meta.com/ RFCv2: https://lore.kernel.org/kvm/20260312184613.3710705-1-mattev@meta.com/ RFCv1: https://lore.kernel.org/all/20260226202211.929005-1-mattev@meta.com/ Tech topic: https://lore.kernel.org/linux-iommu/20250918214425.2677057-1-amastro@fb.com/ Matt Evans (9): vfio/pci: Remove DMABUF export dependency on vdev->memory_lock vfio/pci: Un-revoke DMABUFs in LOW_POWER_ENTRY_WITH_WAKEUP resume dma-buf: Provide dma_buf_set_name() vfio/pci: Add a helper to look up PFNs for DMABUFs vfio/pci: Add a helper to create a DMABUF for a BAR-map VMA vfio/pci: Convert BAR mmap() to use a DMABUF vfio/pci: Clean up BAR zap and revocation vfio/pci: Support mmap() of a VFIO DMABUF vfio/pci: Revoke a DMABUF on request from userspace drivers/dma-buf/dma-buf.c | 78 ++- drivers/vfio/pci/Kconfig | 4 +- drivers/vfio/pci/Makefile | 3 +- .../vfio/pci/hisilicon/hisi_acc_vfio_pci.c | 14 +- drivers/vfio/pci/vfio_pci_config.c | 30 +- drivers/vfio/pci/vfio_pci_core.c | 222 +++++-- drivers/vfio/pci/vfio_pci_dmabuf.c | 609 +++++++++++++++--- drivers/vfio/pci/vfio_pci_priv.h | 54 +- include/linux/dma-buf.h | 2 + include/linux/vfio_pci_core.h | 3 + include/uapi/linux/vfio.h | 24 + 11 files changed, 856 insertions(+), 187 deletions(-) -- 2.50.1 (Apple Git-155)

2 weeks, 5 days

Re: [PATCH 2/3] iio: adc: add stm32 mdf support

by Krzysztof Kozlowski

On Thu, Oct 01, 2026 at 04:56:46PM +0200, Olivier Moysan wrote: > +static int stm32_mdf_core_of_cck_get(struct platform_device *pdev, struct stm32_mdf_priv *priv) > +{ > + struct device *dev = &pdev->dev; > + u32 freq; > + int ret; > + > + ret = device_property_read_u32(dev, "clock-frequency", &freq); How? Your driver depends on OF and there is no such property in OF, so why can you read it? Otherwise what is this: "depends on (ARCH_STM32 && OF)" > + if (ret < 0) { > + /* If property does not exist return immediately */ > + if (ret == -EINVAL) > + return 0; > + > + dev_err(dev, "Failed to read clock-frequency property: %d\n", ret); > + return ret; > + } > + > + if (!freq) { > + dev_err(dev, "Null frequency not allowed for cck output frequency\n"); > + return -EINVAL; > + } > + priv->cck_freq = freq; > + > + return 0; > +} > + > +static int stm32_mdf_core_parse_clocks(struct platform_device *pdev, struct stm32_mdf_priv *priv) > +{ > + struct device *dev = &pdev->dev; > + struct clk *kclk; > + int ret; > + > + kclk = devm_clk_get(dev, "ker_ck"); > + if (IS_ERR(kclk)) > + return dev_err_probe(dev, PTR_ERR(kclk), "Failed to get kernel clock\n"); > + > + priv->kclk = kclk; > + priv->kclk_rate = clk_get_rate(kclk); > + > + /* CCK0 and CCK1 clocks are optional. Used only in SPI master modes. */ > + ret = stm32_mdf_core_of_cck_get(pdev, priv); > + if (ret) > + return ret; > + > + if (priv->cck_freq) { > + ret = stm32_mdf_core_cck_divider_set_rate(pdev, priv, priv->kclk_rate); > + if (ret) { > + dev_err(dev, "Failed to set cck rate: %d\n", ret); > + return ret; > + } > + } > + > + ret = stm32_mdf_core_register_clock_provider(pdev, priv); > + if (ret) > + return ret; > + > + return 0; > +} > + > +static int stm32_mdf_core_parse_of(struct platform_device *pdev, struct stm32_mdf_priv *priv) > +{ > + struct device_node *node = pdev->dev.of_node; > + struct reset_control *rst; > + struct device *dev = &pdev->dev; > + struct fwnode_handle *fwnode = dev_fwnode(dev); > + struct fwnode_handle *handle; > + struct fwnode_handle **fh; > + int count, ret, i; > + > + if (!node) > + return -EINVAL; > + > + rst = devm_reset_control_get_optional_exclusive(&pdev->dev, "mdf"); > + if (IS_ERR(rst)) > + return dev_err_probe(dev, PTR_ERR(rst), "Failed to get reset controller\n"); > + > + ret = reset_control_reset(rst); > + if (ret) { > + dev_err(&pdev->dev, "reset_control_reset failed %d\n", ret); > + return ret; > + } > + > + ret = stm32_mdf_core_parse_clocks(pdev, priv); > + if (ret < 0) > + return ret; > + > + if (device_property_present(&pdev->dev, "st,interleave")) { > + count = fwnode_property_count_u32(fwnode, "st,interleave"); > + if (count < 2 || count > priv->mdf.nbf) { > + dev_err(dev, "Wrong interleave filters number [%d]\n", count); > + return -EINVAL; > + } > + > + fh = devm_kzalloc(dev, count * sizeof(*fh), GFP_KERNEL); > + if (!fh) > + return -ENOMEM; > + priv->mdf.fh_interleave = fh; > + > + for (i = 0; i < count; i++) { > + handle = fwnode_find_reference(fwnode, "st,interleave", i); > + if (IS_ERR(handle)) { > + dev_err(dev, "Failed to read filter handle: %ld\n", > + PTR_ERR(handle)); > + return PTR_ERR(handle); > + } > + priv->mdf.fh_interleave[i] = handle; > + } > + > + priv->mdf.nb_interleave = count; > + > + /* Configure GCR */ > + ret = regmap_update_bits(priv->regmap, MDF_GCR_REG, > + MDF_GCR_ILVNB_MASK, MDF_GCR_ILVNB(count - 1)); > + } > + > + return ret; > +} > + > +static const struct of_device_id stm32_mdf_of_match[] = { > + { .compatible = "st,stm32mp25-mdf" }, > + { .compatible = "st,stm32mp23-mdf", .data = (void *)STM32_MDF_MP23_FILTER_NB }, Again odd order of entries. Why doing things reverse from natural sort order? > + {} > +}; > +MODULE_DEVICE_TABLE(of, stm32_mdf_of_match); > + > +static int stm32_mdf_core_identification(struct platform_device *pdev, struct stm32_mdf_priv *priv) > +{ > + struct stm32_mdf *mdf = &priv->mdf; > + u32 val; > + int ret; > + > + /* If filter number is explicitly defined, don't check identification registers */ > + mdf->nbf = (uintptr_t)device_get_match_data(&pdev->dev); Don't use uintptr_t, but unsigned long. > + if (mdf->nbf) > + return 0; > + > + ret = regmap_read(priv->regmap, MDF_IPIDR_REG, &val); > + if (ret) > + return ret; > + > + if (val == STM32MP25_MDF_IPIDR_NUMBER) { > + ret = regmap_read(priv->regmap, MDF_HWCFGR_REG, &val); > + if (ret) > + return ret; > + > + mdf->nbf = FIELD_GET(MDF_HWCFGR_NBF_MASK, val); > + > + ret = regmap_read(priv->regmap, MDF_VERR_REG, &val); > + > + dev_dbg(&pdev->dev, "MDF version: %lu.%lu\n", FIELD_GET(MDF_VERR_MAJREV_MASK, val), > + FIELD_GET(MDF_VERR_MINREV_MASK, val)); > + } else { > + dev_err(&pdev->dev, "Unexpected ID number: 0x%x\n", val); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int stm32_mdf_core_probe(struct platform_device *pdev) > +{ > + struct stm32_mdf_priv *priv; > + struct resource *res; > + int ret; > + > + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + priv->pdev = pdev; > + spin_lock_init(&priv->lock); > + > + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); > + if (IS_ERR(priv->base)) > + return PTR_ERR(priv->base); > + priv->phys_base = res->start; > + > + priv->regmap = > + devm_regmap_init_mmio_clk(&pdev->dev, "ker_ck", priv->base, &stm32_mdf_regmap_cfg); Odd wrappung. > + if (IS_ERR(priv->regmap)) { > + ret = PTR_ERR(priv->regmap); > + dev_err(&pdev->dev, "Failed to allocate regmap: %d\n", ret); We do not print allocation errors. OTOH, every other probe failure should use return dev_err_probe syntax. Again, same with bindings, please take existing recent code as starting point, not upstream your old vendor code. > + return ret; > + } > + > + ret = stm32_mdf_core_identification(pdev, priv); > + if (ret < 0) > + return ret; > + > + ret = stm32_mdf_core_parse_of(pdev, priv); > + if (ret < 0) > + return ret; > + > + INIT_LIST_HEAD(&priv->mdf.sitf_list); > + INIT_LIST_HEAD(&priv->mdf.filter_list); > + > + platform_set_drvdata(pdev, priv); > + > + pm_runtime_get_noresume(&pdev->dev); > + pm_runtime_set_active(&pdev->dev); > + pm_runtime_enable(&pdev->dev); > + > + ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev); > + if (ret) > + goto pm_put; > + > + pm_runtime_put(&pdev->dev); > + > + return 0; > + > +pm_put: > + pm_runtime_disable(&pdev->dev); > + pm_runtime_set_suspended(&pdev->dev); > + pm_runtime_put_noidle(&pdev->dev); > + > + return ret; > +} > + > +static void stm32_mdf_core_remove(struct platform_device *pdev) > +{ > + pm_runtime_get_sync(&pdev->dev); > + of_platform_depopulate(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > + pm_runtime_set_suspended(&pdev->dev); > + pm_runtime_put_noidle(&pdev->dev); > +} > + > +static int stm32_mdf_core_suspend(struct device *dev) > +{ > + struct stm32_mdf *mdf = dev_get_drvdata(dev); > + struct stm32_mdf_priv *priv = to_stm32_mdf_priv(mdf); > + int ret; > + > + ret = pm_runtime_force_suspend(dev); > + if (ret) > + return ret; > + > + regcache_cache_only(priv->regmap, true); > + regcache_mark_dirty(priv->regmap); > + > + /* Balance devm_regmap_init_mmio_clk() clk_prepare() */ > + clk_unprepare(priv->kclk); > + > + return pinctrl_pm_select_sleep_state(dev); > +} > + > +static int stm32_mdf_core_resume(struct device *dev) > +{ > + struct stm32_mdf *mdf = dev_get_drvdata(dev); > + struct stm32_mdf_priv *priv = to_stm32_mdf_priv(mdf); > + int ret; > + > + ret = pinctrl_pm_select_default_state(dev); > + if (ret) { > + dev_err(dev, "Failed to set pins default state: %d\n", ret); > + return ret; > + } > + > + ret = clk_prepare(priv->kclk); > + if (ret) { > + dev_err(dev, "Failed to prepare kernel clock: %d\n", ret); > + goto err_clk; > + } > + > + regcache_cache_only(priv->regmap, false); > + ret = regcache_sync(priv->regmap); > + if (ret) { > + dev_err(dev, "Failed to sync cache: %d\n", ret); > + goto err_cache; > + } > + > + return pm_runtime_force_resume(dev); > + > +err_cache: > + clk_unprepare(priv->kclk); > +err_clk: > + pinctrl_pm_select_sleep_state(dev); > + > + return ret; > +} > + > +static int stm32_mdf_core_runtime_suspend(struct device *dev) > +{ > + return 0; > +} > + > +static int stm32_mdf_core_runtime_resume(struct device *dev) > +{ > + return 0; > +} > + > +static const struct dev_pm_ops stm32_mdf_core_pm_ops = { > + SET_SYSTEM_SLEEP_PM_OPS(stm32_mdf_core_suspend, stm32_mdf_core_resume) > + SET_RUNTIME_PM_OPS(stm32_mdf_core_runtime_suspend, stm32_mdf_core_runtime_resume, NULL) > +}; > + > +static struct platform_driver stm32_mdf_driver = { > + .probe = stm32_mdf_core_probe, > + .remove = stm32_mdf_core_remove, > + .driver = { > + .name = "stm32-mdf", > + .of_match_table = stm32_mdf_of_match, > + .pm = &stm32_mdf_core_pm_ops, > + }, > +}; > + > +module_platform_driver(stm32_mdf_driver); > + > +MODULE_AUTHOR("Olivier Moysan <olivier.moysan(a)foss.st.com>"); > +MODULE_DESCRIPTION("STMicroelectronics STM32 MDF driver"); > +MODULE_LICENSE("GPL"); > diff --git a/drivers/iio/adc/stm32-mdf-serial.c b/drivers/iio/adc/stm32-mdf-serial.c > new file mode 100644 > index 000000000000..15a58cf833be > --- /dev/null > +++ b/drivers/iio/adc/stm32-mdf-serial.c > @@ -0,0 +1,309 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * This file is part of STM32 MDF driver > + * > + * Copyright (C) 2023, STMicroelectronics - All Rights Reserved > + */ > + > +#include <linux/clk.h> > +#include <linux/clk-provider.h> > +#include <linux/device.h> > +#include <linux/module.h> > +#include <linux/of_device.h> > +#include <linux/pinctrl/consumer.h> > +#include <linux/platform_device.h> > +#include <linux/regmap.h> > + > +#include "stm32-mdf.h" > + > +#define STM32_MDF_MODE_SZ 12 > + > +enum { > + STM32_MDF_SCKSRC_CCK0, > + STM32_MDF_SCKSRC_CCK1, > + STM32_MDF_SCKSRC_CLK, > + STM32_MDF_SCKSRC_NONE, > +}; > + > +struct stm32_mdf_sf_mode { > + const char *name; > + u32 mode; > +}; > + > +static const struct stm32_mdf_sf_mode stm32_mdf_mode[STM32_MDF_MODE_NB] = { > + { "spi", STM32_MDF_MODE_SPI }, > + { "lf_spi", STM32_MDF_MODE_LF_SPI }, > + { "manchester_r", STM32_MDF_MODE_MANCHESTER_R }, > + { "manchester_f", STM32_MDF_MODE_MANCHESTER_F }, > +}; > + > +static bool stm32_mdf_sitf_readable_reg(struct device *dev, unsigned int reg) > +{ > + switch (reg) { > + case MDF_SITFCR_REG: > + return true; > + default: > + return false; > + } > +} > + > +static bool stm32_mdf_sitf_writeable_reg(struct device *dev, unsigned int reg) > +{ > + switch (reg) { > + case MDF_SITFCR_REG: > + return true; > + default: > + return false; > + } > +} > + > +static const struct regmap_config stm32_sitf_regmap_cfg = { > + .reg_bits = 32, > + .val_bits = 32, > + .reg_stride = sizeof(u32), > + .max_register = MDF_SITFCR_REG, > + .readable_reg = stm32_mdf_sitf_readable_reg, > + .writeable_reg = stm32_mdf_sitf_writeable_reg, > + .fast_io = true, > + /* Do not use regcache as it does not support single register map */ > +}; > + > +int stm32_mdf_sitf_start(struct stm32_mdf_sitf *sitf) > +{ > + int ret; > + > + spin_lock(&sitf->lock); > + > + ret = regmap_set_bits(sitf->regmap, MDF_SITFCR_REG, MDF_SITFCR_SITFEN); > + if (!ret) > + sitf->refcnt++; > + > + spin_unlock(&sitf->lock); > + > + return ret; > +} > +EXPORT_SYMBOL_GPL(stm32_mdf_sitf_start); You need kerneldoc for all of exports. > + > +int stm32_mdf_sitf_stop(struct stm32_mdf_sitf *sitf) > +{ > + int ret = 0; > + > + spin_lock(&sitf->lock); > + > + if (!sitf->refcnt) { > + dev_err(sitf->dev, "Unbalanced serial interface stop ?\n"); > + ret = -EPERM; > + goto out; > + } else { > + sitf->refcnt--; > + } > + > + if (!sitf->refcnt) > + ret = regmap_clear_bits(sitf->regmap, MDF_SITFCR_REG, MDF_SITFCR_SITFEN); > + > +out: > + spin_unlock(&sitf->lock); > + > + return ret; > +} > +EXPORT_SYMBOL_GPL(stm32_mdf_sitf_stop); > + > +static int stm32_mdf_sitf_get_clk(struct device *dev, struct stm32_mdf_sitf *sitf) > +{ > + struct clk *sck; > + > + /* Optional clock. Clock not needed in Manchester mode */ > + sck = clk_get_optional(sitf->dev, 0); > + if (IS_ERR(sck)) > + return dev_err_probe(sitf->dev, PTR_ERR(sck), "Can't get serial clock\n"); > + > + sitf->sck = sck; > + > + if (sitf->sck) { > + if (!strncmp(__clk_get_name(sck), STM32_MDF_CCK0, sizeof(STM32_MDF_CCK0))) > + sitf->scksrc = STM32_MDF_SCKSRC_CCK0; > + else if (!strncmp(__clk_get_name(sck), STM32_MDF_CCK1, sizeof(STM32_MDF_CCK1))) > + sitf->scksrc = STM32_MDF_SCKSRC_CCK1; > + else > + sitf->scksrc = STM32_MDF_SCKSRC_CLK; > + } > + > + return 0; > +}; > + > +static int stm32_mdf_sitf_parse(struct platform_device *pdev, struct stm32_mdf_sitf *sitf) > +{ > + struct device *dev = &pdev->dev; > + const char *str; > + int ret, i = 0; > + u32 idx, mode, sitfcr; > + > + ret = device_property_read_u32(dev, "reg", &idx); > + if (ret) { > + dev_err(dev, "Could not get interface index: %d\n", ret); > + return ret; > + } > + > + if (idx % 0x80) { > + dev_err(dev, "Unexpected reg property value [%x]\n", idx); > + return -EINVAL; > + } > + > + idx = (idx >> 7) - 1; > + if (idx > sitf->mdf->nbf) { > + dev_err(dev, "Interface index [%d] exceeds maximum [%d]\n", idx, sitf->mdf->nbf); > + return -EINVAL; > + } > + > + /* Get SITF mode */ > + ret = device_property_read_string(dev, "st,sitf-mode", &str); > + if (ret) { > + dev_err(dev, "Could not get interface mode: %d\n", ret); > + return ret; > + } > + > + while (i < STM32_MDF_MODE_NB) { > + if (!strncmp(stm32_mdf_mode[i].name, str, STM32_MDF_MODE_SZ)) { > + mode = stm32_mdf_mode[i].mode; > + break; > + } > + i++; > + } > + > + if (i >= STM32_MDF_MODE_NB) { > + dev_err(dev, "Unknown serial interface mode [%s]\n", str); > + return -EINVAL; > + } > + > + sitf->mode = mode; > + sitfcr = MDF_SITFCR_SITFMOD(mode); > + > + ret = stm32_mdf_sitf_get_clk(dev, sitf); > + if (ret) > + return ret; > + > + if (mode == STM32_MDF_MODE_SPI && sitf->scksrc == STM32_MDF_SCKSRC_NONE) { > + dev_err(dev, "Missing clock for serial interface [%d] in SPI mode\n", idx); > + return -EINVAL; > + } > + > + if (mode == STM32_MDF_MODE_LF_SPI && (sitf->scksrc != STM32_MDF_SCKSRC_CCK0 && > + sitf->scksrc != STM32_MDF_SCKSRC_CCK1)) { > + dev_err(dev, "Missing CCKx clock for serial interface [%d] in LF_SPI mode\n", idx); > + return -EINVAL; > + } > + > + sitf->id = idx; > + sitf->node = dev_fwnode(dev); > + spin_lock_init(&sitf->lock); > + > + sitfcr |= MDF_SITFCR_SCKSRC(sitf->scksrc); > + > + /* Configure SITF register */ > + regmap_set_bits(sitf->regmap, MDF_SITFCR_REG, sitfcr); > + > + dev_dbg(dev, "Serial interface [%d] registered\n", idx); Drop, that's just probe success. > + > + return 0; > +} > + > +static int stm32_mdf_sitf_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct stm32_mdf_sitf *sitf; > + struct regmap *regmap; > + struct resource *res; > + void __iomem *base; > + int ret; > + > + sitf = devm_kzalloc(&pdev->dev, sizeof(*sitf), GFP_KERNEL); > + if (!sitf) > + return -ENOMEM; > + sitf->dev = dev; > + sitf->mdf = dev_get_drvdata(dev->parent); > + > + base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); > + if (IS_ERR(base)) > + return PTR_ERR(base); > + > + regmap = devm_regmap_init_mmio_clk(dev, "ker_ck", base, &stm32_sitf_regmap_cfg); > + if (IS_ERR(regmap)) > + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); And here quite different choice. Your code is just inconsistent. > + sitf->regmap = regmap; > + > + ret = stm32_mdf_sitf_parse(pdev, sitf); > + if (ret < 0) > + return ret; Best regards, Krzysztof

2 weeks, 5 days

[PATCH v8 00/23] PCI/P2PDMA: Route peer-to-peer DMA by TLP class

by Leon Romanovsky

PCI P2PDMA applies Request and Completion Redirect throughout both paths. This misclassifies asymmetric and nested switches, and reports one answer for every kind of TLP. Three ACS controls act on TLP attributes the client chooses rather than on the topology: Translation Blocking and Direct Translated P2P act on a Request's Address Type, and Completion Redirect skips Completions carrying Relaxed Ordering. Evaluate each direction at the path divergence, decide every class from the one walk, expose the provider to dma-buf importers, and let mlx5 ask rather than assume. Signed-off-by: Leon Romanovsky <leonro(a)nvidia.com> --- Changes in v8: - Added extra Reviewed-by from Logan. - Added patches to take care of ATS per-device vs. per-mapping option - Link to v7: https://patch.msgid.link/20260920-fix-p2p-acs-v4-0-v7-0-ca0828ab697c@nvidia… Changes in v7: - Removed "Document pdev->p2pdma lifetime rules" patch, it gives nothing after p2pmem fix. - Split dmabuf patch. - Tushar retested the series, so added his Tested-by. - Added Logan's ROB tags and fixed minor documentation issues pointed by him. - Link to v6: https://lore.kernel.org/all/20260914-fix-p2p-acs-v4-0-v6-0-5ef07ec9ef06@nvi… Changes in v6: - Changed DMABUF to use callbacks and not directly stored pointer. - Link to v5: https://patch.msgid.link/20260910-fix-p2p-acs-v4-0-v5-0-856087f63c0d@nvidia… Changes in v5: - Rebase on the posted fixes. - Dropped tags from changed patches. - Remove Egress Control Vector interpretation and coverage. - Keep enabled Egress Control conservative as a Request redirect. - Use pci_dbg()/dev_dbg() for diagnostics and drop the "debug" prefix. - Removed code comments from "Document the pdev->p2pdma lifetime and RCU rules" patch and reduced description to actual lifetime explanation. - Added note that Linux assumes that TLPs are in strict-ordering and untranslated. - Added code to calculate p2p paths per-TLP type. - Converted mlx5 to use that new proposed API. - Link to https://patch.msgid.link/20260821-fix-p2p-acs-v4-0-v4-0-94426b96de73@nvidia… Changes in v4: - Reject ACS Violations and unreadable routing state instead of treating them as host-bridge redirects - Added Tested-by tags from Tushar Dave - Added support to asymmetric ACS routing - Limited redirect checks to the two ports at the path divergence - Added standalone ACS routing diagnostics for hardware retesting - Dropped " PCI: Account for Direct Translated P2P in ACS isolation checks" patch - Link to v3: https://patch.msgid.link/20260811-fix-p2p-acs-v3-0-efc488ee7c03@nvidia.com Changes in v3: - Fixed pci_p2pdma_add_resource() error unwinding - Made pdev->p2pdma teardown wait unconditionally for RCU readers - Restricted pci_p2pmem_find_many() to pool-backed providers - Documented the pdev->p2pdma lifetime and RCU rules - Fixed calc_map_type_and_dist() handling of the verbose argument - Required the ACS port and target to share a bus before indexing the Egress Control Vector - Gave pci_acs_enabled() and pci_acs_path_enabled() a scope, so the ACS Direct Translated P2P rule no longer stops pci_enable_pasid() from enabling PASID - Dropped "Report ACS ports when the paths share no upstream bridge": the mapping type cannot change without a shared upstream bridge, so the pci=disable_acs_redir= hint was not actionable there and the ACS walk only cost config space reads - Folded the Request Redirect rule into pci_acs_rr_ineffective(), so pci_acs_flags_enabled() and the Intel SPT PCH quirk share one copy - Renamed pci_acs_egress_ctrl_set() to pci_acs_egress_ctrl_is_set(), it reads the bit rather than setting it - Reworded the blocked-path warning: ACS may also leave the direct route indeterminate rather than blocked - Added KUnit coverage for the shared-bus guard, a device with no ACS capability and an unreadable ACS Control register - Added the missing Fixes: tags, a second one on the pci_p2pdma_add_resource() unwinding fix (the dangling devres action dates to f58ef9d1d135) and one on the Egress Control isolation change - Link to v2: https://patch.msgid.link/20260806-fix-p2p-acs-v2-0-0cec14812965@nvidia.com Changes in v2: - Added Logan's ROB tags - Added commas in Documentation patch - Link to v1: https://patch.msgid.link/20260802-fix-p2p-acs-v1-0-a7c5eb64fff6@nvidia.com --- Leon Romanovsky (23): PCI/P2PDMA: Document the TLP attribute assumptions PCI/P2PDMA: Derive routing from directional ACS controls PCI: Reject unreadable ACS controls in isolation checks PCI/P2PDMA: Evaluate ACS controls at the path divergence PCI/P2PDMA: Document directional ACS routing PCI/P2PDMA: Collect the path's ACS controls before deciding PCI/P2PDMA: Answer routing per TLP class PCI/P2PDMA: Route Relaxed Ordering Completions directly PCI/P2PDMA: Reject Translated Requests blocked by Translation Blocking PCI/P2PDMA: Route Translated Requests under Direct Translated P2P PCI/P2PDMA: Log detailed ACS routing diagnostics PCI/P2PDMA: Add KUnit tests for the ACS routing decisions PCI/P2PDMA: Test the ACS P2P routing walk PCI: Add KUnit coverage for ACS isolation checks PCI/P2PDMA: Document TLP-class routing dma-buf: Let importers ask how peer-to-peer traffic is routed vfio/pci: Hand out the P2PDMA provider behind a dma-buf RDMA/uverbs: Hand out the P2PDMA provider behind a dma-buf RDMA/mlx5: Ask P2PDMA whether ATS takes a direct peer-to-peer route PCI/P2PDMA: Let a client declare that it selects ATS per mapping RDMA/mlx5: Declare to P2PDMA that ATS is selected per memory key PCI/P2PDMA: Evaluate the ATS path for clients with ATS enabled PCI/P2PDMA: Test the routing of clients with ATS enabled Documentation/admin-guide/kernel-parameters.txt | 15 +- Documentation/driver-api/pci/p2pdma.rst | 80 ++ drivers/dma-buf/dma-buf-mapping.c | 39 + drivers/infiniband/core/uverbs_std_types_dmabuf.c | 12 + drivers/infiniband/hw/mlx5/main.c | 2 + drivers/infiniband/hw/mlx5/mlx5_ib.h | 36 +- drivers/infiniband/hw/mlx5/mr.c | 47 ++ drivers/pci/Kconfig | 15 + drivers/pci/Makefile | 1 + drivers/pci/p2pdma.c | 704 ++++++++++++++++-- drivers/pci/pci.c | 7 +- drivers/pci/pci.h | 31 + drivers/pci/pci_acs_test.c | 860 ++++++++++++++++++++++ drivers/pci/quirks.c | 6 +- drivers/vfio/pci/vfio_pci_dmabuf.c | 12 + include/linux/dma-buf-mapping.h | 3 + include/linux/dma-buf.h | 19 + include/linux/pci-p2pdma.h | 62 +- 18 files changed, 1828 insertions(+), 123 deletions(-) --- base-commit: 08dbfad3f5040f5bdb6c529da20d6d4e81fefd72 change-id: 20260821-fix-p2p-acs-v4-0-e72455e3a261 prerequisite-message-id: <20260830-batch-p2p-fixes-v1-0-5044e8dfbe2e(a)nvidia.com> prerequisite-patch-id: 6b25c7fcf164cdfc14e9fac5b908d97fcf6509d7 prerequisite-patch-id: 0d083c281001365aae4b35544cf28891a6ab9a96 prerequisite-patch-id: bfd9dabf271f3cc9a3a61f46387d20c20311363d prerequisite-patch-id: fad0275efc722830fc591509506c0a5e4f581073 prerequisite-patch-id: 0c83bee688fec1f6d1564654df7c630fa6a4a978 Best regards, -- Leon Romanovsky <leonro(a)nvidia.com>

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Linaro-mm-sig October 2026