Linaro-mm-sig

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6262 discussions

[PATCH 0/5] Replace the dmabuf custom test framework with kunit

by Jason Gunthorpe

Using kunit to write tests for new work on dmabuf is coming up: https://lore.kernel.org/all/26-v1-b5cab63049c0+191af-dmabuf_map_type_jgg@nv… Replace the custom test framework with kunit to avoid maintaining two concurrent test frameworks. The conversion minimizes code changes and uses simple pattern-oriented reworks to reduce the chance of breaking any tests. Aside from adding the kunit_test_suite() boilerplate, the conversion follows a number of patterns: Test failures without cleanup. For example: if (!ptr) return -ENOMEM; Becomes: KUNIT_ASSERT_NOT_NULL(test, ptr); In kunit ASSERT longjumps out of the test. Check for error, fail and cleanup: if (err) { pr_err("msg\n"); goto cleanup; } Becomes: if (err) { KUNIT_FAIL(test, "msg"); goto cleanup; } Preserve the existing failure messages and cleanup code. Cases where the test returns err but prints no message: if (err) goto cleanup; Becomes: if (err) { KUNIT_FAIL(test, "msg"); goto cleanup; } Use KUNIT_FAIL to retain the 'cleanup on err' behavior. Overall, the conversion is straightforward. The result can be run with kunit.py: $ tools/testing/kunit/kunit.py run --build_dir build_kunit_x86_64 --arch x86_64 --kunitconfig ./drivers/dma-buf/.kunitconfig [20:37:23] Configuring KUnit Kernel ... [20:37:23] Building KUnit Kernel ... Populating config with: $ make ARCH=x86_64 O=build_kunit_x86_64 olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=x86_64 O=build_kunit_x86_64 --jobs=20 [20:37:29] Starting KUnit Kernel (1/1)... [20:37:29] ============================================================ Running tests with: $ qemu-system-x86_64 -nodefaults -m 1024 -kernel build_kunit_x86_64/arch/x86/boot/bzImage -append 'kunit.enable=1 console=ttyS0 kunit_shutdown=reboot' -no-reboot -nographic -accel kvm -accel hvf -accel tcg -serial stdio -bios qboot.rom [20:37:30] ================ dma-buf-resv (5 subtests) ================= [20:37:30] [PASSED] test_sanitycheck [20:37:30] ===================== test_signaling ====================== [20:37:30] [PASSED] kernel [20:37:30] [PASSED] write [20:37:30] [PASSED] read [20:37:30] [PASSED] bookkeep [20:37:30] ================= [PASSED] test_signaling ================== ... [20:37:35] Testing complete. Ran 50 tests: passed: 49, skipped: 1 [20:37:35] Elapsed time: 12.635s total, 0.001s configuring, 6.551s building, 6.017s running One test that requires two CPUs is skipped since the default VM has a single CPU and cannot run the test. All other usual ways to run kunit work as well, and all tests are placed in a module to provide more options for how they are run. AI was used to do the large scale semantic search and replaces described above, then everything was hand checked. AI also deduced the issue with test_race_signal_callback() in a couple of seconds from the kunit crash (!!), again was hand checked though I am not so familiar with this test to be fully certain this is the best answer. Jason Gunthorpe (5): dma-buf: Change st-dma-resv.c to use kunit dma-buf: Change st-dma-fence.c to use kunit dma-buf: Change st-dma-fence-unwrap.c to use kunit dma-buf: Change st-dma-fence-chain.c to use kunit dma-buf: Remove the old selftest drivers/dma-buf/.kunitconfig | 2 + drivers/dma-buf/Kconfig | 11 +- drivers/dma-buf/Makefile | 5 +- drivers/dma-buf/selftest.c | 167 --------------- drivers/dma-buf/selftest.h | 30 --- drivers/dma-buf/selftests.h | 16 -- drivers/dma-buf/st-dma-fence-chain.c | 217 +++++++++---------- drivers/dma-buf/st-dma-fence-unwrap.c | 290 +++++++++++--------------- drivers/dma-buf/st-dma-fence.c | 200 ++++++++---------- drivers/dma-buf/st-dma-resv.c | 145 +++++++------ drivers/gpu/drm/i915/Kconfig.debug | 2 +- 11 files changed, 394 insertions(+), 691 deletions(-) create mode 100644 drivers/dma-buf/.kunitconfig delete mode 100644 drivers/dma-buf/selftest.c delete mode 100644 drivers/dma-buf/selftest.h delete mode 100644 drivers/dma-buf/selftests.h base-commit: 41dae5ac5e157b0bb260f381eb3df2f4a4610205 -- 2.43.0

59 minutes

Re: [PATCH v5 6/7] drm/amdgpu: rename amdgpu_fill_buffer as amdgpu_ttm_clear_buffer

by Christian König

On 4/3/26 10:35, Pierre-Eric Pelloux-Prayer wrote: > This is the only use case for this function. > > --- > v2: amdgpu_ttm_clear_buffer instead of amdgpu_clear_buffer > --- > > Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer(a)amd.com> > Reviewed-by: Christian König <christian.koenig(a)amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 12 +++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 23 ++++++++++------------ > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 13 ++++++------ > 3 files changed, 22 insertions(+), 26 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index d0884bbffa75..195cb1c814d1 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -717,9 +717,9 @@ int amdgpu_bo_create(struct amdgpu_device *adev, > bo->tbo.resource->mem_type == TTM_PL_VRAM) { > struct dma_fence *fence; > > - r = amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), > - bo, 0, NULL, &fence, > - true, AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); > + r = amdgpu_ttm_clear_buffer(amdgpu_ttm_next_clear_entity(adev), > + bo, NULL, &fence, Wait a second. Why is the dependency NULL here? Could it be that we relied on the fact that clears and moves were serialized in the past? Regards, Christian. > + true, AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); > if (unlikely(r)) > goto fail_unreserve; > > @@ -1329,9 +1329,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo) > if (r) > goto out; > > - r = amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), > - abo, 0, &bo->base._resv, &fence, > - false, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); > + r = amdgpu_ttm_clear_buffer(amdgpu_ttm_next_clear_entity(adev), > + abo, &bo->base._resv, &fence, > + false, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); > if (WARN_ON(r)) > goto out; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index a3d0998b8cec..e74f9f8a88dc 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -417,8 +417,8 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > if (old_mem->mem_type == TTM_PL_VRAM && > (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { > struct dma_fence *wipe_fence = NULL; > - r = amdgpu_fill_buffer(entity, abo, 0, NULL, &wipe_fence, > - false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); > + r = amdgpu_ttm_clear_buffer(entity, abo, NULL, &wipe_fence, > + false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); > if (r) { > goto error; > } else if (wipe_fence) { > @@ -2572,26 +2572,23 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, > } > > /** > - * amdgpu_fill_buffer - fill a buffer with a given value > + * amdgpu_ttm_clear_buffer - fill a buffer with 0 > * @entity: entity to use > * @bo: the bo to fill > - * @src_data: the value to set > * @resv: fences contained in this reservation will be used as dependencies. > * @out_fence: the fence from the last clear will be stored here. It might be > * NULL if no job was run. > - * @dependency: optional input dependency fence. > * @consider_clear_status: true if region reported as cleared by amdgpu_res_cleared() > * are skipped. > * @k_job_id: trace id > * > */ > -int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, > - struct amdgpu_bo *bo, > - uint32_t src_data, > - struct dma_resv *resv, > - struct dma_fence **out_fence, > - bool consider_clear_status, > - u64 k_job_id) > +int amdgpu_ttm_clear_buffer(struct amdgpu_ttm_buffer_entity *entity, > + struct amdgpu_bo *bo, > + struct dma_resv *resv, > + struct dma_fence **out_fence, > + bool consider_clear_status, > + u64 k_job_id) > { > struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); > struct dma_fence *fence = NULL; > @@ -2622,7 +2619,7 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, > goto error; > > r = amdgpu_ttm_fill_mem(adev, entity, > - src_data, to, cur_size, resv, > + 0, to, cur_size, resv, > &next, true, k_job_id); > if (r) > goto error; > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > index 436a3e09a178..d7b14d5cac77 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > @@ -187,13 +187,12 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev, > struct dma_resv *resv, > struct dma_fence **fence, > bool vm_needs_flush, uint32_t copy_flags); > -int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, > - struct amdgpu_bo *bo, > - uint32_t src_data, > - struct dma_resv *resv, > - struct dma_fence **out_fence, > - bool consider_clear_status, > - u64 k_job_id); > +int amdgpu_ttm_clear_buffer(struct amdgpu_ttm_buffer_entity *entity, > + struct amdgpu_bo *bo, > + struct dma_resv *resv, > + struct dma_fence **out_fence, > + bool consider_clear_status, > + u64 k_job_id); > struct amdgpu_ttm_buffer_entity *amdgpu_ttm_next_clear_entity(struct amdgpu_device *adev); > > int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);

3 hours, 18 minutes

Re: [PATCH v5 5/7] drm/amdgpu: get rid of amdgpu_ttm_clear_buffer

by Christian König

On 4/3/26 10:35, Pierre-Eric Pelloux-Prayer wrote: > It's doing the same thing as amdgpu_fill_buffer(src_data=0), so drop it. > > The only caveat is that amdgpu_res_cleared() return value is only valid > right after allocation. > > --- > v2: introduce new "bool consider_clear_status" arg > --- > > Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer(a)amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16 ++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 88 +++++----------------- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 6 +- > 3 files changed, 32 insertions(+), 78 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > index 66c20dd46d12..d0884bbffa75 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > @@ -717,13 +717,17 @@ int amdgpu_bo_create(struct amdgpu_device *adev, > bo->tbo.resource->mem_type == TTM_PL_VRAM) { > struct dma_fence *fence; > > - r = amdgpu_ttm_clear_buffer(bo, bo->tbo.base.resv, &fence); > + r = amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), > + bo, 0, NULL, &fence, > + true, AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); > if (unlikely(r)) > goto fail_unreserve; > > - dma_resv_add_fence(bo->tbo.base.resv, fence, > - DMA_RESV_USAGE_KERNEL); > - dma_fence_put(fence); > + if (fence) { > + dma_resv_add_fence(bo->tbo.base.resv, fence, > + DMA_RESV_USAGE_KERNEL); > + dma_fence_put(fence); > + } > } > if (!bp->resv) > amdgpu_bo_unreserve(bo); > @@ -1326,8 +1330,8 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo) > goto out; > > r = amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev), > - abo, 0, &bo->base._resv, > - &fence, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); > + abo, 0, &bo->base._resv, &fence, > + false, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE); > if (WARN_ON(r)) > goto out; > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index 648ad344e89c..a3d0998b8cec 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -418,7 +418,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo, > (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) { > struct dma_fence *wipe_fence = NULL; > r = amdgpu_fill_buffer(entity, abo, 0, NULL, &wipe_fence, > - AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); > + false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT); > if (r) { > goto error; > } else if (wipe_fence) { > @@ -2572,76 +2572,25 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, > } > > /** > - * amdgpu_ttm_clear_buffer - clear memory buffers > - * @bo: amdgpu buffer object > - * @resv: reservation object > - * @fence: dma_fence associated with the operation > + * amdgpu_fill_buffer - fill a buffer with a given value > + * @entity: entity to use > + * @bo: the bo to fill > + * @src_data: the value to set > + * @resv: fences contained in this reservation will be used as dependencies. > + * @out_fence: the fence from the last clear will be stored here. It might be > + * NULL if no job was run. > + * @dependency: optional input dependency fence. > + * @consider_clear_status: true if region reported as cleared by amdgpu_res_cleared() > + * are skipped. > + * @k_job_id: trace id > * > - * Clear the memory buffer resource. > - * > - * Returns: > - * 0 for success or a negative error code on failure. > */ > -int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo, > - struct dma_resv *resv, > - struct dma_fence **fence) > -{ > - struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); > - struct amdgpu_ttm_buffer_entity *entity; > - struct amdgpu_res_cursor cursor; > - u64 addr; > - int r = 0; > - > - if (!adev->mman.buffer_funcs_enabled) > - return -EINVAL; > - > - if (!fence) > - return -EINVAL; > - entity = &adev->mman.clear_entities[0]; > - *fence = dma_fence_get_stub(); > - > - amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor); > - > - mutex_lock(&entity->lock); > - while (cursor.remaining) { > - struct dma_fence *next = NULL; > - u64 size; > - > - if (amdgpu_res_cleared(&cursor)) { > - amdgpu_res_next(&cursor, cursor.size); > - continue; > - } > - > - /* Never clear more than 256MiB at once to avoid timeouts */ > - size = min(cursor.size, 256ULL << 20); > - > - r = amdgpu_ttm_map_buffer(entity, &bo->tbo, bo->tbo.resource, &cursor, > - 0, false, &size, &addr); > - if (r) > - goto err; > - > - r = amdgpu_ttm_fill_mem(adev, entity, 0, addr, size, resv, > - &next, true, > - AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER); > - if (r) > - goto err; > - > - dma_fence_put(*fence); > - *fence = next; > - > - amdgpu_res_next(&cursor, size); > - } > -err: > - mutex_unlock(&entity->lock); > - > - return r; > -} > - > int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, We should probably rename the function to amdgpu_ttm_clear_buffer() while doing this. Apart from that looks good to me. Regards, Christian. > struct amdgpu_bo *bo, > uint32_t src_data, > struct dma_resv *resv, > - struct dma_fence **f, > + struct dma_fence **out_fence, > + bool consider_clear_status, > u64 k_job_id) > { > struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); > @@ -2659,6 +2608,11 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, > struct dma_fence *next; > uint64_t cur_size, to; > > + if (consider_clear_status && amdgpu_res_cleared(&dst)) { > + amdgpu_res_next(&dst, dst.size); > + continue; > + } > + > /* Never fill more than 256MiB at once to avoid timeouts */ > cur_size = min(dst.size, 256ULL << 20); > > @@ -2680,9 +2634,7 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, > } > error: > mutex_unlock(&entity->lock); > - if (f) > - *f = dma_fence_get(fence); > - dma_fence_put(fence); > + *out_fence = fence; > return r; > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > index a6249252948b..436a3e09a178 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h > @@ -187,14 +187,12 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev, > struct dma_resv *resv, > struct dma_fence **fence, > bool vm_needs_flush, uint32_t copy_flags); > -int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo, > - struct dma_resv *resv, > - struct dma_fence **fence); > int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity, > struct amdgpu_bo *bo, > uint32_t src_data, > struct dma_resv *resv, > - struct dma_fence **f, > + struct dma_fence **out_fence, > + bool consider_clear_status, > u64 k_job_id); > struct amdgpu_ttm_buffer_entity *amdgpu_ttm_next_clear_entity(struct amdgpu_device *adev); >

3 hours, 23 minutes

Re: [PATCH] dma-buf: system_heap: Optimize sg_table-to-pages conversion in vmap

by Christian König

On 4/6/26 23:49, Barry Song (Xiaomi) wrote: > From: Xueyuan Chen <Xueyuan.chen21(a)gmail.com> > > Replace the heavy for_each_sgtable_page() iterator in system_heap_do_vmap() > with a more efficient nested loop approach. > > Instead of iterating page by page, we now iterate through the scatterlist > entries via for_each_sgtable_sg(). Because pages within a single sg entry > are physically contiguous, we can populate the page array with a in an > inner loop using simple pointer math. This save a lot of time. > > The WARN_ON check is also pulled out of the loop to save branch > instructions. > > Performance results mapping a 2GB buffer on Radxa O6: > - Before: ~1440000 ns > - After: ~232000 ns > (~84% reduction in iteration time, or ~6.2x faster) Well real question is why do you care about the vmap performance? That should basically only be used for fbdev emulation (except for VMGFX) and we absolutely don't care about performance there. Regards, Christian. > > Cc: Sumit Semwal <sumit.semwal(a)linaro.org> > Cc: Benjamin Gaignard <benjamin.gaignard(a)collabora.com> > Cc: Brian Starkey <Brian.Starkey(a)arm.com> > Cc: John Stultz <jstultz(a)google.com> > Cc: T.J. Mercier <tjmercier(a)google.com> > Cc: Christian König <christian.koenig(a)amd.com> > Signed-off-by: Xueyuan Chen <Xueyuan.chen21(a)gmail.com> > Signed-off-by: Barry Song (Xiaomi) <baohua(a)kernel.org> > --- > drivers/dma-buf/heaps/system_heap.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/dma-buf/heaps/system_heap.c b/drivers/dma-buf/heaps/system_heap.c > index b3650d8fd651..769f01f0cc96 100644 > --- a/drivers/dma-buf/heaps/system_heap.c > +++ b/drivers/dma-buf/heaps/system_heap.c > @@ -224,16 +224,21 @@ static void *system_heap_do_vmap(struct system_heap_buffer *buffer) > int npages = PAGE_ALIGN(buffer->len) / PAGE_SIZE; > struct page **pages = vmalloc(sizeof(struct page *) * npages); > struct page **tmp = pages; > - struct sg_page_iter piter; > void *vaddr; > + u32 i, j, count; > + struct page *base_page; > + struct scatterlist *sg; > > if (!pages) > return ERR_PTR(-ENOMEM); > > - for_each_sgtable_page(table, &piter, 0) { > - WARN_ON(tmp - pages >= npages); > - *tmp++ = sg_page_iter_page(&piter); > + for_each_sgtable_sg(table, sg, i) { > + base_page = sg_page(sg); > + count = sg->length >> PAGE_SHIFT; > + for (j = 0; j < count; j++) > + *tmp++ = base_page + j; > } > + WARN_ON(tmp - pages != npages); > > vaddr = vmap(pages, npages, VM_MAP, PAGE_KERNEL); > vfree(pages);

5 hours, 37 minutes

Re: [PATCH] dma-buf: heaps: system: document system_cc_shared heap

by T.J. Mercier

On Thu, Apr 2, 2026 at 7:11 AM Jiri Pirko <jiri(a)resnulli.us> wrote: > > From: Jiri Pirko <jiri(a)nvidia.com> > > Document the system_cc_shared dma-buf heap that was introduced > recently. Describe its purpose, availability conditions and > relation to confidential computing VMs. > > Signed-off-by: Jiri Pirko <jiri(a)nvidia.com> > --- > Documentation/userspace-api/dma-buf-heaps.rst | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/userspace-api/dma-buf-heaps.rst b/Documentation/userspace-api/dma-buf-heaps.rst > index 05445c83b79a..591732393e7d 100644 > --- a/Documentation/userspace-api/dma-buf-heaps.rst > +++ b/Documentation/userspace-api/dma-buf-heaps.rst > @@ -16,6 +16,14 @@ following heaps: > > - The ``system`` heap allocates virtually contiguous, cacheable, buffers. > > + - The ``system_cc_shared`` heap allocates virtually contiguous, cacheable, > + buffers using shared (decrypted) memory. It is only present on > + confidential computing (CoCo) VMs where memory encryption is active > + (e.g., AMD SEV, Intel TDX). The allocated pages have the encryption > + bit cleared, making them accessible for device DMA without TDISP > + support. On non-CoCo VMs configurations, this heap is "non-CoCo VM configurations" > + not registered. Doesn't seem like you need to wrap this line. with that: Reviewed-by: T.J.Mercier <tjmercier(a)google.com> > + > - The ``default_cma_region`` heap allocates physically contiguous, > cacheable, buffers. Only present if a CMA region is present. Such a > region is usually created either through the kernel commandline Each paragraph starting with '-' confused me for a second there. Those aren't part of the diff. :)

17 hours, 14 minutes

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by admin＠trektechcorp.net

In the volatile world of cryptocurrency, where billions are lost annually to scams, hacks, phishing attacks, rug pulls, and wallet compromises, the demand for legitimate recovery services has never been higher. As of 02/ 22/ 2026, victims often face a dual challenge: recovering stolen or inaccessible funds while avoiding secondary scams that prey on desperation with false promises and upfront fees. Amid this landscape, TREK Tech Corp—commonly referred to as CCS—has established itself as a credible, professional firm specializing in blockchain forensics, crypto asset tracing, fraud investigation, and realistic recovery support. TREK Tech Corp operates with a foundation built on 14 years of experience in digital investigations, long predating the widespread adoption of cryptocurrencies. This extensive background in forensics gives CCS a significant edge over many newer entrants in the crypto recovery space. The firm focuses on helping individuals, families, and institutions trace lost or stolen digital assets using advanced, transparent methods rather than speculative or guaranteed outcomes. Their official website is https://www.trektechcorp.net, and direct inquiries can be sent to trektechcorp1(a)gmail.com. What sets TREK Tech Corp apart as a legitimate provider is its commitment to ethical standards and evidence-based processes. Unlike fraudulent recovery operations that demand large upfront payments without case evaluation or promise 100% success (a clear red flag in the industry), CCS conducts honest feasibility assessments from the outset. They never require clients to share private keys, seed phrases, or sensitive wallet credentials during initial consultations. Fees are typically aligned with outcomes, and the firm maintains strict confidentiality with robust data protection protocols. The core of TREK Tech Corp’ service is multi-layer blockchain attribution—a proprietary technique that tracks funds through complex laundering paths. Scammers frequently use mixers, cross-chain bridges, decentralized exchanges, privacy protocols, flash-loan obfuscation, and automated smart-contract tumbling to break direct traceability. Basic block explorers lose visibility after one or two hops, but CCS reconstructs these movements by analyzing on-chain behavioral patterns: timing correlations, amount similarities, address clustering via co-spending heuristics, change address reuse, and interactions with known services. A typical engagement begins with a secure intake process. Victims submit transaction hashes (TXIDs), wallet addresses, scam communications, screenshots, and timelines. TREK Tech Corp then performs comprehensive on-chain and off-chain analysis, building detailed transaction graphs and identifying probable endpoints—most commonly centralized exchanges that enforce KYC/AML compliance. When funds reach such platforms, CCS prepares evidence-grade forensic reports that include visualized flow diagrams, confidence-scored address clusters, identified laundering techniques, and recommended intervention steps. These reports are frequently used to support asset freeze requests submitted to exchange compliance teams or filed with law enforcement agencies such as the FBI’s Internet Crime Complaint Center (IC3), local cybercrime units, or financial regulators. TREK Tech Corp emphasizes speed: the sooner a theft is reported and analyzed, the higher the chance of intervention before funds are fully dispersed. In cases where rapid action was taken, partial recoveries—often 70–90% of stolen amounts—have been achieved through coordinated freezes and subsequent legal processes. While full recovery is never guaranteed due to blockchain’s immutable design and variables like scammer sophistication and jurisdictional limits, CCS provides clear, realistic expectations from day one. Beyond recovery support, TREK Tech Corp prioritizes victim education and prevention. Clients receive tailored guidance on hardening security: using hardware wallets, enabling strong multi-factor authentication, securely backing up seed phrases in multiple encrypted locations, verifying addresses before every transfer, monitoring wallet activity proactively, and recognizing emerging threats such as AI-enhanced impersonation scams, clipboard hijacking, or malicious browser extensions. This preventive focus helps reduce the likelihood of future incidents and empowers users in an environment where threats evolve rapidly. The firm’s legitimacy is further reinforced by its performance metrics and client feedback. As of early 2026, TREK Tech Corp has successfully handled over 426 documented projects and maintains a 4.28 out of 5 rating based on more than 2,467 verified reviews. Clients consistently highlight the team’s professionalism, technical precision, clear communication, regular updates, and genuine support during high-stress situations. In an industry rife with advance-fee fraud and misleading marketing, CCS stands out for refusing high-pressure tactics, avoiding unrealistic guarantees, and focusing on evidence-driven results. For anyone who has suffered a crypto loss—whether through a sophisticated scam, forgotten credentials, hardware failure, or inheritance complications—TREK Tech Corp offers a professional, confidential pathway forward. Their website, https://www.trektechcorp.net, provides in-depth information about services, the investigation process, anonymized case examples, and how to initiate contact. Direct email communication is available at trektechcorp1(a)gmail.com for a no-obligation initial consultation. In conclusion, legitimate crypto recovery requires expertise, transparency, and ethical conduct—qualities TREK Tech Corp consistently demonstrates. While blockchain’s architecture limits reversals, CCS leverages decades of investigative rigor, advanced multi-layer attribution, and strategic coordination to deliver clarity, evidence, and realistic recovery opportunities. In 2026’s high-risk digital asset environment, partnering with a reputable firm like TREK Tech Corp can make the critical difference between permanent loss and meaningful progress toward reclamation and renewed security.

3 days, 7 hours

Expertise in Recovery

by penelopestaunton931＠gmail.com

4 days, 15 hours

Expertise in Recovery

by penelopestaunton931＠gmail.com

4 days, 15 hours

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