Linaro-mm-sig

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2905 discussions

Re: [Linaro-mm-sig] [RFC][PATCH 0/6] ion: improved ABI

by Laura Abbott

On 06/06/2016 11:59 PM, Chen Feng wrote: > The idea is good, define the heap ids in header file is inconvenient. > > But if we query the heaps information from user-space. > > It need to maintain this ids and name userspace one by one. The code may > be complicated in different module user-space. > > In android, the gralloc and other lib will all use ion to alloc memory. > > This will make it more difficult to maintain user-space code. > This was a concern I had had as well. Anything that involves dynamic probing is going to involve more tracking. Do you think some library code in libion would help? Thanks, Laura > > But beyond this, The new alloc2 with not-handle flag is good. > And the pull out of ioctl interface is also a good cleanup. > > On 2016/6/7 2:23, Laura Abbott wrote: >> >> The ABI for Ion's ioctl interface are a pain to work with. The heap IDs >> are a 32-bit non-discoverable namespace that form part of the ABI. There's >> no way to determine what ABI version is in use which leads to problems >> if the ABI changes or needs to be updated. >> >> This series is a first approach to give a better ABI for Ion. This includes: >> >> - Following the advice in botching-up-ioctls.txt >> - Ioctl for ABI version >> - Dynamic assignment of heap ids >> - queryable heap ids >> - Runtime mapping of heap ids, including fallbacks. This avoids the need to >> encode the fallbacks as an ABI. >> >> I'm most interested in feedback if this ABI is actually an improvement and >> usable. The heap id map/query interface seems error prone but I didn't have >> a cleaner solution. There aren't any kernel APIs for the new features as the >> focus was on a userspace API but I anticipate that following easily once >> the userspace API is established. >> >> >> Thanks, >> Laura >> >> P.S. Not to turn this into a bike shedding session but if you have suggestions >> for a name for this framework other than Ion I would be interested to hear >> them. Too many other things are already named Ion. >> >> Laura Abbott (6): >> staging: android: ion: return error value for ion_device_add_heap >> staging: android: ion: Switch to using an idr to manage heaps >> staging: android: ion: Drop heap type masks >> staging: android: ion: Pull out ion ioctls to a separate file >> staging: android: ion: Add an ioctl for ABI checking >> staging: android: ion: Introduce new ioctls for dynamic heaps >> >> drivers/staging/android/ion/Makefile | 3 +- >> drivers/staging/android/ion/ion-ioctl.c | 243 ++++++++++++++++++ >> drivers/staging/android/ion/ion.c | 438 ++++++++++++++++---------------- >> drivers/staging/android/ion/ion_priv.h | 109 +++++++- >> drivers/staging/android/uapi/ion.h | 164 +++++++++++- >> 5 files changed, 728 insertions(+), 229 deletions(-) >> create mode 100644 drivers/staging/android/ion/ion-ioctl.c >> >

9 years

[RFC][PATCH 0/3] Clean up Ion mapping/caching

by Laura Abbott

Hi, This series cleans up Ion a bit to be more in line with existing standards for caching and dma mapping. The most controversial part of this is probably going to be the first patch. Ion takes quite a few liberties with how the DMA APIs are used for cache syncing. dma_sync_sg is used without calling dma_map first. There isn't a good way to get the cache synchronization with the DMA APIs. The behavior of Ion is closer to the DRM framework which uses its own private cache APIs for synchronization so I took that approach. Assuming the approach of the first patch is appropriate, the next two patches are fairly simple. dma_buf added support for a sync ioctl. Ion has a similar ioctl already so this fixes the Ion APIs to be compatible with the dma_buf ioctl. My plan would be to put a timeline on deprecation for the old Ion sync ioctl. The map_dma_buf calls were also missing calls to the underlying DMA APIs so the final patch in the series adds the appropriate calls. Feedback is appreciated. Thanks, Laura Laura Abbott (3): staging: ion: Move away from the DMA APIs for cache flushing staging: ion: Add support for syncing with DMA_BUF_IOCTL_SYNC staging: ion: Add dma_map/dma_unmap calls to dma_buf calls drivers/staging/android/ion/Kconfig | 14 ++++- drivers/staging/android/ion/Makefile | 3 + drivers/staging/android/ion/ion-arm.c | 83 ++++++++++++++++++++++++ drivers/staging/android/ion/ion-arm64.c | 46 ++++++++++++++ drivers/staging/android/ion/ion-x86.c | 34 ++++++++++ drivers/staging/android/ion/ion.c | 84 +++++++++++++------------ drivers/staging/android/ion/ion_carveout_heap.c | 5 +- drivers/staging/android/ion/ion_chunk_heap.c | 7 +-- drivers/staging/android/ion/ion_page_pool.c | 3 +- drivers/staging/android/ion/ion_priv.h | 14 ++--- drivers/staging/android/ion/ion_system_heap.c | 5 +- 11 files changed, 235 insertions(+), 63 deletions(-) create mode 100644 drivers/staging/android/ion/ion-arm.c create mode 100644 drivers/staging/android/ion/ion-arm64.c create mode 100644 drivers/staging/android/ion/ion-x86.c -- 2.5.5

9 years

[GIT PULL]: minor dma-buf updates for 4.7

by Sumit Semwal

Hi Linus, A tiny pull request with mostly cosmetic changes in dma-buf for 4.7; may I request you to please pull? The following changes since commit 852f42a69b93dc71507adedeed876d57b8c2c2fa: Merge branch 'uuid' (lib/uuid fixes from Andy) (2016-05-30 15:27:07 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/sumits/dma-buf.git tags/dma-buf-for-4.7 for you to fetch changes up to b02da6f8236148009c22167cd7013d5ce04a2d37: dma-buf: use vma_pages() (2016-05-31 22:17:05 +0530) ---------------------------------------------------------------- Minor dma-buf updates for 4.7: - use of vma_pages instead of explicit computation. - DocBook and headerdoc updates for dma-buf. ---------------------------------------------------------------- Luis de Bethencourt (1): fence: add missing descriptions for fence Muhammad Falak R Wani (1): dma-buf: use vma_pages() Rob Clark (3): dma-buf: headerdoc fixes reservation: add headerdoc comments doc: update/fixup dma-buf related DocBook Documentation/DocBook/device-drivers.tmpl | 36 ++++++++++++++-- drivers/dma-buf/dma-buf.c | 7 +-- drivers/dma-buf/reservation.c | 72 +++++++++++++++++++++++++++++-- include/linux/dma-buf.h | 13 ++++-- include/linux/fence.h | 2 + include/linux/reservation.h | 53 +++++++++++++++++++++++ 6 files changed, 169 insertions(+), 14 deletions(-) Thanks and best regards, Sumit.

9 years, 1 month

[PATCH v3 0/4] Generic zpos property

by Benjamin Gaignard

version 3: use kmalloc_array instead of kmalloc. Correct normalize_zpos computation (comeback to Mareck original code) version 2: add a zpos property into drm_plane structure to simplify code. This allow to get/set zpos value in core and not in drivers code. Fix various remarks. version 1: refactor Marek's patches to have per plane zpos property instead of only one in core. Benjamin Gaignard (2): drm: sti: use generic zpos for plane drm: rcar: use generic code for managing zpos plane property Marek Szyprowski (2): drm: add generic zpos property drm/exynos: use generic code for managing zpos plane property Documentation/DocBook/gpu.tmpl | 10 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_atomic.c | 4 + drivers/gpu/drm/drm_atomic_helper.c | 6 + drivers/gpu/drm/drm_blend.c | 226 ++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_crtc_internal.h | 3 + drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 - drivers/gpu/drm/exynos/exynos_drm_plane.c | 67 ++------- drivers/gpu/drm/exynos/exynos_mixer.c | 6 +- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 1 - drivers/gpu/drm/rcar-du/rcar_du_kms.c | 5 - drivers/gpu/drm/rcar-du/rcar_du_plane.c | 9 +- drivers/gpu/drm/rcar-du/rcar_du_plane.h | 2 - drivers/gpu/drm/sti/sti_mixer.c | 9 +- drivers/gpu/drm/sti/sti_plane.c | 80 ++++------- drivers/gpu/drm/sti/sti_plane.h | 2 - include/drm/drm_crtc.h | 28 ++++ 18 files changed, 325 insertions(+), 139 deletions(-) create mode 100644 drivers/gpu/drm/drm_blend.c Cc: Inki Dae <inki.dae(a)samsung.com> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Ville Syrjala <ville.syrjala(a)linux.intel.com> Cc: Joonyoung Shim <jy0922.shim(a)samsung.com> Cc: Seung-Woo Kim <sw0312.kim(a)samsung.com> Cc: Andrzej Hajda <a.hajda(a)samsung.com> Cc: Krzysztof Kozlowski <k.kozlowski(a)samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie(a)samsung.com> Cc: Tobias Jakobi <tjakobi(a)math.uni-bielefeld.de> Cc: Gustavo Padovan <gustavo(a)padovan.org> Cc: vincent.abriou(a)st.com Cc: fabien.dessenne(a)st.com Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> -- 1.9.1

9 years, 1 month

[PATCH 1/4] drm: add generic zpos property

by Benjamin Gaignard

From: Marek Szyprowski <m.szyprowski(a)samsung.com> This patch adds support for generic plane's zpos property property with well-defined semantics: - added zpos properties to plane and plane state structures - added helpers for normalizing zpos properties of given set of planes - well defined semantics: planes are sorted by zpos values and then plane id value if zpos equals Normalized zpos values are calculated automatically when generic muttable zpos property has been initialized. Drivers can simply use plane_state->normalized_zpos in their atomic_check and/or plane_update callbacks without any additional calls to DRM core. Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> Compare to Marek's original patch zpos property is now specific to each plane and no more to the core. Normalize function take care of the range of per plane defined range before set normalized_zpos. Signed-off-by: Benjamin Gaignard <benjamin.gaignard(a)linaro.org> Cc: Inki Dae <inki.dae(a)samsung.com> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Ville Syrjala <ville.syrjala(a)linux.intel.com> Cc: Joonyoung Shim <jy0922.shim(a)samsung.com> Cc: Seung-Woo Kim <sw0312.kim(a)samsung.com> Cc: Andrzej Hajda <a.hajda(a)samsung.com> Cc: Krzysztof Kozlowski <k.kozlowski(a)samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie(a)samsung.com> Cc: Tobias Jakobi <tjakobi(a)math.uni-bielefeld.de> Cc: Gustavo Padovan <gustavo(a)padovan.org> Cc: vincent.abriou(a)st.com Cc: fabien.dessenne(a)st.com Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> --- Documentation/DocBook/gpu.tmpl | 10 ++ drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_atomic.c | 4 + drivers/gpu/drm/drm_atomic_helper.c | 6 + drivers/gpu/drm/drm_blend.c | 229 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_crtc_internal.h | 3 + include/drm/drm_crtc.h | 28 +++++ 7 files changed, 281 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/drm_blend.c diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl index 9dd48f7..0df6abb 100644 --- a/Documentation/DocBook/gpu.tmpl +++ b/Documentation/DocBook/gpu.tmpl @@ -2151,6 +2151,16 @@ void intel_crt_init(struct drm_device *dev) the underlying hardware).</td> </tr> <tr> + <td valign="top" > "zpos" </td> + <td valign="top" >RANGE</td> + <td valign="top" >Min= driver dependent, Max= driver dependent</td> + <td valign="top" >Plane</td> + <td valign="top" >Plane's 'z' position during blending operation (0 for background, highest for frontmost). + If two planes assigned to same CRTC have equal zpos values, the plane with higher plane + id is treated as closer to front. Can be IMMUTABLE if driver doesn't support changing + planes' order. Exact value range is driver dependent.</td> + </tr> + <tr> <td rowspan="20" valign="top" >i915</td> <td rowspan="2" valign="top" >Generic</td> <td valign="top" >"Broadcast RGB"</td> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 2bd3e5a..df88253 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -2,7 +2,7 @@ # Makefile for the drm device driver. This driver provides support for the # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. -drm-y := drm_auth.o drm_bufs.o drm_cache.o \ +drm-y := drm_auth.o drm_bufs.o drm_blend.o drm_cache.o \ drm_context.o drm_dma.o \ drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \ drm_lock.o drm_memory.o drm_drv.o drm_vm.o \ diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 86e89db..bd457ca 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -700,6 +700,8 @@ int drm_atomic_plane_set_property(struct drm_plane *plane, state->src_h = val; } else if (property == config->rotation_property) { state->rotation = val; + } else if (property == plane->zpos_property) { + state->zpos = val; } else if (plane->funcs->atomic_set_property) { return plane->funcs->atomic_set_property(plane, state, property, val); @@ -756,6 +758,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane, *val = state->src_h; } else if (property == config->rotation_property) { *val = state->rotation; + } else if (property == plane->zpos_property) { + *val = state->zpos; } else if (plane->funcs->atomic_get_property) { return plane->funcs->atomic_get_property(plane, state, property, val); } else { diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 997fd21..f10652f 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -32,6 +32,8 @@ #include <drm/drm_atomic_helper.h> #include <linux/fence.h> +#include "drm_crtc_internal.h" + /** * DOC: overview * @@ -587,6 +589,10 @@ drm_atomic_helper_check_planes(struct drm_device *dev, struct drm_plane_state *plane_state; int i, ret = 0; + ret = drm_atomic_helper_normalize_zpos(dev, state); + if (ret) + return ret; + for_each_plane_in_state(state, plane, plane_state, i) { const struct drm_plane_helper_funcs *funcs; diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c new file mode 100644 index 0000000..eef59bb --- /dev/null +++ b/drivers/gpu/drm/drm_blend.c @@ -0,0 +1,229 @@ +/* + * Copyright (C) 2016 Samsung Electronics Co.Ltd + * Authors: + * Marek Szyprowski <m.szyprowski(a)samsung.com> + * + * DRM core plane blending related functions + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that copyright + * notice and this permission notice appear in supporting documentation, and + * that the name of the copyright holders not be used in advertising or + * publicity pertaining to distribution of the software without specific, + * written prior permission. The copyright holders make no representations + * about the suitability of this software for any purpose. It is provided "as + * is" without express or implied warranty. + * + * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THIS SOFTWARE. + */ +#include <drm/drmP.h> +#include <drm/drm_atomic.h> +#include <drm/drm_crtc.h> +#include <linux/export.h> +#include <linux/slab.h> +#include <linux/sort.h> + +#include "drm_internal.h" + +/** + * drm_plane_create_zpos_property - create mutable zpos property + * @plane: drm plane + * @min: minimal possible value of zpos property + * @max: maximal possible value of zpos property + * + * This function initializes generic mutable zpos property and enables support + * for it in drm core. Drivers can then attach this property to planes to enable + * support for configurable planes arrangement during blending operation. + * Once mutable zpos property has been enabled, the DRM core will automatically + * calculate drm_plane_state->normalized_zpos values. Usually min should be set + * to 0 and max to maximal number of planes for given crtc - 1. + * + * If zpos of some planes cannot be changed (like fixed background or + * cursor/topmost planes), driver should adjust min/max values and assign those + * planes immutable zpos property with lower or higher values (for more + * information, see drm_mode_create_zpos_immutable_property() function). In such + * case driver should also assign proper initial zpos values for all planes in + * its plane_reset() callback, so the planes will be always sorted properly. + * + * Returns: + * Zero on success, negative errno on failure. + */ +int drm_plane_create_zpos_property(struct drm_plane *plane, + unsigned int min, unsigned int max) +{ + struct drm_property *prop; + + prop = drm_property_create_range(plane->dev, 0, "zpos", min, max); + if (!prop) + return -ENOMEM; + + drm_object_attach_property(&plane->base, prop, min); + + plane->zpos_property = prop; + return 0; +} +EXPORT_SYMBOL(drm_plane_create_zpos_property); + +/** + * drm_plane_create_zpos_immutable_property - create immuttable zpos property + * @plane: drm plane + * @min: minimal possible value of zpos property + * @max: maximal possible value of zpos property + * + * This function initializes generic immutable zpos property and enables + * support for it in drm core. Using this property driver lets userspace + * to get the arrangement of the planes for blending operation and notifies + * it that the hardware (or driver) doesn't support changing of the planes' + * order. + * + * Returns: + * Zero on success, negative errno on failure. + */ +int drm_plane_create_zpos_immutable_property(struct drm_plane *plane, + unsigned int min, unsigned int max) +{ + struct drm_property *prop; + + prop = drm_property_create_range(plane->dev, DRM_MODE_PROP_IMMUTABLE, + "zpos", min, max); + if (!prop) + return -ENOMEM; + + drm_object_attach_property(&plane->base, prop, min); + + plane->zpos_property = prop; + return 0; +} +EXPORT_SYMBOL(drm_plane_create_zpos_immutable_property); + +static int drm_atomic_state_zpos_cmp(const void *a, const void *b) +{ + const struct drm_plane_state *sa = *(struct drm_plane_state **)a; + const struct drm_plane_state *sb = *(struct drm_plane_state **)b; + + if (sa->zpos != sb->zpos) + return sa->zpos - sb->zpos; + else + return sa->plane->base.id - sb->plane->base.id; +} + +/** + * drm_atomic_helper_crtc_normalize_zpos - calculate normalized zpos values + * @crtc: crtc with planes, which have to be considered for normalization + * @crtc_state: new atomic state to apply + * + * This function checks new states of all planes assigned to given crtc and + * calculates normalized zpos value for them. Planes are compared first by their + * zpos values, then by plane id (if zpos equals). Plane with lowest zpos value + * is at the bottom. The plane_state->normalized_zpos is then filled with unique + * values from 0 to number of active planes in crtc minus one. + * + * RETURNS + * Zero for success or -errno + */ +int drm_atomic_helper_crtc_normalize_zpos(struct drm_crtc *crtc, + struct drm_crtc_state *crtc_state) +{ + struct drm_atomic_state *state = crtc_state->state; + struct drm_device *dev = crtc->dev; + int total_planes = dev->mode_config.num_total_plane; + struct drm_plane_state **states; + struct drm_plane *plane; + int i, zpos, n = 0; + int ret = 0; + + DRM_DEBUG_ATOMIC("[CRTC:%d:%s] calculating normalized zpos values\n", + crtc->base.id, crtc->name); + + states = kmalloc(total_planes * sizeof(*states), GFP_KERNEL); + if (!states) + return -ENOMEM; + + /* + * Normalization process might create new states for planes which + * normalized_zpos has to be recalculated. + */ + drm_for_each_plane_mask(plane, dev, crtc_state->plane_mask) { + struct drm_plane_state *plane_state = + drm_atomic_get_plane_state(state, plane); + if (IS_ERR(plane_state)) { + ret = PTR_ERR(plane_state); + goto done; + } + states[n++] = plane_state; + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] processing zpos value %d\n", + plane->base.id, plane->name, + plane_state->zpos); + } + + sort(states, n, sizeof(*states), drm_atomic_state_zpos_cmp, NULL); + + for (i = 0, zpos = 0; i < n; i++, zpos++) { + plane = states[i]->plane; + + zpos = max_t(int, zpos, states[i]->zpos); + + states[i]->normalized_zpos = zpos; + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] normalized zpos value %d\n", + plane->base.id, plane->name, zpos); + } + crtc_state->zpos_changed = true; + +done: + kfree(states); + return ret; +} +EXPORT_SYMBOL(drm_atomic_helper_crtc_normalize_zpos); + +/** + * drm_atomic_helper_normalize_zpos - calculate normalized zpos values for all + * crtcs + * @dev: DRM device + * @state: atomic state of DRM device + * + * This function calculates normalized zpos value for all modified planes in + * the provided atomic state of DRM device. For more information, see + * drm_atomic_helper_crtc_normalize_zpos() function. + * + * RETURNS + * Zero for success or -errno + */ +int drm_atomic_helper_normalize_zpos(struct drm_device *dev, + struct drm_atomic_state *state) +{ + struct drm_crtc *crtc; + struct drm_crtc_state *crtc_state; + struct drm_plane *plane; + struct drm_plane_state *plane_state; + int i, ret = 0; + + for_each_plane_in_state(state, plane, plane_state, i) { + crtc = plane_state->crtc; + if (!crtc) + continue; + if (plane->state->zpos != plane_state->zpos) { + crtc_state = + drm_atomic_get_existing_crtc_state(state, crtc); + crtc_state->zpos_changed = true; + } + } + + for_each_crtc_in_state(state, crtc, crtc_state, i) { + if (crtc_state->plane_mask != crtc->state->plane_mask || + crtc_state->zpos_changed) { + ret = drm_atomic_helper_crtc_normalize_zpos(crtc, + crtc_state); + if (ret) + return ret; + } + } + return 0; +} +EXPORT_SYMBOL(drm_atomic_helper_normalize_zpos); diff --git a/drivers/gpu/drm/drm_crtc_internal.h b/drivers/gpu/drm/drm_crtc_internal.h index a78c138..37d9068 100644 --- a/drivers/gpu/drm/drm_crtc_internal.h +++ b/drivers/gpu/drm/drm_crtc_internal.h @@ -42,3 +42,6 @@ int drm_atomic_get_property(struct drm_mode_object *obj, int drm_mode_atomic_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); +/* drm_blend.c */ +int drm_atomic_helper_normalize_zpos(struct drm_device *dev, + struct drm_atomic_state *state); diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index d1559cd..921c93f 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -305,6 +305,7 @@ struct drm_plane_helper_funcs; * @mode_changed: crtc_state->mode or crtc_state->enable has been changed * @active_changed: crtc_state->active has been toggled. * @connectors_changed: connectors to this crtc have been updated + * @zpos_changed: zpos values of planes on this crtc have been updated * @color_mgmt_changed: color management properties have changed (degamma or * gamma LUT or CSC matrix) * @plane_mask: bitmask of (1 << drm_plane_index(plane)) of attached planes @@ -340,6 +341,7 @@ struct drm_crtc_state { bool mode_changed : 1; bool active_changed : 1; bool connectors_changed : 1; + bool zpos_changed : 1; bool color_mgmt_changed : 1; /* attached planes bitmask: @@ -1263,6 +1265,9 @@ struct drm_connector { * plane (in 16.16) * @src_w: width of visible portion of plane (in 16.16) * @src_h: height of visible portion of plane (in 16.16) + * @zpos: priority of the given plane on crtc (optional) + * @normalized_zpos: normalized value of zpos: unique, range from 0 to N-1 + * for given crtc * @state: backpointer to global drm_atomic_state */ struct drm_plane_state { @@ -1283,6 +1288,10 @@ struct drm_plane_state { /* Plane rotation */ unsigned int rotation; + /* Plane zpos */ + unsigned int zpos; + unsigned int normalized_zpos; + struct drm_atomic_state *state; }; @@ -1516,6 +1525,7 @@ enum drm_plane_type { * @properties: property tracking for this plane * @type: type of plane (overlay, primary, cursor) * @state: current atomic state for this plane + * @zpos_property: zpos property for this plane */ struct drm_plane { struct drm_device *dev; @@ -1546,6 +1556,8 @@ struct drm_plane { const struct drm_plane_helper_funcs *helper_private; struct drm_plane_state *state; + + struct drm_property *zpos_property; }; /** @@ -2554,6 +2566,22 @@ extern struct drm_property *drm_mode_create_rotation_property(struct drm_device extern unsigned int drm_rotation_simplify(unsigned int rotation, unsigned int supported_rotations); +int drm_plane_atomic_set_zpos_property(struct drm_plane *plane, + struct drm_plane_state *state, + struct drm_property *property, + uint64_t val); + +int drm_plane_atomic_get_zpos_property(struct drm_plane *plane, + const struct drm_plane_state *state, + struct drm_property *property, + uint64_t *val); + +int drm_plane_create_zpos_property(struct drm_plane *plane, + unsigned int min, unsigned int max); +int drm_plane_create_zpos_immutable_property(struct drm_plane *plane, + unsigned int min, + unsigned int max); + /* Helpers */ static inline struct drm_plane *drm_plane_find(struct drm_device *dev, -- 1.9.1

9 years, 1 month

Re: [Linaro-mm-sig] [PATCH v2] dma-buf: use vma_pages().

by Eric Engestrom

On Mon, May 23, 2016 at 05:08:42PM +0530, Muhammad Falak R Wani wrote: > Replace explicit computation of vma page count by a call to > vma_pages(). > Also, include <linux/mm.h> All good! Reviewed-by: Eric Engestrom <eric.engestrom(a)imgtec.com>

9 years, 1 month

Re: [Linaro-mm-sig] [PATCH] dma-buf: use vma_pages().

by Eric Engestrom

On Sat, May 21, 2016 at 06:53:32PM +0530, Muhammad Falak R Wani wrote: > Replace explicit computation of vma page count by a call to > vma_pages() > > Signed-off-by: Muhammad Falak R Wani <falakreyaz(a)gmail.com> > --- Good change, but this function is defined in mm.h Please add: #include <linux/mm.h> With that fixed: Reviewed-by: Eric Engestrom <eric.engestrom(a)imgtec.com>

9 years, 1 month

[PATCH v8 0/3] Secure Memory Allocation Framework

by Benjamin Gaignard

version 8 chanegs: - rework of the structures used within ioctl by adding a version field and padding to be futur proof - rename fake secure moduel to test secure module - fix the various remarks done on the previous patcheset version 7 changes: - rebased on kernel 4.6-rc7 - simplify secure module API - add vma ops to be able to detect mmap/munmap calls - add ioctl to get number and allocator names - update libsmaf with adding tests https://git.linaro.org/people/benjamin.gaignard/libsmaf.git - add debug log in fake secure module version 6 changes: - rebased on kernel 4.5-rc4 - fix mmapping bug while requested allocation size isn't a a multiple of PAGE_SIZE (add a test for this in libsmaf) version 5 changes: - rebased on kernel 4.3-rc6 - rework locking schema and make handle status use an atomic_t - add a fake secure module to allow performing tests without trusted environment version 4 changes: - rebased on kernel 4.3-rc3 - fix missing EXPORT_SYMBOL for smaf_create_handle() version 3 changes: - Remove ioctl for allocator selection instead provide the name of the targeted allocator with allocation request. Selecting allocator from userland isn't the prefered way of working but is needed when the first user of the buffer is a software component. - Fix issues in case of error while creating smaf handle. - Fix module license. - Update libsmaf and tests to care of the SMAF API evolution https://git.linaro.org/people/benjamin.gaignard/libsmaf.git version 2 changes: - Add one ioctl to allow allocator selection from userspace. This is required for the uses case where the first user of the buffer is a software IP which can't perform dma_buf attachement. - Add name and ranking to allocator structure to be able to sort them. - Create a tiny library to test SMAF: https://git.linaro.org/people/benjamin.gaignard/libsmaf.git - Fix one issue when try to secure buffer without secure module registered The outcome of the previous RFC about how do secure data path was the need of a secure memory allocator (https://lkml.org/lkml/2015/5/5/551) SMAF goal is to provide a framework that allow allocating and securing memory by using dma_buf. Each platform have it own way to perform those two features so SMAF design allow to register helper modules to perform them. To be sure to select the best allocation method for devices SMAF implement deferred allocation mechanism: memory allocation is only done when the first device effectively required it. Allocator modules have to implement a match() to let SMAF know if they are compatibles with devices needs. This patch set provide an example of allocator module which use dma_{alloc/free/mmap}_attrs() and check if at least one device have coherent_dma_mask set to DMA_BIT_MASK(32) in match function. I have named smaf-cma.c like it is done for drm_gem_cma_helper.c even if a better name could be found for this file. Secure modules are responsibles of granting and revoking devices access rights on the memory. Secure module is also called to check if CPU map memory into kernel and user address spaces. An example of secure module implementation can be found here: http://git.linaro.org/people/benjamin.gaignard/optee-sdp.git This code isn't yet part of the patch set because it depends on generic TEE which is still under discussion (https://lwn.net/Articles/644646/) For allocation part of SMAF code I get inspirated by Sumit Semwal work about constraint aware allocator. Benjamin Gaignard (3): create SMAF module SMAF: add CMA allocator SMAF: add test secure module drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/smaf/Kconfig | 17 + drivers/smaf/Makefile | 3 + drivers/smaf/smaf-cma.c | 188 ++++++++++ drivers/smaf/smaf-core.c | 818 +++++++++++++++++++++++++++++++++++++++++ drivers/smaf/smaf-testsecure.c | 90 +++++ include/linux/smaf-allocator.h | 45 +++ include/linux/smaf-secure.h | 65 ++++ include/uapi/linux/smaf.h | 85 +++++ 10 files changed, 1314 insertions(+) create mode 100644 drivers/smaf/Kconfig create mode 100644 drivers/smaf/Makefile create mode 100644 drivers/smaf/smaf-cma.c create mode 100644 drivers/smaf/smaf-core.c create mode 100644 drivers/smaf/smaf-testsecure.c create mode 100644 include/linux/smaf-allocator.h create mode 100644 include/linux/smaf-secure.h create mode 100644 include/uapi/linux/smaf.h -- 1.9.1

9 years, 1 month

[PATCH v8 00/11] Add DRM for stih4xx platforms

by Benjamin Gaignard

This series of patches add the support of DRM/KMS drivers for STMicroelectronics chipsets stih416 and stih407. version 8: - Allow driver to be build as kernel module. - Use Universal Plane instead of legacy code. patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v8 version 7: - rebased on top of drm-next (2014-07-24) patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v7 version 6: - rebased on top of new component framework API. patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v6 version 5: - Rework sti_drm_drv probes functions to support deferred probe. This allow hdmi to delayed framebuffer creation until I2C is available. - Add ops functions in sti_layer structure to simpify GDP and VID code. - Add NOTES file to describe how the DRM concepts are mapped on hardware. patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v5 version 4: - Remove depency between TVout it subdevices HDMI and HDA - Rework and simplify VTG and VTAC code - Fix numbers of typo and indentation - Remove debug (will be push in separate patches) - Fix remarks done in previous patcheset patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v4 version 3: - Correctly split code between probe and bind funtions - Squash some commits - remove HQ-VDP device code to have a smaller patcheset, we will introduce it later. patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v3 version 2: - Use componentized device instead of register sub-devices in master driver probe function - Fix Makefile and Kconfig to only allow built-in compilation patches could be found here: git://git.linaro.org/people/benjamin.gaignard/kernel.git on branch: drm_kms_for_next-v2 version 1: - First path submission Hardware is split in two main blocks: Compositor and TVout. Each of them includes specific hardware IPs and the display timing are controlled by a specific Video Timing Generator hardware IP (VTG). Compositor is made of the follow hardware IPs: - GDP (Generic Display Pipeline) which is an entry point for graphic (RGB) buffers - VDP (Video Diplay Pipeline) which is an entry point for video (YUV) buffers - HQVDP (High Quality Video Display Processor) that supports scaling, deinterlacing and some miscellaneous image quality improvements. It fetches the Video decoded buffers from memory, processes them and pushes them to the Compositor through a HW dedicated bus. - Mixer is responsible of mixing all the entries depending of their respective z-order and layout TVout is divided in 3 parts: - HDMI to generate HDMI signals, depending of chipset version HDMI phy can change. - HDA to generate signals for HD analog TV - VIP to control/switch data path coming from Compositor On stih416 compositor and Tvout are on different dies so a Video Trafic Advance inter-die Communication mechanism (VTAC) is needed. +---------------------------------------------+ +----------------------------------------+ | +-------------------------------+ +----+ | | +----+ +--------------------------+ | | | | | | | | | | | +---------+ +----+ | | | | +----+ +------+ | | | | | | | | | VIP |---->|HDMI| | | | | |GPD +------------->| | | | | | | | | | | | +----+ | | | | +----+ |Mixer |--|-->| | | | | |---|->| switcher| | | | | | | | | | | | | | | | | +----+ | | | | | | | | | | | | | | | |---->|HDA | | | | | +------+ | |VTAC|========>|VTAC| | +---------+ +----+ | | | | | | | | | | | | | | | | Compositor | | | | | | | | TVout | | | +-------------------------------+ | | | | | | +--------------------------+ | | ^ | | | | | | ^ | | | | | | | | | | | | +--------------+ | | | | | | +-------------+ | | | VTG (master) |----->| | | | | |----->| VTG (slave) | | | +--------------+ +----+ | | +----+ +-------------+ | |Digital die | | Analog Die| +---------------------------------------------+ +----------------------------------------+ On stih407 Compositor and Tvout are on the same die +-----------------------------------------------------------------+ | +-------------------------------+ +--------------------------+ | | | | | +---------+ +----+ | | | | +----+ +------+ | | | VIP |---->|HDMI| | | | | |GPD +------------->| | | | | | +----+ | | | | +----+ |Mixer |--|--|->| switcher| | | | | +----+ +-----+ | | | | | | +----+ | | | | |VDP +-->+HQVDP+--->| | | | | |---->|HDA | | | | | +----+ +-----+ +------+ | | +---------+ +----+ | | | | | | | | | | Compositor | | TVout | | | +-------------------------------+ +--------------------------+ | | ^ ^ | | | | | | +--------------+ | | | VTG | | | +--------------+ | |Digital die | +-----------------------------------------------------------------+ In addition of the drivers for the IPs listed before a thin I2C driver (hdmiddc) is used by HDMI driver to retrieve EDID for monitor. To unify interfaces of GDP and VDP we create a "layer" interface called by compositor to control both GPD and VDP. Hardware have memory contraints (alignment, contiguous) so we use CMA drm helpers functions to allocate frame buffer. File naming convention is: - sti_* for IPs drivers - sti_drm_* for drm functions implementation. Benjamin Gaignard (11): drm: sti: add bindings for DRM driver drm: sti: add VTG driver drm: sti: add VTAC drivers drm: sti: add HDMI driver drm: sti: add HDA driver drm: sti: add TVOut driver drm: sti: add GDP layer drm: sti: add VID layer drm: sti: add Mixer drm: sti: add Compositor drm: sti: Add DRM driver itself .../devicetree/bindings/gpu/st,stih4xx.txt | 189 +++++ drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sti/Kconfig | 14 + drivers/gpu/drm/sti/Makefile | 21 + drivers/gpu/drm/sti/NOTES | 58 ++ drivers/gpu/drm/sti/sti_compositor.c | 279 +++++++ drivers/gpu/drm/sti/sti_compositor.h | 90 +++ drivers/gpu/drm/sti/sti_drm_crtc.c | 423 +++++++++++ drivers/gpu/drm/sti/sti_drm_crtc.h | 22 + drivers/gpu/drm/sti/sti_drm_drv.c | 241 ++++++ drivers/gpu/drm/sti/sti_drm_drv.h | 29 + drivers/gpu/drm/sti/sti_drm_plane.c | 195 +++++ drivers/gpu/drm/sti/sti_drm_plane.h | 18 + drivers/gpu/drm/sti/sti_gdp.c | 549 ++++++++++++++ drivers/gpu/drm/sti/sti_gdp.h | 16 + drivers/gpu/drm/sti/sti_hda.c | 794 ++++++++++++++++++++ drivers/gpu/drm/sti/sti_hdmi.c | 810 +++++++++++++++++++++ drivers/gpu/drm/sti/sti_hdmi.h | 88 +++ drivers/gpu/drm/sti/sti_hdmi_tx3g0c55phy.c | 336 +++++++++ drivers/gpu/drm/sti/sti_hdmi_tx3g0c55phy.h | 14 + drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c | 211 ++++++ drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.h | 14 + drivers/gpu/drm/sti/sti_layer.c | 197 +++++ drivers/gpu/drm/sti/sti_layer.h | 123 ++++ drivers/gpu/drm/sti/sti_mixer.c | 249 +++++++ drivers/gpu/drm/sti/sti_mixer.h | 54 ++ drivers/gpu/drm/sti/sti_tvout.c | 648 +++++++++++++++++ drivers/gpu/drm/sti/sti_vid.c | 138 ++++ drivers/gpu/drm/sti/sti_vid.h | 12 + drivers/gpu/drm/sti/sti_vtac.c | 215 ++++++ drivers/gpu/drm/sti/sti_vtg.c | 366 ++++++++++ drivers/gpu/drm/sti/sti_vtg.h | 28 + 33 files changed, 6444 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/st,stih4xx.txt create mode 100644 drivers/gpu/drm/sti/Kconfig create mode 100644 drivers/gpu/drm/sti/Makefile create mode 100644 drivers/gpu/drm/sti/NOTES create mode 100644 drivers/gpu/drm/sti/sti_compositor.c create mode 100644 drivers/gpu/drm/sti/sti_compositor.h create mode 100644 drivers/gpu/drm/sti/sti_drm_crtc.c create mode 100644 drivers/gpu/drm/sti/sti_drm_crtc.h create mode 100644 drivers/gpu/drm/sti/sti_drm_drv.c create mode 100644 drivers/gpu/drm/sti/sti_drm_drv.h create mode 100644 drivers/gpu/drm/sti/sti_drm_plane.c create mode 100644 drivers/gpu/drm/sti/sti_drm_plane.h create mode 100644 drivers/gpu/drm/sti/sti_gdp.c create mode 100644 drivers/gpu/drm/sti/sti_gdp.h create mode 100644 drivers/gpu/drm/sti/sti_hda.c create mode 100644 drivers/gpu/drm/sti/sti_hdmi.c create mode 100644 drivers/gpu/drm/sti/sti_hdmi.h create mode 100644 drivers/gpu/drm/sti/sti_hdmi_tx3g0c55phy.c create mode 100644 drivers/gpu/drm/sti/sti_hdmi_tx3g0c55phy.h create mode 100644 drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.c create mode 100644 drivers/gpu/drm/sti/sti_hdmi_tx3g4c28phy.h create mode 100644 drivers/gpu/drm/sti/sti_layer.c create mode 100644 drivers/gpu/drm/sti/sti_layer.h create mode 100644 drivers/gpu/drm/sti/sti_mixer.c create mode 100644 drivers/gpu/drm/sti/sti_mixer.h create mode 100644 drivers/gpu/drm/sti/sti_tvout.c create mode 100644 drivers/gpu/drm/sti/sti_vid.c create mode 100644 drivers/gpu/drm/sti/sti_vid.h create mode 100644 drivers/gpu/drm/sti/sti_vtac.c create mode 100644 drivers/gpu/drm/sti/sti_vtg.c create mode 100644 drivers/gpu/drm/sti/sti_vtg.h -- 1.9.1

9 years, 2 months

[RFC 0/3] Unify IOMMU-based DMA-mapping code for ARM and ARM64

by Marek Szyprowski

Dear All, This is an initial RFC on the unification of IOMMU-based DMA-mapping code for ARM and ARM64 architectures. Right now ARM architecture still use my old code for IOMMU-based DMA-mapping glue, initially merged in commit 4ce63fcd919c32d22528e54dcd89506962933719 ("ARM: dma-mapping: add support for IOMMU mapper"). In meantime ARM64 got a new, slightly improved implementation provided by Robin Murphy in commit 13b8629f651164d71f4d38b821925f93ba4236c8 ("arm64: Add IOMMU dma_ops"). Both implementations are very similar thus their unification is desired to avoid duplicating future works and simplify code, which uses this layer on both architectures. In this patchset I've selected the new implementation (from ARM64 architecture) as a base. This means that ARM-specific, old interface (arm_iommu_* functions) for configuring IOMMU domains will be no longer available and its users have to be converted to new API. Besides lack of old interface, the second difference is additional requirements for IOMMU drivers. New code relies on the support for IOMMU_DOMAIN_DMA and default IOMMU domain, which is automatically attached by the IOMMU core. The new code also assumes that the IOMMU-based DMA-mapping ops are mainly configured from arch_setup_dma_ops() function, which means that the IOMMU driver should provide needed of_xlate callbacks and initialize IOMMU ops for device nodes. However it should be also possible to initialize IOMMU-based DMA-mapping ops for client devices directly from IOMMU drivers by calling common_iommu_setup_dma_ops() (some drivers used such approach). IOMMU drivers should be also aware of the fact that the default domain is attached via device_attach and then device_attach callback can be called once again with different domain without previous detach from default domain. For more information on this issue, see the following thread: https://lists.linaro.org/pipermail/linaro-mm-sig/2016-February/004625.html Currently there are 4 users of the old arm_iommu_* interface: 1. Exynos DRM driver 2. Rockchip DRM driver 3. OMAP3 ISP camera driver 4. Renesas VMSA-compatible IPMMU driver In this patchset I've converted Exynos DRM driver for the new API (patch 1). This required some changes in the memory management model inside the driver and removal of some hacks, which were used to setup IOMMU-based DMA-mapping ops on the 'exynos-drm' virtual device and common IOMMU domain for all Exynos DRM sub-devices, those changes have been posted separately here: http://www.spinics.net/lists/dri-devel/msg100861.html Rockchip DRM driver requires similar conversion. Converting OMAP3 ISP camera driver to new API requires adding support for IOMMU groups to OMAP IOMMU driver, because the new DMA/IOMMU code used IOMMU_DOMAIN_DMA type domains and default groups. Renesas IPMMU driver needs also to be extended with IOMMU_DOMAIN_DMA domain type support. It can also be prepared for IOMMU_OF_DECLARE and of_xlate callback-based initialization to let core to automatically setup of IOMMU-based DMA mapping implementation. Patch 2 moves existing code from arch/arm64 to drivers/iommu and introduces some minor changes in function names - mainly adding arch_ prefix to some dma-mapping internal functions, which stay in arch/arm64/ (functions of similar names are present in arch/arm). Patch 3 adapts ARM architecture for the common code. I would like to get your comments on the proposed approach. There is still some work that need to be done to convert remaining users of the old API and updating IOMMU drivers to the new API requirements. This change need to be tested on the all affected ARM sub-architectures. Right now patches were tested on only Exynos based boards: ARM 32bit: Exynos4412 and Exynos5422 boards and ARM 64 bit Exnyos 5433 (with some out-of-tree DTS). To ease testing I've prepared a branch with all the patches needed (there are all needed patches for Exynos subarch, which have been posted as separate patchsets): https://git.linaro.org/people/marek.szyprowski/linux-srpol.git v4.5-dma-iommu-unification Patches are based on Linux v4.5-rc4 vanilla tree. Best regards Marek Szyprowski Samsung R&D Institute Poland Patch summary: Marek Szyprowski (3): drm/exynos: rewrite IOMMU support code iommu: dma-iommu: move IOMMU/DMA-mapping code from ARM64 arch to drivers iommu: dma-iommu: use common implementation also on ARM architecture arch/arm/Kconfig | 22 +- arch/arm/include/asm/device.h | 9 - arch/arm/include/asm/dma-iommu.h | 37 - arch/arm/include/asm/dma-mapping.h | 59 +- arch/arm/mm/dma-mapping.c | 1158 +---------------------------- arch/arm64/include/asm/dma-mapping.h | 39 +- arch/arm64/mm/dma-mapping.c | 491 +----------- drivers/gpu/drm/exynos/Kconfig | 2 +- drivers/gpu/drm/exynos/exynos_drm_drv.c | 7 +- drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 +- drivers/gpu/drm/exynos/exynos_drm_iommu.c | 91 ++- drivers/gpu/drm/exynos/exynos_drm_iommu.h | 2 +- drivers/gpu/drm/rockchip/Kconfig | 1 + drivers/iommu/Kconfig | 1 + drivers/iommu/Makefile | 2 +- drivers/iommu/dma-iommu-ops.c | 471 ++++++++++++ drivers/media/platform/Kconfig | 1 + include/linux/dma-iommu.h | 14 + 18 files changed, 679 insertions(+), 1730 deletions(-) delete mode 100644 arch/arm/include/asm/dma-iommu.h create mode 100644 drivers/iommu/dma-iommu-ops.c -- 1.9.2

9 years, 2 months

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