CoreSight September 2018

coresight@lists.linaro.org
  • 25 participants
  • 25 discussions

[PATCH 1/1] coresight: etm4x: Configure EL2 exception level when kernel is running in HYP
by Tomasz Nowicki
5 years, 10 months

[PATCH v2] perf: Support for Arm A32/T32 instruction sets in CoreSight trace
by Robert Walker
5 years, 10 months

Enabling Coresight in atomic context.
by Mike Bazov
5 years, 10 months

Coresight with Perf need ETR ?
by Christophe ROULLIER
5 years, 10 months

Failed for ETM decoding with db410c snapshot mode
by leo.yan@linaro.org
5 years, 10 months
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