Hi Mike,
Thanks for this valuable information,
Our RTL simulations are working with CAD tool on linux based server.
We see we have /usr/bin/perf tool installed there
Can we provide some output log file from RTL simulations say, JTAG/APB transactions from ETF/ETB, to perf to analyze it? Or is following correct Using perf can be used to provide trace of server processor and not our SOC design? Meaning linux should run on CPU for which trace is being captured. Please confirm?
Regards, Abhijit Dongre Sr. Engineer
T: (91) 20 41462660 M: (91) 9561065364 E: abhijit.dongre@open-silicon.com
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-----Original Message----- From: Mike Leach [mailto:mike.leach@linaro.org] Sent: Tuesday, May 16, 2017 2:51 PM To: Abhijit Dongre Cc: coresight@lists.linaro.org Subject: Re: Coresight ETM/STM trace
Hi,
OpenCSD can be use to decode trace from any source - subject to the current list of implemented features (i.e. no data trace etc. - see the README).
However OpenCSD provides only a decode library - it does not have facilities to program up CoreSight devices for trace (though the CoreSight Access Library [ https://github.com/ARM-software/CSAL ] may help with this), nor will it provide disassembly of trace or any other analysis - external programs must provide this.
For example in Linux, we have adapted 'perf' to use CoreSight, using the OpenCSD library to analyse the trace. In a bare metal environment you describe then you will have to provide your own CoreSight programming and trace analysis software.
Regards
Mike
On 16 May 2017 at 08:10, Abhijit Dongre Abhijit.Dongre@open-silicon.com wrote:
Hi,
We are running Coresight testcases in RTL simulation, and intend to decode the trace stored in ETF and Memory(through ETR).
Came across OpenCSD library,
Can this library be used in decoding of trace in RTL simulation? Note that in RTL simulations we don’t use Linux and heavy software, we use bare minimum startup code for booting.
If decoding is possible, please let us know procedure and pricing if any.
Regards,
Abhijit
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-- Mike Leach Principal Engineer, ARM Ltd. Blackburn Design Centre. UK