Hello Christophe,

On Mon, 3 Sep 2018 at 07:06, Christophe ROULLIER christophe.roullier@st.com wrote:

Hi,

I have followed procedure to integrate libopenCSD in perf tool in target ARM. (based on kernel 4.18rc1)

I’ve seen in documentation that perf record need parameters cs_etm/@xxxxx.etr/u …

I would like to know if ETR device is mandatory to use coresight trace with perf ?

Not at all. We use it because it is the most convenient one with the biggest buffer - ETB and ETF also support the perf API. On the flip side you can't use STM from perf because we never had a usecase for it and as such never implemented the API. Technically speaking though nothing would prevent that from happening though.

In my architecture, I’ve :

1 .funnel

1 .tpiu

2 .etm

1 .etf

1 .stm

1 replicator but no ETR L

If possible without ETR, do you have examples of perf record cmd usage ?

I’ve configured my coresight register as followed :

echo 1 > /sys/bus/coresight/devices/xxxx.stm/hwevent_select

echo 2 > /sys/bus/coresight/devices/xxxx.stm/hwevent_extmux_select

// Need to track IRQ up of UART

echo 0x200000 > /sys/bus/coresight/devices/xxxx.stm/hwevent_enable

echo 1 > /sys/bus/coresight/devices/yyyy.etf/enable_sink

echo 1 > /sys/bus/coresight/devices/xxxx.stm/enable_source

Can you give us the topology of your system? A quick diagram or even the coresight DT section for the board would do just fine.

As per my previous email, from sysFS the STM module works from the generic (ARM/Intel) STM interface. This is taken from an example sent to me by Leo for ftrace. In your case you would probably want the console option available in the STM kconfig menu.

# echo 802000.stm > /sys/class/stm_source/ftrace/stm_source_link # echo function > /sys/kernel/debug/tracing/current_tracer # echo schedule > /sys/kernel/debug/tracing/set_ftrace_filter

Au plaisir, Mathieu

Which perf record cmd I must enter to catch my STM event ?

Thanks for your help.

Christophe.