Juno r1/r2 boards have different CoreSight infrastructure outside the clusters. This patchset moves the none cluster CoreSight to separate .dtsi files to allow for these differences.
v2 moves the Addition of the STM component into a separate patch.
Mike Leach (2): arm64: dts: juno: Fix CoreSight support for Juno r1/r2 variants arm64: dts: juno: Adds missing CoreSight STM component.
arch/arm64/boot/dts/arm/juno-base.dtsi | 135 --------------- arch/arm64/boot/dts/arm/juno-cs-r0.dtsi | 166 +++++++++++++++++++ arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 266 ++++++++++++++++++++++++++++++ arch/arm64/boot/dts/arm/juno-r1.dts | 1 + arch/arm64/boot/dts/arm/juno-r2.dts | 1 + arch/arm64/boot/dts/arm/juno.dts | 1 + 6 files changed, 435 insertions(+), 135 deletions(-) create mode 100644 arch/arm64/boot/dts/arm/juno-cs-r0.dtsi create mode 100644 arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
The CoreSight support added for Juno is valid for only Juno r0. The Juno r1 and r2 variants have additional components and alternative connection routes between trace source and sinks.
The CoreSight infrastructure external to the Cortex-Axx clusters, has been split into separate .dtsi include files for r0 and r1/r2 to correctly represent these variations.
Signed-off-by: Mike Leach mike.leach@linaro.org --- arch/arm64/boot/dts/arm/juno-base.dtsi | 135 ---------------- arch/arm64/boot/dts/arm/juno-cs-r0.dtsi | 150 ++++++++++++++++++ arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 250 ++++++++++++++++++++++++++++++ arch/arm64/boot/dts/arm/juno-r1.dts | 1 + arch/arm64/boot/dts/arm/juno-r2.dts | 1 + arch/arm64/boot/dts/arm/juno.dts | 1 + 6 files changed, 403 insertions(+), 135 deletions(-) create mode 100644 arch/arm64/boot/dts/arm/juno-cs-r0.dtsi create mode 100644 arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index 7d83224..7c89000 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -83,104 +83,6 @@ * The actual size is just 4K though 64K is reserved. Access to the * unmapped reserved region results in a DECERR response. */ - etf@20010000 { - compatible = "arm,coresight-tmc", "arm,primecell"; - reg = <0 0x20010000 0 0x1000>; - - clocks = <&soc_smc50mhz>; - clock-names = "apb_pclk"; - power-domains = <&scpi_devpd 0>; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* input port */ - port@0 { - reg = <0>; - etf_in_port: endpoint { - slave-mode; - remote-endpoint = <&main_funnel_out_port>; - }; - }; - - /* output port */ - port@1 { - reg = <0>; - etf_out_port: endpoint { - remote-endpoint = <&replicator_in_port0>; - }; - }; - }; - }; - - tpiu@20030000 { - compatible = "arm,coresight-tpiu", "arm,primecell"; - reg = <0 0x20030000 0 0x1000>; - - clocks = <&soc_smc50mhz>; - clock-names = "apb_pclk"; - power-domains = <&scpi_devpd 0>; - port { - tpiu_in_port: endpoint { - slave-mode; - remote-endpoint = <&replicator_out_port0>; - }; - }; - }; - - main-funnel@20040000 { - compatible = "arm,coresight-funnel", "arm,primecell"; - reg = <0 0x20040000 0 0x1000>; - - clocks = <&soc_smc50mhz>; - clock-names = "apb_pclk"; - power-domains = <&scpi_devpd 0>; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - main_funnel_out_port: endpoint { - remote-endpoint = <&etf_in_port>; - }; - }; - - port@1 { - reg = <0>; - main_funnel_in_port0: endpoint { - slave-mode; - remote-endpoint = <&cluster0_funnel_out_port>; - }; - }; - - port@2 { - reg = <1>; - main_funnel_in_port1: endpoint { - slave-mode; - remote-endpoint = <&cluster1_funnel_out_port>; - }; - }; - - }; - }; - - etr@20070000 { - compatible = "arm,coresight-tmc", "arm,primecell"; - reg = <0 0x20070000 0 0x1000>; - iommus = <&smmu_etr 0>; - - clocks = <&soc_smc50mhz>; - clock-names = "apb_pclk"; - power-domains = <&scpi_devpd 0>; - port { - etr_in_port: endpoint { - slave-mode; - remote-endpoint = <&replicator_out_port1>; - }; - }; - }; - etm0: etm@22040000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x22040000 0 0x1000>; @@ -351,43 +253,6 @@ }; };
- coresight-replicator { - /* - * Non-configurable replicators don't show up on the - * AMBA bus. As such no need to add "arm,primecell". - */ - compatible = "arm,coresight-replicator"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* replicator output ports */ - port@0 { - reg = <0>; - replicator_out_port0: endpoint { - remote-endpoint = <&tpiu_in_port>; - }; - }; - - port@1 { - reg = <1>; - replicator_out_port1: endpoint { - remote-endpoint = <&etr_in_port>; - }; - }; - - /* replicator input port */ - port@2 { - reg = <0>; - replicator_in_port0: endpoint { - slave-mode; - remote-endpoint = <&etf_out_port>; - }; - }; - }; - }; - sram: sram@2e000000 { compatible = "arm,juno-sram-ns", "mmio-sram"; reg = <0x0 0x2e000000 0x0 0x8000>; diff --git a/arch/arm64/boot/dts/arm/juno-cs-r0.dtsi b/arch/arm64/boot/dts/arm/juno-cs-r0.dtsi new file mode 100644 index 0000000..24419ed --- /dev/null +++ b/arch/arm64/boot/dts/arm/juno-cs-r0.dtsi @@ -0,0 +1,150 @@ + /* + * Juno trace infrastructure. + * Trace links and sinks and interconnections + * from clusters. + * Connections for Juno r0. + */ + etf@20010000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20010000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* input port */ + port@0 { + reg = <0>; + etf_in_port: endpoint { + slave-mode; + remote-endpoint = <&main_funnel_out_port>; + }; + }; + + /* output port */ + port@1 { + reg = <0>; + etf_out_port: endpoint { + remote-endpoint = <&replicator_in_port0>; + }; + }; + }; + }; + + tpiu@20030000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0 0x20030000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + port { + tpiu_in_port: endpoint { + slave-mode; + remote-endpoint = <&replicator_out_port0>; + }; + }; + }; + + main-funnel@20040000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x20040000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* output port */ + port@0 { + reg = <0>; + main_funnel_out_port: endpoint { + remote-endpoint = <&etf_in_port>; + }; + }; + + /* input ports */ + port@1 { + reg = <0>; + main_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&cluster0_funnel_out_port>; + }; + }; + + port@2 { + reg = <1>; + main_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&cluster1_funnel_out_port>; + }; + }; + + port@3 { + reg = <2>; + main_funnel_in_port2: endpoint { + slave-mode; + remote-endpoint = <&stm_out_port>; + }; + }; + + + }; + }; + + etr@20070000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20070000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + port { + etr_in_port: endpoint { + slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + coresight-replicator { + /* + * Non-configurable replicators don't show up on the + * AMBA bus. As such no need to add "arm,primecell". + */ + compatible = "arm,coresight-replicator"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port@0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + port@1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&etr_in_port>; + }; + }; + + /* replicator input port */ + port@2 { + reg = <0>; + replicator_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etf_out_port>; + }; + }; + }; + }; diff --git a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi new file mode 100644 index 0000000..caaf58e --- /dev/null +++ b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi @@ -0,0 +1,250 @@ + /* + * Juno trace infrastructure. + * Trace links and sinks and interconnections + * from clusters. + * Connections for Juno r1 and r2. + */ + etf0@20010000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20010000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* input port */ + port@0 { + reg = <0>; + etf0_in_port: endpoint { + slave-mode; + remote-endpoint = <&main_funnel_out_port>; + }; + }; + + /* output port */ + port@1 { + reg = <0>; + etf0_out_port: endpoint { + remote-endpoint = <&csys2_funnel_in_port0>; + }; + }; + }; + }; + + etf1@20140000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20140000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* input port */ + port@0 { + reg = <0>; + etf1_in_port: endpoint { + slave-mode; + remote-endpoint = + <&csys1_funnel_out_port>; + }; + }; + + /* output port */ + port@1 { + reg = <0>; + etf1_out_port: endpoint { + remote-endpoint = + <&csys2_funnel_in_port1>; + }; + }; + }; + }; + + csys1_funnel@20130000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x20130000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* input port */ + port@0 { + reg = <0>; + csys1_funnel_out_port: endpoint { + remote-endpoint = + <&etf1_in_port>; + }; + }; + + /* output port */ + port@1 { + reg = <0>; + csys1_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = + <&stm_out_port>; + }; + }; + + }; + }; + + csys2_funnel@20150000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x20150000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* output port */ + port@0 { + reg = <0>; + csys2_funnel_out_port: endpoint { + remote-endpoint = + <&replicator_in_port0>; + }; + }; + + /* input ports */ + port@1 { + reg = <0>; + csys2_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&etf0_out_port>; + }; + }; + + port@2 { + reg = <1>; + csys2_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&etf1_out_port>; + }; + }; + + }; + }; + + tpiu@20030000 { + compatible = "arm,coresight-tpiu", "arm,primecell"; + reg = <0 0x20030000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + port { + tpiu_in_port: endpoint { + slave-mode; + remote-endpoint = <&replicator_out_port0>; + }; + }; + }; + + /* + * This is labelled cssys0 funnel in the Juno r1/r2 TRM + * Retain the name from r0 to maintain compatibility with common + * juno-base.dtsi + */ + main-funnel@20040000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x20040000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* output port */ + port@0 { + reg = <0>; + main_funnel_out_port: endpoint { + remote-endpoint = <&etf0_in_port>; + }; + }; + + /* input ports */ + port@1 { + reg = <0>; + main_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&cluster0_funnel_out_port>; + }; + }; + + port@2 { + reg = <1>; + main_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&cluster1_funnel_out_port>; + }; + }; + }; + }; + + etr@20070000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20070000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + port { + etr_in_port: endpoint { + slave-mode; + remote-endpoint = <&replicator_out_port1>; + }; + }; + }; + + coresight-replicator { + /* + * Non-configurable replicators don't show up on the + * AMBA bus. As such no need to add "arm,primecell". + */ + compatible = "arm,coresight-replicator"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* replicator output ports */ + port@0 { + reg = <0>; + replicator_out_port0: endpoint { + remote-endpoint = <&tpiu_in_port>; + }; + }; + + port@1 { + reg = <1>; + replicator_out_port1: endpoint { + remote-endpoint = <&etr_in_port>; + }; + }; + + /* replicator input port */ + port@2 { + reg = <0>; + replicator_in_port0: endpoint { + slave-mode; + remote-endpoint = <&csys2_funnel_out_port>; + }; + }; + }; + }; diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts index eec37fe..8813395 100644 --- a/arch/arm64/boot/dts/arm/juno-r1.dts +++ b/arch/arm64/boot/dts/arm/juno-r1.dts @@ -178,6 +178,7 @@ };
#include "juno-base.dtsi" + #include "juno-cs-r1r2.dtsi" };
&memtimer { diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts index 28f40ec..fca3a17 100644 --- a/arch/arm64/boot/dts/arm/juno-r2.dts +++ b/arch/arm64/boot/dts/arm/juno-r2.dts @@ -178,6 +178,7 @@ };
#include "juno-base.dtsi" + #include "juno-cs-r1r2.dtsi" };
&memtimer { diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index ac5ceb7..c90c37b 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts @@ -178,6 +178,7 @@ };
#include "juno-base.dtsi" + #include "juno-cs-r0.dtsi" };
&etm0 {
Add missing CoreSight STM component definition to Juno CoreSight infrastructure juno-cs-rX.dtsi files.
Component connected to different funnels depending on Juno platform variant.
Signed-off-by: Mike Leach mike.leach@linaro.org --- arch/arm64/boot/dts/arm/juno-cs-r0.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 16 ++++++++++++++++ 2 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/juno-cs-r0.dtsi b/arch/arm64/boot/dts/arm/juno-cs-r0.dtsi index 24419ed..4e01b0e 100644 --- a/arch/arm64/boot/dts/arm/juno-cs-r0.dtsi +++ b/arch/arm64/boot/dts/arm/juno-cs-r0.dtsi @@ -148,3 +148,19 @@ }; }; }; + + stm@20100000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x20100000 0 0x1000>, + <0 0x28000000 0 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + port { + stm_out_port: endpoint { + remote-endpoint = <&main_funnel_in_port2>; + }; + }; + }; diff --git a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi index caaf58e..6fe8b62 100644 --- a/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi +++ b/arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi @@ -248,3 +248,19 @@ }; }; }; + + stm@20100000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x20100000 0 0x1000>, + <0 0x28000000 0 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + port { + stm_out_port: endpoint { + remote-endpoint = <&csys1_funnel_in_port0>; + }; + }; + };
On 11/01/17 20:44, Mike Leach wrote:
Add missing CoreSight STM component definition to Juno CoreSight infrastructure juno-cs-rX.dtsi files.
Component connected to different funnels depending on Juno platform variant.
Signed-off-by: Mike Leach mike.leach@linaro.org
arch/arm64/boot/dts/arm/juno-cs-r0.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 16 ++++++++++++++++ 2 files changed, 32 insertions(+)
Can we avoid duplication with something like below ? I don't have strong opinion but I just saw the opportunity. I can squash it in if you agree(no need to repost).
Regards, Sudeep
-->8
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index 7c89000f954d..15fcd09d9d84 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -83,6 +83,21 @@ * The actual size is just 4K though 64K is reserved. Access to the * unmapped reserved region results in a DECERR response. */ + stm@20100000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x20100000 0 0x1000>, + <0 0x28000000 0 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + power-domains = <&scpi_devpd 0>; + port { + stm_out_port: endpoint { + }; + }; + }; + etm0: etm@22040000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x22040000 0 0x1000>; diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts index 881339536e90..1c16a96ff677 100644 --- a/arch/arm64/boot/dts/arm/juno-r1.dts +++ b/arch/arm64/boot/dts/arm/juno-r1.dts @@ -228,3 +228,7 @@ &gpu1_thermal_zone { status = "okay"; }; + +&stm_out_port { + remote-endpoint = <&csys1_funnel_in_port0>; +}; diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts index fca3a1705114..69890cc1edae 100644 --- a/arch/arm64/boot/dts/arm/juno-r2.dts +++ b/arch/arm64/boot/dts/arm/juno-r2.dts @@ -228,3 +228,7 @@ &gpu1_thermal_zone { status = "okay"; }; + +&stm_out_port { + remote-endpoint = <&csys1_funnel_in_port0>; +}; diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index c90c37b66db5..ad270e090ba4 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts @@ -204,3 +204,7 @@ &etm5 { cpu = <&A53_3>; }; + +&stm_out_port { + remote-endpoint = <&main_funnel_in_port2>; +};
Hi Sudeep,
I'm fine with that - less duplication the better.
I've not played with .dts files much to I hadn't realised that type of construction was possible.
Regards
Mike
---------------------------------------------------------------- Mike Leach +44 (0)1254 893911 (Direct) Principal Engineer +44 (0)1254 893900 (Main) Arm Blackburn Design Centre +44 (0)1254 893901 (Fax) Belthorn House Walker Rd mailto:mike.leach@arm.com Guide Blackburn BB1 2QE ----------------------------------------------------------------
-----Original Message----- From: CoreSight [mailto:coresight-bounces@lists.linaro.org] On Behalf Of Sudeep Holla Sent: 12 January 2017 11:15 To: Mike Leach; Liviu Dudau; Lorenzo Pieralisi Cc: coresight@lists.linaro.org; Suzuki Poulose; linux-arm- kernel@lists.infradead.org; Sudeep Holla Subject: Re: [PATCH v2 2/2] arm64: dts: juno: Adds missing CoreSight STM component.
On 11/01/17 20:44, Mike Leach wrote:
Add missing CoreSight STM component definition to Juno CoreSight infrastructure juno-cs-rX.dtsi files.
Component connected to different funnels depending on Juno platform
variant.
Signed-off-by: Mike Leach mike.leach@linaro.org
arch/arm64/boot/dts/arm/juno-cs-r0.dtsi | 16 ++++++++++++++++ arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 16 ++++++++++++++++ 2 files changed, 32 insertions(+)
Can we avoid duplication with something like below ? I don't have strong opinion but I just saw the opportunity. I can squash it in if you agree(no need to repost).
Regards, Sudeep
-->8
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index 7c89000f954d..15fcd09d9d84 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -83,6 +83,21 @@
- The actual size is just 4K though 64K is reserved. Access to the
- unmapped reserved region results in a DECERR response.
*/ +stm@20100000 { +compatible = "arm,coresight-stm", "arm,primecell"; +reg = <0 0x20100000 0 0x1000>,
<0 0x28000000 0 0x180000>;+reg-names = "stm-base", "stm-stimulus-base";
+clocks = <&soc_smc50mhz>; +clock-names = "apb_pclk"; +power-domains = <&scpi_devpd 0>; +port { +stm_out_port: endpoint { +}; +}; +};
etm0: etm@22040000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0 0x22040000 0 0x1000>; diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts index 881339536e90..1c16a96ff677 100644 --- a/arch/arm64/boot/dts/arm/juno-r1.dts +++ b/arch/arm64/boot/dts/arm/juno-r1.dts @@ -228,3 +228,7 @@ &gpu1_thermal_zone { status = "okay"; };
+&stm_out_port { +remote-endpoint = <&csys1_funnel_in_port0>; +}; diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts index fca3a1705114..69890cc1edae 100644 --- a/arch/arm64/boot/dts/arm/juno-r2.dts +++ b/arch/arm64/boot/dts/arm/juno-r2.dts @@ -228,3 +228,7 @@ &gpu1_thermal_zone { status = "okay"; };
+&stm_out_port { +remote-endpoint = <&csys1_funnel_in_port0>; +}; diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index c90c37b66db5..ad270e090ba4 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts @@ -204,3 +204,7 @@ &etm5 { cpu = <&A53_3>; };
+&stm_out_port { +remote-endpoint = <&main_funnel_in_port2>; +};
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On 12/01/17 11:24, Mike Leach wrote:
Hi Sudeep,
I'm fine with that - less duplication the better.
I've not played with .dts files much to I hadn't realised that type of construction was possible.
OK I spent some time and I think we can do the same for other coresight components too. I will modify post the series but I need your help to validate the change running core-sight tests.
-
Mike Leach -
Mike Leach -
Sudeep Holla