Until recently the dma api in the kernel was doing it too. Apparently it's related to speculative prefetching, so as far as my understand goes, not an issue on Cortex-A8 where the feature isn't present. However, there have been a couple of cases of data corruption due to it on A9. It's also possible that the architecture licensee's implementations -- like the qualcomm snapdragons -- don't actually have a bug when this occurs. I'm trying to collect the info on exactly which exhibit a problem. Be aware though, it's a race condition, just because you never saw it doesn't mean you couldn't have.
Rebecca
On Tue, Apr 19, 2011 at 1:53 PM, Thomas Martitz < thomas.martitz@student.htw-berlin.de> wrote:
Am 19.04.2011 22:06, schrieb Rebecca Schultz Zavin:
ARM has stated that if you have the same physical memory mapped with two different sets of attribute bits you get undefined behavior.
I didn't know this is undefined behavior. But we at the Rockbox project do this on several targets without problems (cached and uncached, for e.g. simplified DMA-related code).
Best regards.
Linaro-mm-sig mailing list Linaro-mm-sig@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-mm-sig