CoreSight

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2768 discussions

[PATCH RESEND v5 0/3] coresight-tnoc: Add support for Interconnect TNOC

by Yuanfang Zhang

This patch series adds support for the Qualcomm CoreSight Interconnect TNOC (Trace Network On Chip) block, which acts as a CoreSight graph link forwarding trace data from subsystems to the Aggregator TNOC. Unlike the Aggregator TNOC, this block does not support aggregation or ATID assignment. Signed-off-by: Yuanfang Zhang <yuanfang.zhang(a)oss.qualcomm.com> --- Changes in v5: - Add the missing review-by tag for patch 3. - Link to v4: https://lore.kernel.org/r/20250831-itnoc-v4-0-f0fb0ef822a5@oss.qualcomm.com Changes in v4: - Fix unintended blank line removals in trace_noc_enable_hw. - Link to v3: https://lore.kernel.org/r/20250828-itnoc-v3-0-f1b55dea7a27@oss.qualcomm.com Changes in v3: - Add detail for changes in V2. - Remove '#address-cells' and '#size-cells' properties from in-ports field. - Fix comment indentation for packet description. - Link to v2: https://lore.kernel.org/r/20250819-itnoc-v2-0-2d0e6be44e2f@oss.qualcomm.com Changes in v2: - Removed the trailing '|' after the description in qcom,coresight-itnoc.yaml. - Dropped the 'select' section from the YAML file. - Updated node name to use a more generic naming convention. - Removed the 'items' property from the compatible field. - Deleted the description for the reg property. - Dropped clock-names and adjusted the order of clock-names and clocks. - Moved additionalProperties to follow the $ref of out-ports. - Change "atid" type from u32 to int, set it as "-EOPNOTSUPP" for non-AMBA device. - Link to v1: https://lore.kernel.org/r/20250815-itnoc-v1-0-62c8e4f7ad32@oss.qualcomm.com --- Yuanfang Zhang (3): dt-bindings: arm: qcom: Add Coresight Interconnect TNOC coresight-tnoc: add platform driver to support Interconnect TNOC coresight-tnoc: Add runtime PM support for Interconnect TNOC .../bindings/arm/qcom,coresight-itnoc.yaml | 90 ++++++++++++++ drivers/hwtracing/coresight/coresight-tnoc.c | 136 +++++++++++++++++++-- 2 files changed, 215 insertions(+), 11 deletions(-) --- base-commit: 2b52cf338d39d684a1c6af298e8204902c026aca change-id: 20250815-itnoc-460273d1b80c Best regards, -- Yuanfang Zhang <yuanfang.zhang(a)oss.qualcomm.com>

4 months, 3 weeks

Re: [PATCH] coresight: etm3x: Fix cpulocked warning on cpuhp

by Suzuki K Poulose

On Thu, 08 Jan 2026 16:24:27 +0100, Antonio Borneo wrote: > When changes [1] and [2] have been applied to the driver etm4x, the > same modifications have been also collapsed in [3] and applied in > one shot to the driver etm3x. > While doing this, the driver etm3x has not been aligned to etm4x on > the use of non cpuslocked version of cpuhp callback setup APIs. > > The current code triggers two run-time warnings when the kernel is > compiled with CONFIG_PROVE_LOCKING=y. > > [...] Applied, thanks! [1/1] coresight: etm3x: Fix cpulocked warning on cpuhp https://git.kernel.org/coresight/c/1feb0377b9b8 Best regards, -- Suzuki K Poulose <suzuki.poulose(a)arm.com>

4 months, 3 weeks

[PATCH 0/2] (no cover subject)

by James Clark

--- James Clark (2): perf cs-etm: Fix decoding for sparse CPU maps perf cs-etm: Test sparse CPU maps tools/perf/tests/shell/test_arm_coresight.sh | 54 ++++++++++++++++++++++++++++ tools/perf/util/cs-etm.c | 3 +- 2 files changed, 56 insertions(+), 1 deletion(-) --- base-commit: 571d29baa07e83e637075239f379f91353c24ec9 change-id: 20260115-james-perf-coresight-cpu-map-segfault-e250af5aa778 Best regards, -- James Clark <james.clark(a)linaro.org>

4 months, 3 weeks

[PATCH v4 00/14] perf cs-etm/arm-spe: Remove hard coded config fields

by James Clark

The specific config field that an event format attribute is in is consistently hard coded, even though the API is supposed to be that the driver publishes the config field name. To stop this pattern from being copy pasted and causing problems in the future, replace them all with calls to a new helper that returns the value that a user set. This reveals some issues in evsel__set_config_if_unset(). It doesn't work with sparse bitfields, which are an unused but documented feature. And it also only writes to the attr.config field. To fix it we need to start tracking user changes for all config fields and then use existing helper functions that support sparse bitfields. Some other refactoring was also required and a test was added. --- Changes in v4: - Constify some function args (Ian) - Move some evsel__* functions to evsel.c and make some pmu.c functions public to support this (Ian) - Drop pmu arg where it can be fetched from evsel->pmu (Ian) - Link to v3: https://lore.kernel.org/r/20251212-james-perf-config-bits-v3-0-aa36a4846776… Changes in v3: - Fix uninitialized variable warning on GCC - Fix leak of evlist in test - Confirm no type punning issues with ubsan (Ian) - Link to v2: https://lore.kernel.org/r/20251208-james-perf-config-bits-v2-0-4ac0281993b0… Changes in v2: - Remove macros in get_config_chgs() and some other refactoring. - Support sparse bitfields in evsel__set_config_if_unset(). - Always track user changes instead of only when 'pmu->perf_event_attr_init_default' is set. - Add a test. - Don't bail out in cs-etm.c if any format fields are missing (Leo). - Rename 'guess' to 'synth' (Mike). - Link to v1: https://lore.kernel.org/r/20251201-james-perf-config-bits-v1-0-22ecbbf8007c… --- James Clark (14): perf parse-events: Refactor get_config_terms() to remove macros perf evsel: Refactor evsel__set_config_if_unset() arguments perf evsel: Move evsel__* functions to evsel.c perf evsel: Support sparse fields in evsel__set_config_if_unset() perf parse-events: Track all user changed config bits perf evsel: apply evsel__set_config_if_unset() to all config fields perf evsel: Add a helper to get the value of a config field perf parse-events: Always track user config changes perf tests: Test evsel__set_config_if_unset() and config change tracking perf cs-etm: Make a helper to find the Coresight evsel perf cs-etm: Don't use hard coded config bits when setting up ETMCR perf cs-etm: Don't use hard coded config bits when setting up TRCCONFIGR perf cs-etm: Don't hard code config attribute when configuring the event perf arm-spe: Don't hard code config attribute tools/perf/arch/arm/util/cs-etm.c | 201 +++++++++++++++------------- tools/perf/arch/arm64/util/arm-spe.c | 17 +-- tools/perf/arch/x86/util/intel-pt.c | 3 +- tools/perf/tests/pmu.c | 91 +++++++++++++ tools/perf/util/evsel.c | 112 +++++++++++++++- tools/perf/util/evsel.h | 6 +- tools/perf/util/evsel_config.h | 7 +- tools/perf/util/parse-events.c | 248 ++++++++++++++++++++--------------- tools/perf/util/pmu.c | 95 ++++---------- tools/perf/util/pmu.h | 34 ++++- 10 files changed, 529 insertions(+), 285 deletions(-) --- base-commit: cbd41c6d4c26c161a2b0e70ad411d3885ff13507 change-id: 20251112-james-perf-config-bits-bee7106f0f00 Best regards, -- James Clark <james.clark(a)linaro.org>

4 months, 4 weeks

[PATCH v5 00/14] perf cs-etm/arm-spe: Remove hard coded config fields

by James Clark

The specific config field that an event format attribute is in is consistently hard coded, even though the API is supposed to be that the driver publishes the config field name. To stop this pattern from being copy pasted and causing problems in the future, replace them all with calls to a new helper that returns the value that a user set. This reveals some issues in evsel__set_config_if_unset(). It doesn't work with sparse bitfields, which are an unused but documented feature. And it also only writes to the attr.config field. To fix it we need to start tracking user changes for all config fields and then use existing helper functions that support sparse bitfields. Some other refactoring was also required and a test was added. --- Changes in v5: - Use bitfields wherever possible instead of converting to a u64. This is more consistent with the existing format helper functions and fixes a build error on i386 where unsigned long is 32 bits. - Link to v4: https://lore.kernel.org/r/20251222-james-perf-config-bits-v4-0-0608438186fc… Changes in v4: - Constify some function args (Ian) - Move some evsel__* functions to evsel.c and make some pmu.c functions public to support this (Ian) - Drop pmu arg where it can be fetched from evsel->pmu (Ian) - Link to v3: https://lore.kernel.org/r/20251212-james-perf-config-bits-v3-0-aa36a4846776… Changes in v3: - Fix uninitialized variable warning on GCC - Fix leak of evlist in test - Confirm no type punning issues with ubsan (Ian) - Link to v2: https://lore.kernel.org/r/20251208-james-perf-config-bits-v2-0-4ac0281993b0… Changes in v2: - Remove macros in get_config_chgs() and some other refactoring. - Support sparse bitfields in evsel__set_config_if_unset(). - Always track user changes instead of only when 'pmu->perf_event_attr_init_default' is set. - Add a test. - Don't bail out in cs-etm.c if any format fields are missing (Leo). - Rename 'guess' to 'synth' (Mike). - Link to v1: https://lore.kernel.org/r/20251201-james-perf-config-bits-v1-0-22ecbbf8007c… --- James Clark (14): perf parse-events: Refactor get_config_terms() to remove macros perf evsel: Refactor evsel__set_config_if_unset() arguments perf evsel: Move evsel__* functions to evsel.c perf evsel: Support sparse fields in evsel__set_config_if_unset() perf parse-events: Track all user changed config bits perf evsel: apply evsel__set_config_if_unset() to all config fields perf evsel: Add a helper to get the value of a config field perf parse-events: Always track user config changes perf tests: Test evsel__set_config_if_unset() and config change tracking perf cs-etm: Make a helper to find the Coresight evsel perf cs-etm: Don't use hard coded config bits when setting up ETMCR perf cs-etm: Don't use hard coded config bits when setting up TRCCONFIGR perf cs-etm: Don't hard code config attribute when configuring the event perf arm-spe: Don't hard code config attribute tools/perf/arch/arm/util/cs-etm.c | 201 +++++++++++++++------------- tools/perf/arch/arm64/util/arm-spe.c | 17 +-- tools/perf/arch/x86/util/intel-pt.c | 3 +- tools/perf/tests/pmu.c | 91 +++++++++++++ tools/perf/util/evsel.c | 120 ++++++++++++++++- tools/perf/util/evsel.h | 6 +- tools/perf/util/evsel_config.h | 7 +- tools/perf/util/parse-events.c | 248 ++++++++++++++++++++--------------- tools/perf/util/pmu.c | 95 ++++---------- tools/perf/util/pmu.h | 34 ++++- 10 files changed, 537 insertions(+), 285 deletions(-) --- base-commit: 54a23bff770961e024e2c61cd1f46888190c3e79 change-id: 20251112-james-perf-config-bits-bee7106f0f00 Best regards, -- James Clark <james.clark(a)linaro.org>

4 months, 4 weeks

Re: [PATCH v4 00/14] perf cs-etm/arm-spe: Remove hard coded config fields

by Arnaldo Carvalho de Melo

On Tue, Jan 13, 2026 at 12:58:16PM -0800, Ian Rogers wrote: > > perf arm-spe: Don't hard code config attribute > > Reviewed-by: Ian Rogers <irogers(a)google.com> > > Most patches already have my tag, sending this for the remainder. Thanks, will add to the ones missing it. - Arnaldo

5 months

Re: [PATCH v3 00/12] perf cs-etm/arm-spe: Remove hard coded config fields

by Arnaldo Carvalho de Melo

On Tue, Dec 16, 2025 at 01:00:32PM -0800, Ian Rogers wrote: > On Fri, Dec 12, 2025 at 7:32 AM James Clark <james.clark(a)linaro.org> wrote: > > > > The specific config field that an event format attribute is in is > > consistently hard coded, even though the API is supposed to be that the > > driver publishes the config field name. To stop this pattern from being > > copy pasted and causing problems in the future, replace them all with > > calls to a new helper that returns the value that a user set. > > > > This reveals some issues in evsel__set_config_if_unset(). It doesn't > > work with sparse bitfields, which are an unused but documented feature. > > And it also only writes to the attr.config field. To fix it we need to > > start tracking user changes for all config fields and then use existing > > helper functions that support sparse bitfields. Some other refactoring > > was also required and a test was added. > > > > Signed-off-by: James Clark <james.clark(a)linaro.org> > > Outside of some nits, for the series: > Reviewed-by: Ian Rogers <irogers(a)google.com> Are you ok with v4? - Arnaldo

5 months

Re: [PATCH v10 2/7] qcom-tgu: Add TGU driver

by Suzuki K Poulose

On 09/01/2026 02:11, Songwei Chai wrote: > Add driver to support device TGU (Trigger Generation Unit). > TGU is a Data Engine which can be utilized to sense a plurality of > signals and create a trigger into the CTI or generate interrupts to > processors. Add probe/enable/disable functions for tgu. > > Signed-off-by: Songwei Chai <songwei.chai(a)oss.qualcomm.com> > --- > .../ABI/testing/sysfs-bus-amba-devices-tgu | 9 + > drivers/Makefile | 1 + > drivers/hwtracing/Kconfig | 2 + > drivers/hwtracing/qcom/Kconfig | 18 ++ > drivers/hwtracing/qcom/Makefile | 3 + > drivers/hwtracing/qcom/tgu.c | 176 ++++++++++++++++++ > drivers/hwtracing/qcom/tgu.h | 51 +++++ > 7 files changed, 260 insertions(+) > create mode 100644 Documentation/ABI/testing/sysfs-bus-amba-devices-tgu > create mode 100644 drivers/hwtracing/qcom/Kconfig > create mode 100644 drivers/hwtracing/qcom/Makefile > create mode 100644 drivers/hwtracing/qcom/tgu.c > create mode 100644 drivers/hwtracing/qcom/tgu.h > > diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu > new file mode 100644 > index 000000000000..56ec3f5ab5d6 > --- /dev/null > +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu > @@ -0,0 +1,9 @@ > +What: /sys/bus/amba/devices/<tgu-name>/enable_tgu > +Date: January 2026 > +KernelVersion 6.19 It's a bit too late for v6.19, this should rather be 6.20/7.0 Suzuki > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Songwei Chai <songwei.chai(a)oss.qualcomm.com> > +Description: > + (RW) Set/Get the enable/disable status of TGU > + Accepts only one of the 2 values - 0 or 1. > + 0 : disable TGU. > + 1 : enable TGU. > diff --git a/drivers/Makefile b/drivers/Makefile > index ccc05f1eae3e..9608a3debb1f 100644 > --- a/drivers/Makefile > +++ b/drivers/Makefile > @@ -177,6 +177,7 @@ obj-$(CONFIG_RAS) += ras/ > obj-$(CONFIG_USB4) += thunderbolt/ > obj-$(CONFIG_CORESIGHT) += hwtracing/coresight/ > obj-y += hwtracing/intel_th/ > +obj-y += hwtracing/qcom/ > obj-$(CONFIG_STM) += hwtracing/stm/ > obj-$(CONFIG_HISI_PTT) += hwtracing/ptt/ > obj-y += android/ > diff --git a/drivers/hwtracing/Kconfig b/drivers/hwtracing/Kconfig > index 911ee977103c..8a640218eed8 100644 > --- a/drivers/hwtracing/Kconfig > +++ b/drivers/hwtracing/Kconfig > @@ -7,4 +7,6 @@ source "drivers/hwtracing/intel_th/Kconfig" > > source "drivers/hwtracing/ptt/Kconfig" > > +source "drivers/hwtracing/qcom/Kconfig" > + > endmenu > diff --git a/drivers/hwtracing/qcom/Kconfig b/drivers/hwtracing/qcom/Kconfig > new file mode 100644 > index 000000000000..d6f6d4b0f28e > --- /dev/null > +++ b/drivers/hwtracing/qcom/Kconfig > @@ -0,0 +1,18 @@ > +# SPDX-License-Identifier: GPL-2.0-only > +# > +# QCOM specific hwtracing drivers > +# > +menu "Qualcomm specific hwtracing drivers" > + > +config QCOM_TGU > + tristate "QCOM Trigger Generation Unit driver" > + help > + This driver provides support for Trigger Generation Unit that is > + used to detect patterns or sequences on a given set of signals. > + TGU is used to monitor a particular bus within a given region to > + detect illegal transaction sequences or slave responses. It is also > + used to monitor a data stream to detect protocol violations and to > + provide a trigger point for centering data around a specific event > + within the trace data buffer. > + > +endmenu > diff --git a/drivers/hwtracing/qcom/Makefile b/drivers/hwtracing/qcom/Makefile > new file mode 100644 > index 000000000000..5a0a868c1ea0 > --- /dev/null > +++ b/drivers/hwtracing/qcom/Makefile > @@ -0,0 +1,3 @@ > +# SPDX-License-Identifier: GPL-2.0 > + > +obj-$(CONFIG_QCOM_TGU) += tgu.o > diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c > new file mode 100644 > index 000000000000..c5b2b384e6ae > --- /dev/null > +++ b/drivers/hwtracing/qcom/tgu.c > @@ -0,0 +1,176 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#include <linux/amba/bus.h> > +#include <linux/device.h> > +#include <linux/err.h> > +#include <linux/io.h> > +#include <linux/kernel.h> > +#include <linux/module.h> > +#include <linux/of.h> > +#include <linux/pm_runtime.h> > + > +#include "tgu.h" > + > +static void tgu_write_all_hw_regs(struct tgu_drvdata *drvdata) > +{ > + TGU_UNLOCK(drvdata->base); > + /* Enable TGU to program the triggers */ > + writel(1, drvdata->base + TGU_CONTROL); > + TGU_LOCK(drvdata->base); > +} > + > +static int tgu_enable(struct device *dev) > +{ > + struct tgu_drvdata *drvdata = dev_get_drvdata(dev); > + > + guard(spinlock)(&drvdata->lock); > + if (drvdata->enable) > + return -EBUSY; > + > + tgu_write_all_hw_regs(drvdata); > + drvdata->enable = true; > + > + return 0; > +} > + > +static void tgu_disable(struct device *dev) > +{ > + struct tgu_drvdata *drvdata = dev_get_drvdata(dev); > + > + guard(spinlock)(&drvdata->lock); > + if (drvdata->enable) { > + TGU_UNLOCK(drvdata->base); > + writel(0, drvdata->base + TGU_CONTROL); > + TGU_LOCK(drvdata->base); > + > + drvdata->enable = false; > + } > +} > + > +static ssize_t enable_tgu_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct tgu_drvdata *drvdata = dev_get_drvdata(dev); > + bool enabled; > + > + guard(spinlock)(&drvdata->lock); > + enabled = drvdata->enable; > + > + return sysfs_emit(buf, "%d\n", enabled ? 1 : 0); > +} > + > +/* enable_tgu_store - Configure Trace and Gating Unit (TGU) triggers. */ > +static ssize_t enable_tgu_store(struct device *dev, > + struct device_attribute *attr, > + const char *buf, > + size_t size) > +{ > + unsigned long val; > + int ret = 0; > + > + ret = kstrtoul(buf, 0, &val); > + if (ret) > + return ret; > + > + if (val) { > + ret = pm_runtime_resume_and_get(dev); > + if (ret) > + return ret; > + ret = tgu_enable(dev); > + if (ret) { > + pm_runtime_put(dev); > + return ret; > + } > + } else { > + tgu_disable(dev); > + pm_runtime_put(dev); > + } > + > + return size; > +} > +static DEVICE_ATTR_RW(enable_tgu); > + > +static struct attribute *tgu_common_attrs[] = { > + &dev_attr_enable_tgu.attr, > + NULL, > +}; > + > +static const struct attribute_group tgu_common_grp = { > + .attrs = tgu_common_attrs, > + NULL, > +}; > + > +static const struct attribute_group *tgu_attr_groups[] = { > + &tgu_common_grp, > + NULL, > +}; > + > +static int tgu_probe(struct amba_device *adev, const struct amba_id *id) > +{ > + struct device *dev = &adev->dev; > + struct tgu_drvdata *drvdata; > + int ret; > + > + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); > + if (!drvdata) > + return -ENOMEM; > + > + drvdata->dev = &adev->dev; > + dev_set_drvdata(dev, drvdata); > + > + drvdata->base = devm_ioremap_resource(dev, &adev->res); > + if (IS_ERR(drvdata->base)) > + return PTR_ERR(drvdata->base); > + > + spin_lock_init(&drvdata->lock); > + > + ret = sysfs_create_groups(&dev->kobj, tgu_attr_groups); > + if (ret) { > + dev_err(dev, "failed to create sysfs groups: %d\n", ret); > + return ret; > + } > + > + drvdata->enable = false; > + > + pm_runtime_put(&adev->dev); > + return 0; > +} > + > +static void tgu_remove(struct amba_device *adev) > +{ > + struct device *dev = &adev->dev; > + > + sysfs_remove_groups(&dev->kobj, tgu_attr_groups); > + > + tgu_disable(dev); > +} > + > +static const struct amba_id tgu_ids[] = { > + { > + .id = 0x000f0e00, > + .mask = 0x000fffff, > + }, > + { 0, 0, NULL }, > +}; > + > +MODULE_DEVICE_TABLE(amba, tgu_ids); > + > +static struct amba_driver tgu_driver = { > + .drv = { > + .name = "qcom-tgu", > + .suppress_bind_attrs = true, > + }, > + .probe = tgu_probe, > + .remove = tgu_remove, > + .id_table = tgu_ids, > +}; > + > +module_amba_driver(tgu_driver); > + > +MODULE_AUTHOR("Songwei Chai <songwei.chai(a)oss.qualcomm.com>"); > +MODULE_AUTHOR("Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>"); > +MODULE_DESCRIPTION("Qualcomm Trigger Generation Unit driver"); > +MODULE_LICENSE("GPL"); > diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h > new file mode 100644 > index 000000000000..b11cfb28261d > --- /dev/null > +++ b/drivers/hwtracing/qcom/tgu.h > @@ -0,0 +1,51 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef _QCOM_TGU_H > +#define _QCOM_TGU_H > + > +/* Register addresses */ > +#define TGU_CONTROL 0x0000 > +#define TGU_LAR 0xfb0 > +#define TGU_UNLOCK_OFFSET 0xc5acce55 > + > +static inline void TGU_LOCK(void __iomem *addr) > +{ > + do { > + /* Wait for things to settle */ > + mb(); > + writel_relaxed(0x0, addr + TGU_LAR); > + } while (0); > +} > + > +static inline void TGU_UNLOCK(void __iomem *addr) > +{ > + do { > + writel_relaxed(TGU_UNLOCK_OFFSET, addr + TGU_LAR); > + /* Make sure everyone has seen this */ > + mb(); > + } while (0); > +} > + > +/** > + * struct tgu_drvdata - Data structure for a TGU (Trigger Generator Unit) > + * @base: Memory-mapped base address of the TGU device > + * @dev: Pointer to the associated device structure > + * @lock: Spinlock for handling concurrent access > + * @enable: Flag indicating whether the TGU device is enabled > + * > + * This structure defines the data associated with a TGU device, > + * including its base address, device pointers, clock, spinlock for > + * synchronization, trigger data pointers, maximum limits for various > + * trigger-related parameters, and enable status. > + */ > +struct tgu_drvdata { > + void __iomem *base; > + struct device *dev; > + spinlock_t lock; > + bool enable; > +}; > + > +#endif

5 months

Re: [PATCH v9 7/7] qcom-tgu: Add reset node to initialize

by Suzuki K Poulose

On 19/12/2025 06:59, Songwei Chai wrote: > Add reset node to initialize the value of > priority/condition_decode/condition_select/timer/counter nodes. > > Signed-off-by: Songwei Chai <songwei.chai(a)oss.qualcomm.com> > --- > .../ABI/testing/sysfs-bus-amba-devices-tgu | 7 ++ > drivers/hwtracing/qcom/tgu.c | 74 +++++++++++++++++++ > 2 files changed, 81 insertions(+) > > diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu > index 010eade0a1c5..0733b3e07b45 100644 > --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu > +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu > @@ -42,3 +42,10 @@ KernelVersion 6.19 > Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Songwei Chai <songwei.chai(a)oss.qualcomm.com> > Description: > (RW) Set/Get the counter value with specific step for TGU. > + > +What: /sys/bus/amba/devices/<tgu-name>/reset_tgu > +Date: December 2025 > +KernelVersion 6.19 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com>, Songwei Chai <songwei.chai(a)oss.qualcomm.com> > +Description: > + (Write) Write 1 to reset the dataset for TGU. > diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c > index d4210869556e..5a8c6af9b719 100644 > --- a/drivers/hwtracing/qcom/tgu.c > +++ b/drivers/hwtracing/qcom/tgu.c > @@ -425,8 +425,82 @@ static ssize_t enable_tgu_store(struct device *dev, > + > + dev_dbg(dev, "Coresight-TGU reset complete\n"); Qualcomm-TGU ? Suzuki

5 months, 1 week

Re: [PATCH v8 0/4] add sysfs nodes to configure TPDA's registers

by Suzuki K Poulose

On Tue, 23 Dec 2025 18:09:49 +0800, Jie Gan wrote: > Patchset 1 introduces configuration of the global control register with > appropriate values to enable proper generation of cross-trigger packets. > > Patchset 2 introduces a sysfs node for triggering global flush for all > ports. > > Patchset 3 introduces a logic to configure the TPDA_SYNCR register, > which determines the frequency of ASYNC packet generation. These packets > assist userspace tools in accurately identifying each valid packet. > > [...] Applied, thanks! [1/4] coresight: tpda: add sysfs nodes for tpda cross-trigger configuration https://git.kernel.org/coresight/c/f9cc5b5a9e9a [2/4] coresight: tpda: add global_flush_req sysfs node https://git.kernel.org/coresight/c/8e1c358a3b0e [3/4] coresight: tpda: add logic to configure TPDA_SYNCR register https://git.kernel.org/coresight/c/33f04ead7c49 [4/4] coresight: tpda: add sysfs node to flush specific port https://git.kernel.org/coresight/c/a089d585a7f4 Best regards, -- Suzuki K Poulose <suzuki.poulose(a)arm.com>

5 months, 1 week

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