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Re:Puff plus XXL

by Simon

5 years, 2 months

following up on my last email

by Lucas Hawkins

5 years, 2 months

[PATCH v3] arm64: dts: msm8916: Enable CoreSight STM component

by Leo Yan

From: Georgi Djakov <georgi.djakov(a)linaro.org> Add DT binding for CoreSight System Trace Macrocell (STM) on msm8916, which can benefit the CoreSight development on DB410c. Signed-off-by: Georgi Djakov <georgi.djakov(a)linaro.org> Signed-off-by: Leo Yan <leo.yan(a)linaro.org> --- Changes from v2: * Correct for author name. Changes from v1: * alphabetically and address ordering for DT node; pad addresses with zeroes (Stephan Gerhold). arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 1 + arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 3a9538e1ec97..2165b7415add 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -410,6 +410,7 @@ &wcd_codec { &funnel0 { status = "okay"; }; &funnel1 { status = "okay"; }; &replicator { status = "okay"; }; +&stm { status = "okay"; }; &tpiu { status = "okay"; }; &smd_rpm_regulators { diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 402e891a84ab..f02b976480d5 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -489,6 +489,26 @@ snoc: interconnect@580000 { <&rpmcc RPM_SMD_SNOC_A_CLK>; }; + stm: stm@802000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0x00802000 0x1000>, + <0x09280000 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + status = "disabled"; + + out-ports { + port { + stm_out: endpoint { + remote-endpoint = <&funnel0_in7>; + }; + }; + }; + }; + /* System CTIs */ /* CTI 0 - TMC connections */ cti0: cti@810000 { @@ -562,6 +582,13 @@ funnel0_in4: endpoint { remote-endpoint = <&funnel1_out>; }; }; + + port@7 { + reg = <7>; + funnel0_in7: endpoint { + remote-endpoint = <&stm_out>; + }; + }; }; out-ports { -- 2.25.1

5 years, 2 months

Bidding invitation

by Albert Bourla

Good Day Sir/Ms, We are please to invite you or your company to quote the following item listed below: Product/Model No: A702TH FYNE PRESSURE REGULATOR Model Number: A702TH Qty. 30 units Compulsory,Kindly send your quotation to: quotation(a)pfizerbvsupply.com for immediate approval. Kind Regards, Albert Bourla PFIZER B.V Supply Chain Manager Tel: +31(0)208080 880 ADDRESS: Rivium Westlaan 142, 2909 LD Capelle aan den IJssel, Netherlands

5 years, 2 months

Bloqueo del Vehiculo - Multa no pagada

by Ministerio Del Interior 428245

Saludos Cordiales correo electronico: coresight(a)lists.linaro.org Tienes una multa pendiente Se ha identificado en nuestro sistema una multa de trafico no pagada, dirigida a usted o su vehiculo. Para ver la notificacion Visite: multa-pendiente-coresight(a)lists.linaro.org Atencion: Para ver la notificacion, abra en un sistema (Windows). Copyright DGT 2021. Todos los derechos reservados.   P65LOEPP65LOP65LOEAJP65LOEP65LOEP65LP6P65LOEAJUP65LOEAP65LOEP65LOEP65LOEP65LOEP65LOEP65LOE P65LOEPP65LOP65LOEAJP65LOEP65LOEP65LP6P65LOEAJUP65LOEAP65LOEP65LOEP65LOEP65LOEP65LOEP65LOE P65LOEPP65LOP65LOEAJP65LOEP65LOEP65LP6P65LOEAJUP65LOEAP65LOEP65LOEP65LOEP65LOEP65LOEP65LOE  

5 years, 2 months

[PATCH v2] coresight: core: Fix typo in coresight-core.c

by Qi Liu

Fix the following checkpatch warning: WARNING: 'compoment' may be misspelled - perhaps 'component'? Fixes: 8e264c52e1da ("coresight: core: Allow the coresight core driver to be built as a module") Signed-off-by: Qi Liu <liuqi115(a)huawei.com> --- drivers/hwtracing/coresight/coresight-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 0062c89..b57bea1 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -86,7 +86,7 @@ static int coresight_id_match(struct device *dev, void *data) i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) return 0; - /* Get the source ID for both compoment */ + /* Get the source ID for both components */ trace_id = source_ops(csdev)->trace_id(csdev); i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); -- 2.8.1

5 years, 2 months

Missing cs-trace-disasm.py

by Szymanski, Pawel

Hello, I am trying to run trace capturing from Coresight on N1 SDP using perf as described here: https://github.com/Linaro/OpenCSD/blob/master/HOWTO.md I was able to gather the traces, but when I wanted to get the python script to get more human readable output as described in section https://github.com/Linaro/OpenCSD/blob/master/HOWTO.md#trace-decoding-with-…, I found that the cs-trace-disasm.py Is missing in my system. Do you know where I can find the file? Regards Pawel Intel Technology Poland sp. z o.o. ul. Sowackiego 173 | 80-298 Gdask | Sd Rejonowy Gdask Pnoc | VII Wydzia Gospodarczy Krajowego Rejestru Sdowego - KRS 101882 | NIP 957-07-52-316 | Kapita zakadowy 200.000 PLN. Ta wiadomo wraz z zacznikami jest przeznaczona dla okrelonego adresata i moe zawiera informacje poufne. W razie przypadkowego otrzymania tej wiadomoci, prosimy o powiadomienie nadawcy oraz trwae jej usunicie; jakiekolwiek przegldanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.

5 years, 2 months

[PATCH] arm64: dts: msm8916: Enable CoreSight STM component

by Leo Yan

From: Georgi Djakov <georgi.djakov(a)linaro.org> Add DT binding for CoreSight System Trace Macrocell (STM) on msm8916, which can benefit the CoreSight development on DB410c. Signed-off-by: Georgi Djakov <georgi.djakov(a)linaro.org> Signed-off-by: Leo Yan <leo.yan(a)linaro.org> --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 1 + arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 3a9538e1ec97..dd87e5d739ab 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -406,6 +406,7 @@ &wcd_codec { &etm1 { status = "okay"; }; &etm2 { status = "okay"; }; &etm3 { status = "okay"; }; +&stm { status = "okay"; }; &etr { status = "okay"; }; &funnel0 { status = "okay"; }; &funnel1 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 402e891a84ab..892f1772e53c 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -562,6 +562,13 @@ funnel0_in4: endpoint { remote-endpoint = <&funnel1_out>; }; }; + + port@7 { + reg = <7>; + funnel0_in7: endpoint { + remote-endpoint = <&stm_out>; + }; + }; }; out-ports { @@ -882,6 +889,26 @@ etm3_out: endpoint { }; }; + stm: stm@802000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0x802000 0x1000>, + <0x9280000 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>; + clock-names = "apb_pclk", "atclk"; + + status = "disabled"; + + out-ports { + port { + stm_out: endpoint { + remote-endpoint = <&funnel0_in7>; + }; + }; + }; + }; + msmgpio: pinctrl@1000000 { compatible = "qcom,msm8916-pinctrl"; reg = <0x01000000 0x300000>; -- 2.25.1

5 years, 2 months

firefighting equipment supplies

by Firecon

5 years, 2 months

Business Propoal !

by Metro Investment

5 years, 2 months

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