On Thu, 31 Jan 2013 14:42:28 -0500 Andrew Bradford andrew@bradfordembedded.com wrote:
<snip>
root@beaglebone:~/flashbench# cat /sys/kernel/debug/mmc1/* 2>/dev/null | grep -v ^$ 52000000 clock: 52000000 Hz vdd: 7 (1.65 - 1.95 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 2 (4 bits) timing spec: 1 (mmc high-speed) signal voltage: 0 (3.30 V) mmc1: ctx_loss: 0:0 regs: CON: 0x00000600 HCTL: 0x00000b06 SYSCTL: 0x000c0087 IE: 0x00000000 ISE: 0x00000000 CAPA: 0x06e10080
Now in 8 bit mode:
root@beaglebone:~# cat /sys/kernel/debug/mmc1/* 2>/dev/null | grep -v ^$ 52000000 clock: 52000000 Hz vdd: 7 (1.65 - 1.95 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 1 (mmc high-speed) signal voltage: 0 (3.30 V) mmc1: ctx_loss: 0:0 regs: CON: 0x00000620 HCTL: 0x00000b04 SYSCTL: 0x000c0087 IE: 0x00000000 ISE: 0x00000000 CAPA: 0x06e10080
root@beaglebone:~/flashbench# dd if=/dev/zero of=/dev/mmcblk1 bs=1M count=256 oflag=direct 256+0 records in 256+0 records out 268435456 bytes (268 MB) copied, 46.5893 s, 5.8 MB/s
root@beaglebone:~/flashbench# dd if=/dev/mmcblk1 of=/dev/null bs=1M count=256 iflag=direct 256+0 records in 256+0 records out 268435456 bytes (268 MB) copied, 15.1334 s, 17.7 MB/s
root@beaglebone:~# dd if=/dev/zero of=/dev/mmcblk1 bs=1M count=256 oflag=direct 256+0 records in 256+0 records out 268435456 bytes (268 MB) copied, 47.8116 s, 5.6 MB/s
root@beaglebone:~# dd if=/dev/mmcblk1 of=/dev/null bs=1M count=256 iflag=direct 256+0 records in 256+0 records out 268435456 bytes (268 MB) copied, 11.9116 s, 22.5 MB/s
## Not quite the speeds listed in the Micron data sheet. ## Is better than 4 bit mode, though.
<snip>
In 8 bit mode, open-au tests look the same as 4 bit mode, which should be expected as the controller is the bottleneck on writes anyway.
-Andrew