Hi,
I thought perhaps it might be worth starting a thread on this, as
despite Grant and Heinrich kinding spending a bit of time talking
about this, I am still very much in the dark about how 'embedded' and
distro/other boot flows are going to come together with EBBR. Of
course this would be easier f2f.
Case 1:
Firmware loads the kernel to a particular address, selects DT and
boots it. The kernel may require EFI boot services, or may not, but in
the general case the firmware provides them.
Case 2:
Firmware loads EFI app and provides EFI boot services to it. How the
system actually boots is under control of the app.
I feel that a lot of the confusion about verified boot, DT selections,
boot menus, etc. is coming from the introduction of an EFI app which
has no specification (it can be grub, shim or something else, as I
understand it). Certainly this is very flexible and future-proof, but
it is also arbitrarily complex, unpredictable and hard to secure.
I am wondering if we can come up with a way to deterministically
specify how a system will boot and how to make it boot a different way
(i.e. with a different kernel, initrd, DT).
Heinrich mentioned EFI variables as a way of selecting
kernel/initrd/DT. Then the problem becomes just a case of being able
to change those variables from Linux userspace. Is that right?
We are talking about having a 'secure' part of EBBR, which allows for
secure boot. Should we have a 'defined boot' part of EBBR, that
defines how the kernel/DT/initrd are selected, based on EFI variables?
Unfortunately I just don't know enough about all the different boot
flows used by the different distros. It seems like crazy town. Does
anyone have some pointers so I can do some study?
Regards,
SImon
Hello Atish,
the UEFI spec has this sentence:
"When UEFI firmware handoff control to OS, the RISC-V is operated in
machine-mode privilege." (M-mode is the equivalent to EL3 in ARM).
This does not make any sense to me when using a secure execution
environement (SEE) like OpenSBI.
The hand-off should occur in S-Mode if the CPU supports it and only in
M-Mode when the CPU only supports M-mode.
We should prescribe this in the EBBR and somehow get the UEFI spec fixed
afterwards.
An other issue is the calling convention. Chapter "2.3.7.3 Detailed
Calling Convention" does not describe which registers are saved by the
UEFI payload's entry point and restored by the payload before calling
the UEFI API or returning to the UEFI payload. This concerns especially
registers gp (x3) and tp (x4).
Into the EBBR or UEFI spec we should put a link to the "RISC-V ELF psABI
specification"
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
which is referenced by "The RISC-V Instruction Set Manual".
>From the "RISC-V ELF psABI specification" one might conclude that the
UEFI payload should not be allowed to change gp and tp before calling
ExitBootServices() or SetVirtualAddressMap() whichever occurs last.
Due to this missing clarification U-Boot is currently saving gp before
calling the entry point of the payload and restores it on reentry or on
entry of an API call. Nothing is done for tp.
Best regards
Heinrich
Hi all,
Here is the draft agenda for the EBBR biweekly today. As always, let me
know if there is anything you want to add. Notes will be taken in
Etherpad[1].
Draft agenda:
- Issue & PR review
- Draft EBBR text for tailoring UEFI section 2.6 base requirements[2]
- Roundtable
- Any other business
[1] https://etherpad.opendev.org/p/EBBR
[2] https://github.com/ARM-software/ebbr/wiki/Required-EFI-protocols
---
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All,
We had a DTE call last week that was poorly attended. We decided to try
again this week. Nov 11 would be our next normal call but it is a
holiday for many of us so Francois will cancel it. Here I am suggesting
we also meet on Nov 18.
so to recap:
Nov 4: YES
Nov 11: NO
Nov 18: YES
On one of these calls we will figure out what we want to do going
forward for meeting time. (Go back to old schedule, Keep new schedule,
alternate weeks with EBBR in the same slot)
For anyone that wants a real calendar invite, you can import the link below.
Topic: DT Evolution (special case for Nov)
Time: Nov 4, 2020 02:00 PM London
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Reminder; next EBBR meeting is today at 16:00 GMT. Dial in details are
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Agenda:
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This patch series adds RISC-V compatibility content to EBBR.
The additional content is not a lot given that we just need to update the
architecture specific sections for RISC-V. Rest of the document is ISA agnostic
anyways. I am not sure about the copyrights though. There are two places where
copyrights are present. I have added Western Digital copyright for the index.rst
but I have not added it for conf.py as it goes into the first page of the EBBR
specification.
Should we add multiple lines of copyrights or just keep copyrights
at one place ? I am open to any other suggestions as well.
The series is also available in my github repo.
https://github.com/atishp04/ebbr/tree/riscv_update
Changes from v1->v2:
1. Added ACPI todo list.
2. Removed efistub requirements as that is linux specific.
3. Fix typos.
Atish Patra (2):
Add Western Digital copyright
Add RISC-V support content to the EBBR specification
source/chapter1-about.rst | 42 +++++++++++++++++++++++++++++++--
source/chapter2-uefi.rst | 10 +++++++-
source/chapter3-secureworld.rst | 14 +++++++++++
source/index.rst | 3 +++
source/references.rst | 4 ++++
5 files changed, 70 insertions(+), 3 deletions(-)
--
2.28.0
Hi folks,
Very sorry, but I'm going to postpone this week's EBBR meeting to next
week. Arm has an internal quarterly meeting that conflicts. I'm going to
reschedule to the same slot next week.
g.
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