- boot-architecture - lists.linaro.org

EBBR weekly meeting details (Every Thursday)

by Grant Likely

Time: Every Thursday at 16:30-17:30 BST (8:30 PDT, 23:30 CST) Join by Phone +44 2033215213,, 4664465# https://meet.lync.com/armh/grant.likely/YBY93TIK This is a weekly status call for the EBBR drafting process that came out of a discussion at Linaro Connect HKG18 in March this year. As mentioned in the notes[1] from that meeting, there is a desire to have EBBR published in time for it to be used by an upcoming 96Boards specification, due to be released in about 6 months time. This meeting is a regular status update to track progress on EBBR development. I will endeavour to keep it short when there isn’t much to discuss. I expect initially there will be a lot to discuss to get the ball rolling, and then will taper off. Anyone is welcome to join. Feel free to pass this invitation along. Let me know if anyone has trouble dialling/connecting to the SfB bridge. [1] https://lists.linaro.org/pipermail/boot-architecture/2018-April/000419.html --- Join online meeting https://meet.lync.com/armh/grant.likely/YBY93TIK Trouble Joining? Try Skype Web App https://meet.lync.com/armh/grant.likely/YBY93TIK?sl=1 Join by Phone +44 2033215213,, 4664465# Find a local number https://dialin.lync.com/7bdb65cd-97d0-44fe-bc03-bf8072eadc33 Conference ID: 4664465 IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

7 years, 7 months

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Canceled: EBBR Kickoff Meeting

by Grant Likely

This is a follow-up from the EBBR discussion that happened at Linaro Connect 2 weeks ago. As mentioned in the notes[1] from that meeting, there is a desire to have EBBR published in time for it to be used by an upcoming 96Boards specification, due to be released in about 6 months time. This meeting is a regular status update to track progress on EBBR development. I will endeavour to keep it short when there isn’t much to discuss. I expect initially there will be a lot to discuss to get the ball rolling. Anyone is welcome to join. Feel free to pass this invitation along. Let me know if anyone has trouble dialling/connecting to the SfB bridge. Time: Every Thursday at 16:30-17:30 BST (8:30 PDT, 23:30 CST) [1] https://lists.linaro.org/pipermail/boot-architecture/2018-April/000419.html g. ......................................................................................................................................... Join online meeting https://meet.lync.com/armh/grant.likely/Q77FJZY5 Join by Phone +442033215213 (Dial-in Number) English (United Kingdom) Find a local number https://dialin.lync.com/7bdb65cd-97d0-44fe-bc03-bf8072eadc33 Conference ID: 22233117 Forgot your dial-in PIN? https://dialin.lync.com/7bdb65cd-97d0-44fe-bc03-bf8072eadc33 ......................................................................................................................................... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

7 years, 7 months

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Canceled: EBBR Kickoff Meeting

by Grant Likely

This is a follow-up from the EBBR discussion that happened at Linaro Connect 2 weeks ago. As mentioned in the notes[1] from that meeting, there is a desire to have EBBR published in time for it to be used by an upcoming 96Boards specification, due to be released in about 6 months time. This meeting is a regular status update to track progress on EBBR development. I will endeavour to keep it short when there isn’t much to discuss. I expect initially there will be a lot to discuss to get the ball rolling. Anyone is welcome to join. Feel free to pass this invitation along. Let me know if anyone has trouble dialling/connecting to the SfB bridge. Time: Every Thursday at 16:30-17:30 BST (8:30 PDT, 23:30 CST) [1] https://lists.linaro.org/pipermail/boot-architecture/2018-April/000419.html g. ......................................................................................................................................... Join online meeting https://meet.lync.com/armh/grant.likely/Q77FJZY5 Join by Phone +442033215213 (Dial-in Number) English (United Kingdom) Find a local number https://dialin.lync.com/7bdb65cd-97d0-44fe-bc03-bf8072eadc33 Conference ID: 22233117 Forgot your dial-in PIN? https://dialin.lync.com/7bdb65cd-97d0-44fe-bc03-bf8072eadc33 ......................................................................................................................................... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

7 years, 7 months

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EBBR Kickoff Meeting

by Grant Likely

This is a followup from the EBBR discussion that happened at Linaro Connect 2 weeks ago. As mentioned in the notes[1] from that meeting, there is a desire to have EBBR published in time for it to be used by an upcoming 96Boards specification, due to be released in about 6 months time. This meeting is a regular status update to track progress on EBBR development. I will endeavour to keep it short when there isn’t much to discuss. I expect initially there will be a lot to discuss to get the ball rolling. Anyone is welcome to join. Feel free to pass this invitation along. Let me know if anyone has trouble dialing/connecting to the SfB bridge. [1] was posted to boot-architecture(a)lists.linaro.org<mailto:boot-architecture@lists.linaro.org>, but hasn’t shown up in the archive yet. I’ll get that sorted out so that there is a public copy. g. ......................................................................................................................................... Join online meeting https://meet.lync.com/armh/grant.likely/Q77FJZY5 Join by Phone +442033215213 (Dial-in Number) English (United Kingdom) Find a local number https://dialin.lync.com/7bdb65cd-97d0-44fe-bc03-bf8072eadc33 Conference ID: 22233117 Forgot your dial-in PIN? https://dialin.lync.com/7bdb65cd-97d0-44fe-bc03-bf8072eadc33 ......................................................................................................................................... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

7 years, 7 months

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Resend: Next steps for EBBR

by Grant Likely

I'm resending these notes to the list because the boot-architecture list rejected it the first time around. Resending so it appears in the archive. g. --- Hi folks, At Linaro Connect in Hong Kong this week there has been some EBBR (Embedded Base Boot Requirements) discussions. One of the interesting angles that came up is that the 96Boards project would like to specify EBBR in an upcoming specification, so they need EBBR to be published and realistic. The Fedora and SuSE representatives are very supportive of that notion, because it gives them a path to support boards conforming to that spec. A few of us here had a quick meeting to work out how we could make that happen. Attendees: Alexander Graf (SuSE) Grant Likely (Arm) Bill Mills (TI) Peter Robinson (Red Hat/Fedora) Dong Wei (Arm) Yang Zhang (Linaro/96Boards) Notes: - We discussed the purpose & intent of EBBR - Is intended to document the basic requirements on firmware to implement a 'standard' boot path on embedded boards. - Needed by distros (Fedora, SuSE, Debian, etc) to support boards out of the box - Needed by OpenEmbedded, Yocto, etc to get away from custom platform specific hacks - Establishes a foundation for implementing SecureBoot, A/B updates, and other useful boot scenarios in a consistent way. - We expect the primary users of EBBR will be embedded & developer Arm boards using U-Boot firmware and Devicetree machine description - We expect a distribution will be able to use the same software (Distro Installer, Grub, Linux UEFI stub, Shim), and the same media (installer images) on both embedded and server platforms - We discussed what EBBR should contain - Will document interfaces and standards; not specific projects - Will specify a subset of the UEFI specification. - Boot services are in - Runtime services can be implemented with empty stubs - Need to work out what to do with runtime setting of variables - For the first release ("EBBR level 0"), it will track features available in upstream - In concrete terms this means EBBR can be implemented with upstream U-Boot or Tianocore. - Subsequent releases will refine the requirements as needed and as software improves - Expected target audience - embedded board vendors - Gives strong guidance on how to make a widely supported board - Linux distributions - Can make EBBR compliance a requirement for support - End users - EBBR will make it simpler to use embedded Arm boards because each board will not require special setup instructions or image formats - Roadmap - 96Boards wants to specify EBBR compliance in an upcoming spec to be announced at Linaro Connect in the fall (about 6 months time) - Need to have general agreement on the content of EBBR well before that (2-3 months?) - Need to have a final EBBR 1.0 release before the 96Boards spec announcement - Work items: - Transcode existing EBBR draft into text markup and check into Git repo - Review current EBBR draft and compare with available U-Boot functionality - Identify changes required to EBBR spec - Identify gaps in U-Boot functionality that can reasonably be ad Open Questions: - Can the EBBR document be drafted in public? (Dong to follow up internally at Arm) - Where do the Engineering resources come from to make EBBR a reality - General call for engineering effort to be committed by interested parties Actions: - Dong to have Arm internal discussion about moving EBBR draft process onto GitHub or similar - Markup candidate: Sphinx-doc with reStructuredText markup - Grant to organize a regular weekly meeting to track EBBR drafting process - Make sure to include Tom Rini and Ard Biesheuvel - Yang to socialize with 96Boards partners to prepare them for EBBR compliance - (Unassigned) Create a hosting page with issue tracker for EBBR -- TBD after Dong finishes internal due diligence on moving EBBR drafting to a public repository - Probably GitHub

7 years, 7 months

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Re: [Arm.ebbr-discuss] Next steps for EBBR

by Grant Likely

On 04/04/2018 15:12, Mills, William wrote: > Grant, > > None of this is archived at: > https://lists.linaro.org/pipermail/boot-architecture/ > (even the stuff that explicitly cc'ed the list) Hmmm. I don't know what has happened there. I just got Linaro to reset the admin password of that list, and I've cc'd this message to the list as a test. I'll track down the problem. > Why did we switch to an @arm.com list? Is there a public archive? Can anyone opt in or is this invite only? > We should use open tools for an open standard. boot-architecture was originally cc'd because it has a public archive. I do not intend for any of this discussion to be on a list without an archive. g. > > Thanks, > Bill > > -----Original Message----- > From: arm.ebbr-discuss-bounces(a)arm.com [mailto:arm.ebbr-discuss-bounces@arm.com] On Behalf Of Grant Likely > Sent: Thursday, March 29, 2018 5:52 PM > To: arm.ebbr-discuss(a)arm.com; Da Xue > Subject: Re: [Arm.ebbr-discuss] Next steps for EBBR > > On 29/03/2018 22:24, Da Xue wrote: >>> We expect the primary users of EBBR will be embedded & developer Arm >>> boards using U-Boot firmware and Devicetree machine description My >>> concern is around device tree and EFI variable storage for u-boot on flash. >> >> The two elephants in the room. How to handle device tree updates? Do >> we track mainline? How to handle detection and addition of overlays? > > Certainly issues to discuss while drafting EBBR. > >>> We expect a distribution will be able to use the same software >>> (Distro Installer, Grub, Linux UEFI stub, Shim), and the same media >>> (installer images) on both embedded and server platforms >> >> Are you referring to SBSA when you say "server platforms"? I don't see >> why this has to be the case. > > Yes, I'm talking about SBSA/SBBR compliant platforms. EBBR will require a subset of what SBBR requires; essentially just enough of the UEFI spec to execute a UEFI OS Loader from media or the network. U-Boot implements this today, and a distro would be able to use the exact same OSLoader/Installer on both SBSA/SBBR systems and EBBR systems. That's part of the point of this exercise. > > What do you mean when you say, "don't see why this has to be the case?" > What do you see as the alternative? > >> >>> Linux distributions - Can make EBBR compliance a requirement for >>> support >> >> Vendors haven't standardized boot rom sequence. Some SoC boot from SPI >> first, other eMMC, and others SD card. This is a major pain point that >> ARM/Linaro should address. I don't see why distributions should force >> EBBR compliance when a simple u-boot script loading or scanning for a >> Linux EFI stub suffices unless EBBR is incredibly simple and small. I >> need to emphasize the simple and small part because it will also allow >> EBBR to scale up and down. > > Shouldn't be an issue for EBBR. EBBR is focused on the Firmware->OS interface. It doesn't matter where the SoC boots U-Boot or Tianocore from as long as firmware presents a consistent interface beyond that point. > > It also doesn't matter how U-Boot implements the boot interface. If the U-Boot developers think a U-Boot script that searches for OS Loaders in the correct order is the best implementation, then that is just fine. > > What is important is that the OS image must not need to contain anything special in order to boot. ie. It must not require a script to be installed on the media because the UEFI spec already specifies how to find the boot program. > >> >>> End users - EBBR will make it simpler to use embedded Arm boards because >>> each board will not require special setup instructions or image >>> formats >> >> Distributions will still need to explicitly have SoC family support in >> their kernels. > > Yes, that is a given. > >> It would be a lot of work (that will never get done) for >> SoC vendors to abstract device classes and functions like Intel has for >> UEFI. > > For the boot time environment the abstractions are already there. U-Boot > implements the needed abstractions in the form of the U-Boot device > drivers. The UEFI APIs are mapped directly onto the U-Boot device model. > > For runtime services you're right. There is no plan to implement a > runtime abstract device driver model. > >> >> On Thu, Mar 29, 2018 at 6:47 AM, Grant Likely <grant.likely(a)arm.com >> <mailto:grant.likely@arm.com>> wrote: >> >> On 29/03/2018 10:06, Alexander Graf wrote: >> >> Does Windows for IoT run in aarch64 mode by now? If not, we >> might have a problem :). >> >> >> I wouldn't call that a problem. It is up to Microsoft on whether or >> not they care about an aarch64 port of Windows IoT. They may still >> find EBBR useful for aarch32, and the whole point of having them >> involved is they can share what they think would be valuable to have >> in the spec. >> >> Cheers, >> g. >> >> >> >> Alex >> >> Am 29.03.2018 um 09:34 schrieb Charles Garcia-Tobin >> <Charles.Garcia-Tobin(a)arm.com >> <mailto:Charles.Garcia-Tobin@arm.com>>: >> >> Nice! >> >> On 29/03/2018, 06:14, "arm.ebbr-discuss-bounces(a)arm.com >> <mailto:arm.ebbr-discuss-bounces@arm.com> on behalf of Dong >> Wei" <arm.ebbr-discuss-bounces(a)arm.com >> <mailto:arm.ebbr-discuss-bounces@arm.com> on behalf of >> Dong.Wei(a)arm.com <mailto:Dong.Wei@arm.com>> wrote: >> >> I presented EBBR and its intent at the UEFI Plugfest >> this week. Microsoft people in attendance seemed very >> interested. They are to follow up with their IoT team to see >> if they would be interested in working with us on this... >> >> - DW >> - >> -----Original Message----- >> From: Grant Likely >> Sent: Wednesday, March 28, 2018 8:57 AM >> To: arm.ebbr-discuss <arm.ebbr-discuss(a)arm.com >> <mailto:arm.ebbr-discuss@arm.com>> >> Cc: Alexander Graf <agraf(a)suse.de >> <mailto:agraf@suse.de>>; wmills(a)ti.com >> <mailto:wmills@ti.com>; Dong Wei <Dong.Wei(a)arm.com >> <mailto:Dong.Wei@arm.com>>; Yang Zhang >> <yang.zhang(a)96boards.org <mailto:yang.zhang@96boards.org>>; >> Peter Robinson <pbrobinson(a)redhat.com >> <mailto:pbrobinson@redhat.com>>; Ard Biesheuvel >> <ard.biesheuvel(a)linaro.org >> <mailto:ard.biesheuvel@linaro.org>>; rob.herring(a)linaro.org >> <mailto:rob.herring@linaro.org>; Tom Rini >> <trini(a)konsulko.com <mailto:trini@konsulko.com>>; >> boot-architecture(a)lists.linaro.org >> <mailto:boot-architecture@lists.linaro.org> >> Subject: Next steps for EBBR >> >> Hi folks, >> >> At Linaro Connect in Hong Kong this week there has been >> some EBBR (Embedded Base Boot Requirements) discussions. One >> of the interesting angles that came up is that the 96Boards >> project would like to specify EBBR in an upcoming >> specification, so they need EBBR to be published and >> realistic. The Fedora and SuSE representatives are very >> supportive of that notion, because it gives them a path to >> support boards conforming to that spec. A few of us here had >> a quick meeting to work out how we could make that happen. >> >> I'm sending this to the EBBR alias, but I'm also cc'ing >> the boot-architecture(a)lists.linaro.org >> <mailto:boot-architecture@lists.linaro.org> mailing list so >> that we've got an archive. >> >> Attendees: >> Alexander Graf (SuSE) >> Grant Likely (Arm) >> Bill Mills (TI) >> Peter Robinson (Red Hat/Fedora) >> Dong Wei (Arm) >> Yang Zhang (Linaro/96Boards) >> >> Notes: >> - We discussed the purpose & intent of EBBR >> - Is intended to document the basic requirements on >> firmware to >> implement a 'standard' boot path on embedded boards. >> - Needed by distros (Fedora, SuSE, Debian, etc) to >> support boards out >> of the box >> - Needed by OpenEmbedded, Yocto, etc to get away >> from custom platform >> specific hacks >> - Establishes a foundation for implementing >> SecureBoot, A/B updates, >> and other useful boot scenarios in a consistent way. >> - We expect the primary users of EBBR will be >> embedded & developer Arm >> boards using U-Boot firmware and Devicetree >> machine description >> - We expect a distribution will be able to use the >> same software >> (Distro Installer, Grub, Linux UEFI stub, Shim), >> and the same media >> (installer images) on both embedded and server >> platforms >> >> - We discussed what EBBR should contain >> - Will document interfaces and standards; not >> specific projects >> - Will specify a subset of the UEFI specification. >> - Boot services are in >> - Runtime services can be implemented with empty stubs >> - Need to work out what to do with runtime setting >> of variables >> - For the first release ("EBBR level 0"), it will >> track features >> available in upstream >> - In concrete terms this means EBBR can be >> implemented with upstream >> U-Boot or Tianocore. >> - Subsequent releases will refine the requirements >> as needed and as >> software improves >> >> - Expected target audience >> - embedded board vendors - Gives strong guidance on >> how to make a >> widely supported board >> - Linux distributions - Can make EBBR compliance a >> requirement for >> support >> - End users - EBBR will make it simpler to use >> embedded Arm boards >> because each board will not require special setup >> instructions or >> image formats >> >> - Roadmap >> - 96Boards wants to specify EBBR compliance in an >> upcoming spec to be >> announced at Linaro Connect in the fall (about 6 >> months time) >> - Need to have general agreement on the content of >> EBBR well before >> that (2-3 months?) >> - Need to have a final EBBR 1.0 release before the >> 96Boards spec >> announcement >> - Work items: >> - Transcode existing EBBR draft into text markup >> and check into Git >> repo >> - Review current EBBR draft and compare with >> available U-Boot >> functionality >> - Identify changes required to EBBR spec >> - Identify gaps in U-Boot functionality that can >> reasonably be >> addressed in the EBBR v1.0 timeframe >> - Draft roadmap of goals - particularly focusing >> on functionality >> required by Linux distributions >> - Stand up issue tracker (GitHub?) >> >> Open Questions: >> - Can the EBBR document be drafted in public? (Dong to >> follow up >> internally at Arm) >> - Where do the Engineering resources come from to make >> EBBR a reality >> - General call for engineering effort to be >> committed by interested >> parties >> - Can we use a cut-down LuvOS or UEFI SCT as a >> specification conformance >> test suite? >> >> Actions: >> - Dong to have Arm internal discussion about moving >> EBBR draft process >> onto GitHub or similar >> - Markup candidate: Sphinx-doc with reStructuredText >> markup >> - Grant to organize a regular weekly meeting to track >> EBBR drafting >> process >> - Make sure to include Tom Rini and Ard Biesheuvel >> - Yang to socialize with 96Boards partners to prepare >> them for EBBR >> compliance >> - (Unassigned) Create a hosting page with issue tracker >> for EBBR -- TBD >> after Dong finishes internal due diligence on moving >> EBBR drafting to >> a public repository >> - Probably GitHub >> >> >> _______________________________________________ >> Arm.ebbr-discuss mailing list >> Arm.ebbr-discuss(a)arm.com <mailto:Arm.ebbr-discuss@arm.com> >> >> >> >> _______________________________________________ >> Arm.ebbr-discuss mailing list >> Arm.ebbr-discuss(a)arm.com <mailto:Arm.ebbr-discuss@arm.com> >> >> >> >> _______________________________________________ >> Arm.ebbr-discuss mailing list >> Arm.ebbr-discuss(a)arm.com <mailto:Arm.ebbr-discuss@arm.com> >> >> >> _______________________________________________ >> Arm.ebbr-discuss mailing list >> Arm.ebbr-discuss(a)arm.com <mailto:Arm.ebbr-discuss@arm.com> >> >> >> >> >> _______________________________________________ >> Arm.ebbr-discuss mailing list >> Arm.ebbr-discuss(a)arm.com >> > > _______________________________________________ > Arm.ebbr-discuss mailing list > Arm.ebbr-discuss(a)arm.com > IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

7 years, 7 months

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Test

by Grant Likely

Please ignore this message. I'm testing the mailing list. IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

7 years, 7 months

1
0
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Issue for BEAGLE BONE BLACK - bootup with UEFI

by Mohan Rao .vanimina

Hi Team, When trying to boot-up BeagleBoneBlack Platform using UEFI with below procedure (instead of U-boot), ran into following issue. Followed Web link : https://github.com/tianocore/tianocore.github.io/wiki/BeagleBoardPkg#Beagle… I had a doubt on the provided git repository in this procedure. Does this repo supports BeagelBoneBlack Platform? *Error when Tried in Qemu: * EhcCreateUsb2Hc: capability length 0 EhcDriverBindingStart: failed to create USB2_HC ERROR: Did not find Linux kernel. [1] Linux from SD - VenHw(B615F1F5-5088-43CD-809C-A16E52487D00)/HD(1,MBR,0x00000000,0x3F,0x19FC0)/zImage - Arguments: console=tty0 console=ttyS2,115200n8 root=UUID=a4af765b-c2b5-48f4-9564-7a4e9104c4f6 rootwait ro earlyprintk - LoaderType: Linux kernel with ATAG support [2] Shell [3] Boot Manager Start: qemu: terminating on signal 2 *Error ; sd Card : **DATA abort Error coming when tried booting thru sd-card* Could you please help in debug this issue? Regards, Mohan.

8 years, 1 month

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[PSCI] CPU 1 bring up while CPU 0 loading bootloader

by Atul Raut

Hi, Is there any way I can bring cpu-1 while cpu-0 is running bootloader ? Need help with setting up C-environment for cpu-1. Was able to set up PSCI framework. Regards, Atul

10 years

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Farewell - last days at ARM Ltd

by Olivier Martin

For people who does not know me I have been the EDK2 maintainer of the ARM Packages for the last 4 years. I took over the excellent work Andrew Fish and Eugene Cohen started few years before. This week was my last week at ARM - my last day would be on Friday 17th (UK time). I have been learning a lot thanks to the UEFI community. Being the ARM maintainer has been a great opportunity. I also had the chance to go to few conferences to discuss and present my work and meet few of you as part of my job. I have been asked last week what is the new exciting place that makes me leave ARM. The answer is my own future start-up... I love challenges and I think this one is definitely one of the highest one I could find. It is actually quite scary but I am quite excited! I could potentially have kept my role of EDK2 ARM maintainer with me but I would prefer to give the task to Leif Lindholm who has been a co-maintainer for almost two months. So I could fully focus on my new adventure. Leif has been seating not far from me in the ARM office. We have also had regular meetings about UEFI. He has been at ARM Ltd longer than me and been involved in different Open Source projects. He has also been working on UEFI for Linaro for few (three?) years now. I have been trying to publish as much work as I can on the work I have done on UEFI for the last 5 years and half at ARM Ltd in the last two weeks. Unfortunately, I am not sure I will have time to publish everything. But I will do my best to publish the most important bits... Unfortunately, it is still too early to share more details about my future product, so I created a quick website (and found a neutral name) last week-end to allow people to follow the adventure: http://labapart.com/ (can either be pronounced as "Lab apart" or "Lab à Part"). If you would like to contact me, email me here: olivier.martin.fr(a)gmail.com and/or linkedin me: http://www.linkedin.com/in/olivierm. Cheers, Olivier -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782

10 years, 3 months

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Ext2/Ext3 filesystem support

by Meenakshi Aggarwal

Hi, This is my first query on this list. I apologize for any mistake. I have some queries on following patch : https://lists.linaro.org/pipermail/boot-architecture/2013-June/000325.html I am not able to see this patch in master branch. Is this patch tested? Also I want to know the underline firmware volume on which this patch has been tested? Thanks & regards Meenakshi Aggarwal

10 years, 3 months

4
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RE: AARCH64: Timer Dxe

by Sharma Bhupesh

Hi Laszlo, > -----Original Message----- > From: Laszlo Ersek [mailto:lersek@redhat.com] > Sent: Saturday, June 13, 2015 5:59 PM > To: Sharma Bhupesh-B45370; edk2-devel(a)lists.sourceforge.net; > olivier.martin(a)arm.com; Leif Lindholm; boot-architecture(a)lists.linaro.org > Subject: Re: AARCH64: Timer Dxe > > On 06/13/15 10:52, Sharma Bhupesh wrote: > > Hi, > > > > Can some ARM expert help me with my queries below. > > > > The overall context is that I cannot get the 'ArmPlatformPkg/Bds/Bds.c' > auto-timeout to trigger. > > > > The following snippet of code shows how the timeout is created as a > event using the CreateEvent and SetTimer APIs. > > > > However I cannot the SetTimer API triggering a call to the > corresponding TimerDriverSetTimerPeriod API inside > 'ArmPkg/Drivers/TimerDxe/TimerDxe.c' > > Do you reach the gBS->SetTimer() call at all? For example, if there was a > non-volatile variable called Timeout, with value 0xFFFF or 0, that could > prevent it. Yes, via debugger tracing I can see that the gBS->SetTimer() call is indeed invoked and calls DXE Core's respective CoreTimerXXXX() APIs Regards, Bhupesh > > > > > if (Timeout != 0xFFFF) { > > if (Timeout > 0) { > > // Create the waiting events (keystroke and 1sec timer) > > gBS->CreateEvent (EVT_TIMER, 0, NULL, NULL, &WaitList[0]); > > gBS->SetTimer (WaitList[0], TimerPeriodic, > EFI_SET_TIMER_TO_SECOND); > > WaitList[1] = gST->ConIn->WaitForKey; > > > > // Start the timer > > WaitIndex = 0; > > Print(L"The default boot selection will start in "); > > while ((Timeout > 0) && (WaitIndex == 0)) { > > Print(L"%3d seconds",Timeout); > > gBS->WaitForEvent (2, WaitList, &WaitIndex); > > if (WaitIndex == 0) { > > Print(L"\b\b\b\b\b\b\b\b\b\b\b"); > > Timeout--; > > } > > } > > > > So, I just wanted to understand if the auto-timeout during boot works > > on Juno-Rev1 and if yes, how does it connect to the underlying > > ArmArchTimerLib > > > > Please help. > > > >> -----Original Message----- > >> From: Sharma Bhupesh-B45370 > >> Sent: Wednesday, June 10, 2015 4:01 PM > >> To: edk2-devel(a)lists.sourceforge.net; 'olivier.martin(a)arm.com' > >> Subject: AARCH64: Timer Dxe > >> > >> Hi Olivier, > >> > >> 1. I am looking at the 'ArmPkg/Drivers/TimerDxe/TimerDxe.c' DXE > >> driver and seeing how the timer interrupts are registered: > >> > >> // Install secure and Non-secure interrupt handlers > >> // Note: Because it is not possible to determine the security state > >> of the > >> // CPU dynamically, we just install interrupt handler for both sec > >> and non-sec > >> // timer PPI > >> Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 > >> (PcdArmArchTimerVirtIntrNum), TimerInterruptHandler); > >> ASSERT_EFI_ERROR (Status); > >> > >> Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 > >> (PcdArmArchTimerHypIntrNum), TimerInterruptHandler); > >> ASSERT_EFI_ERROR (Status); > >> > >> Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 > >> (PcdArmArchTimerSecIntrNum), TimerInterruptHandler); > >> ASSERT_EFI_ERROR (Status); > >> > >> Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 > >> (PcdArmArchTimerIntrNum), TimerInterruptHandler); > >> ASSERT_EFI_ERROR (Status); > >> > >> I wanted to understand how the Interrupt registration changes for PPI > >> or SPI interrupt sources. > >> As usually the Virtual, Hypervisor, Physical and Physical Non-Secure > >> interrupts are PPI does the PPI number need to be defined as the PCD > >> values in the same way as linux. The Linux gicv3 documentation says > >> (Documentation/devicetree/bindings/arm/gic-v3.txt): > >> > >> SPI interrupts are in the range [0-987]. PPI interrupts are in the > >> range [0-15]. > >> > >> 2. Also one related question is whether on Juno Rev1, you are able to > >> get the BootDelay to work via timer based events? If yes, can you > >> please share if you achieve this by using the ARMv8 generic timer or > >> the SP804 timer. > >> > > > > Regards, > > Bhupesh > >

10 years, 4 months

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RE: AARCH64: Timer Dxe

by Sharma Bhupesh

Hi, Can some ARM expert help me with my queries below. The overall context is that I cannot get the 'ArmPlatformPkg/Bds/Bds.c' auto-timeout to trigger. The following snippet of code shows how the timeout is created as a event using the CreateEvent and SetTimer APIs. However I cannot the SetTimer API triggering a call to the corresponding TimerDriverSetTimerPeriod API inside 'ArmPkg/Drivers/TimerDxe/TimerDxe.c' if (Timeout != 0xFFFF) { if (Timeout > 0) { // Create the waiting events (keystroke and 1sec timer) gBS->CreateEvent (EVT_TIMER, 0, NULL, NULL, &WaitList[0]); gBS->SetTimer (WaitList[0], TimerPeriodic, EFI_SET_TIMER_TO_SECOND); WaitList[1] = gST->ConIn->WaitForKey; // Start the timer WaitIndex = 0; Print(L"The default boot selection will start in "); while ((Timeout > 0) && (WaitIndex == 0)) { Print(L"%3d seconds",Timeout); gBS->WaitForEvent (2, WaitList, &WaitIndex); if (WaitIndex == 0) { Print(L"\b\b\b\b\b\b\b\b\b\b\b"); Timeout--; } } So, I just wanted to understand if the auto-timeout during boot works on Juno-Rev1 and if yes, how does it connect to the underlying ArmArchTimerLib Please help. > -----Original Message----- > From: Sharma Bhupesh-B45370 > Sent: Wednesday, June 10, 2015 4:01 PM > To: edk2-devel(a)lists.sourceforge.net; 'olivier.martin(a)arm.com' > Subject: AARCH64: Timer Dxe > > Hi Olivier, > > 1. I am looking at the 'ArmPkg/Drivers/TimerDxe/TimerDxe.c' DXE driver > and seeing how the timer interrupts are registered: > > // Install secure and Non-secure interrupt handlers > // Note: Because it is not possible to determine the security state of > the > // CPU dynamically, we just install interrupt handler for both sec and > non-sec > // timer PPI > Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 > (PcdArmArchTimerVirtIntrNum), TimerInterruptHandler); > ASSERT_EFI_ERROR (Status); > > Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 > (PcdArmArchTimerHypIntrNum), TimerInterruptHandler); > ASSERT_EFI_ERROR (Status); > > Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 > (PcdArmArchTimerSecIntrNum), TimerInterruptHandler); > ASSERT_EFI_ERROR (Status); > > Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 > (PcdArmArchTimerIntrNum), TimerInterruptHandler); > ASSERT_EFI_ERROR (Status); > > I wanted to understand how the Interrupt registration changes for PPI or > SPI interrupt sources. > As usually the Virtual, Hypervisor, Physical and Physical Non-Secure > interrupts are PPI does the PPI number need to be defined as the PCD > values in the same way as linux. The Linux gicv3 documentation says > (Documentation/devicetree/bindings/arm/gic-v3.txt): > > SPI interrupts are in the range [0-987]. PPI interrupts are in the range > [0-15]. > > 2. Also one related question is whether on Juno Rev1, you are able to get > the BootDelay to work via timer based events? If yes, can you please > share if you achieve this by using the ARMv8 generic timer or the SP804 > timer. > Regards, Bhupesh

10 years, 4 months

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boot over nfs;

by vladi solov

Hello i am trying to boot linaro(12.11) filesystem over nfs on my soc; Configured the tftp/dhcp/nfs-export/ + recompiled the kernel with nfs_root and practically have the system working with other root fileSystem; Have some problem to boot on linaro fs over nfs; any help will be appreciated; Current error i got is after kernel booting and succeeded to mount the fs: .... VFS: Mounted root (nfs filesystem) on device 0:11. Freeing unsued kernel memory... init: ureadahead main process (596) terminated with status 5 then it hang forever...pls advice... thnks vlad

10 years, 9 months

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AARCH64 UEFI and EL3

by bhupesh.sharma＠freescale.com

Hi, The current AARCH64 UEFI is designed to run entirely in EL2 with the assumption that the ARM Trusted FW (ATF) running in EL3 and launching UEFI in EL2. As a result if we try to use the UEFI bootloader as a bare-metal debug tool (w/o the ATF, BootROM and so on..), we get an assertion failure in ArmConfigureMmu call (PEI phase). "UEFI should not run in EL3". However when I look at 'ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S', I see some function implementations support UEFI running in EL3... ASM_PFX(ArmSetTTBR0): EL1_OR_EL2_OR_EL3(x1) 1:msr ttbr0_el1, x0 // Translation Table Base Reg 0 (TTBR0) b 4f 2:msr ttbr0_el2, x0 // Translation Table Base Reg 0 (TTBR0) b 4f 3:msr ttbr0_el3, x0 // Translation Table Base Reg 0 (TTBR0) 4:isb ret ...But others in the same file, don't seem to support UEFI running in EL3: ASM_PFX(ArmGetTTBR0BaseAddress): EL1_OR_EL2(x1) 1:mrs x0, ttbr0_el1 b 3f 2:mrs x0, ttbr0_el2 3:LoadConstantToReg(0xFFFFFFFFFFFF, x1) /* Look at bottom 48 bits */ and x0, x0, x1 isb ret Does UEFI provide some placeholders to make vendor specific changes in the SEC or PEI phase to enable execution in EL3 mode? Last I gathered from the discussions on the UEFI mailing lists, it seems that the some changes in PEI specs is required to accommodate ARM Trusted Firmware (ATF) and UEFI running in EL2. Where can I get more information on the same Regards, Bhupesh

11 years, 3 months

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[HOWTO] Implement / Validate / Debug / Tune UEFI Runtime drivers

by Olivier Martin

I have just finished to write a wikipage to help people to implement and debug UEFI Runtime drivers based on the Tianocore project (Open Source implementation of the UEFI spec). To validate the UEFI Runtime drivers, I have been using the Linux kernel with EFI Stub support (https://wiki.linaro.org/LEG/Engineering/Kernel/UEFI/EFIstub): Linux kernel available here: https://git.linaro.org/people/leif.lindholm/linux.git/shortlog/refs/heads/ue fi-for-next The wikipage: https://sourceforge.net/apps/mediawiki/tianocore/index.php?title=ArmPkg/Runt ime

11 years, 6 months

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Tianocore now supports Android FastBoot

by Olivier Martin

Dear all, Android FastBoot support has been added to Tianocore into SVN 15317 (2014-03-05). Android Fastboot is a protocol to update the flash and/or boot filesystem on Android devices from a host over USB. The fastboot utility is part of the Android SDK. This support is architecture independent. An abstraction layer has been added to allow devices that do not have USB client support to use another transport mechanism (eg: TCP). We actually have support internally for this TCP transport layer we are planning to send upstream soon (after the internal review has been completed). These patches are available on request. The support has been validated on ARM Versatile Express using USB (and ethernet). A tutorial is available here: http://sourceforge.net/apps/mediawiki/tianocore/index.php?title=EmbeddedPkg/ AndroidFastBoot Regards, Olivier

11 years, 7 months

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Re: [edk2] ARM UEFI BIOS & Trusted firmware (SMM / Trustzone similitudes)

by Andrew fish

Eugene and I usually attend, and it is Andrew Sloss running it on the ARM side. Sent from my iPhone > On Dec 6, 2013, at 2:14 PM, "Pant, Alok" <Alok.Pant(a)amd.com> wrote: > > >>. But as suggested Eugene, a discussion can be started in the UEFI Forum working groups. ABST (ARM Binding Sub-Team) might be a good place to get the initial feedbacks. > Hi Olivier, > Thanks. Would you be able to bring this to ABST? Or what do you suggest the next steps? > > From: Olivier Martin [mailto:olivier.martin@arm.com] > Sent: Friday, December 06, 2013 2:05 PM > To: Pant, Alok; Cohen, Eugene; 'Tim Lewis'; edk2-devel(a)lists.sourceforge.net > Cc: boot-architecture(a)lists.linaro.org > Subject: RE: ARM UEFI BIOS & Trusted firmware (SMM / Trustzone similitudes) > > I have not necessary got the background and the full picture of the industry in term of production firmware compare to some of you. But I have tried to give some answers to your questions. > > # Alok, two directions for Secure Monitor implementation? > The ARM recommendation is everything concerning secure world (EL3, Secure-EL1, Secure-EL0) should be implemented as part of the Trusted Firmware project. > ArmPlatformPkg/Sec has been ported to AArch64 as a temporary solution while waiting for an appropriate Trusted Firmware implementation. There is no plan to have a Secure Monitor implementation (BL31) in Tianocore project. > And I will not accept any patch that implements such feature in Tianocore. The reason is I do not think it is good thing to duplicate code between both projects supported by ARM. And the Trusted Firmware project is a better place for such features. > > # Alok, some implementation starts the Trusted Firmware (in EL3) that launches SEC in El1/2 mode > ArmPlatformPkg/Sec should not run in EL2/EL1. As I said earlier, this is only a temporary solution that should be replaced by the Trusted Firmware project on most ARMv8 platforms. > The Trusted Firmware should launch UEFI that starts with either ArmPlatformPkg/PrePeiCore (if the UEFI firmware in XIP ROM) or ArmPlatformPkg/PrePi (if the UEFI firmware is started from DRAM). > > # Alok, Should secure monitor (bl31) be launched before or during SEC phase? > Secure Monitor (BL31) is one of the first components loaded by the Trusted Firmware. The Secure Monitor will be available before the UEFI firmware starts. > > # Alok/Eugene, Extending the PI SMM specification (Volume 4) for Trustzone > I had a look at the SMM PI spec. I can see a lot of similitude to the UEFI spec (an architecture and implementation agnostic interface). > I can also see some similitude between SMM and Trustzone technology (based on the ARM Secure Extension). And I am sure some SMM drivers will be ported to ARM Secure components (eg: authentification variable for secure boot). > > One notable difference between SMM and ‘Trustzone’ is the initialization. SMM seems to be initialized during the DXE phase while the ARM Secure/Trusted environment is initialized prior to start the Non Secure/Non Trusted environment (including UEFI, u-boot bootloaders). And I do not see this initialization phase to be changed for the reason that the secure environment (Trusted Firmware, Trusted OS, SiP/ODM/OEM secure components) will setup the appropriate hardware privileges and initialize their environment prior to switch to the Non-Secure environment. > > The concept of ‘extending the PI SMM spec to Trustzone’ or 'some form of SMM foundation glue code' is interesting. But it might be difficult to implement in the current situation (most of the solutions seem to be highly integrated without much interoperability). The level of standardization of the Secure/Trusted environment has not reached the API yet. > Obviously, to create a standard an initiative has to be started. I am probably not the best person (due to my limited knowledge of SMM and their real use cases) to start this initiative. But as suggested Eugene, a discussion can be started in the UEFI Forum working groups. ABST (ARM Binding Sub-Team) might be a good place to get the initial feedbacks. > > # Tim, What happens when the secure OS is performing a secure task, but the other OS asks for a shutdown? > As you know PSCI (Power State Coordination Interface) is recommended by ARM for OS Power Management (OSPM). In this case, the Secure world is aware of the shutdown. > But the PSCI spec says 'a Trusted OS must not rely on the use of any notification, and must be resistant to any sudden loss of context'. > Trusted OS vendors are expected to provide a Rich OS driver to invoke their services. There are probably ways to signal a Rich OS shutdown to the Trusted OS using this driver. > > Thanks, > Olivier > > > From: Pant, Alok [mailto:Alok.Pant@amd.com] > Sent: 05 December 2013 18:08 > To: edk2-devel(a)lists.sourceforge.net; Olivier Martin > Subject: RE: ARM UEFI BIOS & Trusted firmware > > Hi Tim & Eugene, > Thanks for the response. I agree current SMM foundation code gas some IA specific and there are various gotchas around SMM entry/exit (sync core , save restore etc, base protocol), however most of SMM foundation is generic and it provides a nice framework of independent driver and interaction via protocol and use common services; granted the DXE SMMipl role of launching and building initial SMM environment does not mesh well on ARM. In parallel there is separate work on ARM trusted firmware and seems there is no common ground between two. I am very must interested to hear how others are attempting to address such feature porting issue and the direction from industry toward runtime EL3 support (single monolithic TF binary+some proprietary form of RTOS “vs.” attempt to integrate UEFI SMM with trusted fw core). I am sure I am not the first one stumbling on this question and seeking how others attempted to solve the above and if this a broader issue that need to be further discussed in this forum. > > Thanks > -Alok > > > > From: Tim Lewis [mailto:tim.lewis@insyde.com] > Sent: Thursday, December 05, 2013 11:39 AM > To: edk2-devel(a)lists.sourceforge.net; olivier.martin(a)arm.com > Subject: Re: [edk2] ARM UEFI BIOS & Trusted firmware > > Eugene – > > One of the issues for the SMM specification and TZ is the single-threaded nature. While most of ARM’s TrustZone infrastructure can be mapped easily to SMM, the possibility of having cores in TZ and out of TZ simultaneously, or more than one core in TZ at the same time raises some interesting issues (resource contention, etc.) > > Tim > > From: Cohen, Eugene [mailto:eugene@hp.com] > Sent: Thursday, December 05, 2013 9:29 AM > To: edk2-devel(a)lists.sourceforge.net; olivier.martin(a)arm.com > Subject: Re: [edk2] ARM UEFI BIOS & Trusted firmware > > Alok, > > I agree -- there is value in the modular nature of the PI component approach extending to the ARM trusted firmware environment. > > For SMM this is supported in the PI spec’s SMM core interface specification and in edk2 by the PiSmmCore module and accompanying libraries. Unlike DXE and PEI, the SMM core, at least in name, is IA-specific as it refers to SMM, SMIs, SMRAM, etc. When you look past the names though you can see that the functions it is providing is really architecture independent -- IO protocols, secure memory allocation, protocol management, and handler registration. Given the current IA-specific naming, it would be difficult to recommend that ARM should simply adopt the “SMM” core architecture for the TZ/EL3/SecureMonitor implementation. > > Perhaps this should be raised in the PI working group, specifically “is the SMM core interface spec really an IA-specific concept or something that should become architecture agnostic?” > > Eugene > > From: Pant, Alok [mailto:Alok.Pant@amd.com] > Sent: Thursday, December 05, 2013 8:42 AM > To: edk2-devel(a)lists.sourceforge.net; olivier.martin(a)arm.com > Subject: [edk2] ARM UEFI BIOS & Trusted firmware > > Changing topic.. > > Hi Oliver, Thanks. I also I have few separate questions wrt to Trusted firmware & UEFI ARM code and hope you/others can help answer > > · It seems there are two direction for SecureMonitor implementation. In one implementation the SEC code (ArmPlatformPkg\Sec\Sec.c) install the secure monitor ( when SEC start in El3) ; In other implementation the Trusted firmware start first install secure monitor (bl31) and launch SEC in El1/2 mode. My question is what is the preferred direction when both are possible? Should secure monitor (bl31) be launched before or during SEC phase? > · Historically in x86 implementation the SMM mode hosts various runtime platform BIOS driver for feature such as authentication variable (for secure boot), platform runtime handing handling etc. EDKII has a good framework for SMM kernel and loading various independent SMM driver and interaction among those driver via protocol etc. In ARM based UEFI/Trusted firmware implementation what may be preferred way to deal with such need. Should all those UEFI SMM driver be ported to Trusted firmware which "today" is in primitive framework compare to SMM EDKII foundation code, or some form of SMM foundation can gel with trusted firmware design to allow independent platform el3 code be developed at independent driver. Curious how others have attempted to solve this problem and if there can be standard way for all of us to adopt here. Before creating yet another method I was hoping to hear from experts on any common ground for such feature implementation > > Thanks again for all your help and comments > -Alok > > -----Original Message----- > From: Olivier Martin [mailto:olivier.martin@arm.com] > Sent: Wednesday, December 04, 2013 7:40 AM > To: TigerLiu(a)viatech.com.cn; edk2-devel(a)lists.sourceforge.net > Subject: Re: [edk2] SEC code support big.LITTLE tech? > > Hi Tiger, > > The ARM recommendation to manage secondary CPUs (the primary CPU is the CPU that runs UEFI and starts your OS kernel) is to use PSCI (Power State Coordination Interface - http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0022b/index.h > tml). > PSCI uses SMCs (Secure Memory Calls) to bring up secondary CPUs (CPU_UP / CPU_DOWN). This code runs in Secure World while UEFI runs in Non-Secure World. > > For the story... I started to implement PSCI support in Tianocore source code (in ArmPlatformPkg/Sec). But the EDK2 framework (PCD/Library/INF/FDF > etc) had made the code quite hard to maintain. > So, I wrote a new secure firmware framework project to handle this support. > This firmware is not Open Source (available in binary format for TC2 only). > A new project has been started by ARM Ltd last month. It is an Open Source implementation of the Trusted/Secure Firmware: > https://github.com/ARM-software/arm-trusted-firmware > Unfortunately at this stage, 32bit is not supported (only AArch64 is supported). And as far as I know there is no plan to add 32bit support by ARM Ltd in the short term. > > The current ArmPlatformPkg/Sec has support to hold the secondary cores in WFI. But it does not support PSCI. The current support might be sufficient enough for you at this stage. > > Thanks, > Olivier > > > -----Original Message----- > > From: TigerLiu(a)viatech.com.cn [mailto:TigerLiu@viatech.com.cn] > > Sent: 04 December 2013 01:51 > > To: edk2-devel(a)lists.sourceforge.net > > Cc: Olivier Martin > > Subject: [edk2] SEC code support big.LITTLE tech? > > > > Hi, Oliver: > > Does current ArmPlatformPackage's sec code support big.LITTLE tech? > > Such as : > > An ARM SOC --- with 4 Cores Cortex-A15, 4 Cores Cortex-A7 > > > > So, if sec code support big.LITTLE tech, how does it let one core as > > boot strap cpu, others go into wfe(or other sleeping state)? > > > > Best wishes, > > > > > > ------------------------------------------------------------------------------ > Sponsored by Intel(R) XDK > Develop, test and display web and hybrid apps with a single code base. > Download it for free now! > http://pubads.g.doubleclick.net/gampad/clk?id=111408631&iu=/4140/ostg.clktrk > _______________________________________________ > edk2-devel mailing list > edk2-devel(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/edk2-devel > > > ------------------------------------------------------------------------------ > Sponsored by Intel(R) XDK > Develop, test and display web and hybrid apps with a single code base. > Download it for free now! > http://pubads.g.doubleclick.net/gampad/clk?id=111408631&iu=/4140/ostg.clktrk > _______________________________________________ > edk2-devel mailing list > edk2-devel(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/edk2-devel

11 years, 11 months

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RE: ARM UEFI BIOS & Trusted firmware (SMM / Trustzone similitudes)

by Olivier Martin

I have not necessary got the background and the full picture of the industry in term of production firmware compare to some of you. But I have tried to give some answers to your questions. # Alok, two directions for Secure Monitor implementation? The ARM recommendation is everything concerning secure world (EL3, Secure-EL1, Secure-EL0) should be implemented as part of the Trusted Firmware project. ArmPlatformPkg/Sec has been ported to AArch64 as a temporary solution while waiting for an appropriate Trusted Firmware implementation. There is no plan to have a Secure Monitor implementation (BL31) in Tianocore project. And I will not accept any patch that implements such feature in Tianocore. The reason is I do not think it is good thing to duplicate code between both projects supported by ARM. And the Trusted Firmware project is a better place for such features. # Alok, some implementation starts the Trusted Firmware (in EL3) that launches SEC in El1/2 mode ArmPlatformPkg/Sec should not run in EL2/EL1. As I said earlier, this is only a temporary solution that should be replaced by the Trusted Firmware project on most ARMv8 platforms. The Trusted Firmware should launch UEFI that starts with either ArmPlatformPkg/PrePeiCore (if the UEFI firmware in XIP ROM) or ArmPlatformPkg/PrePi (if the UEFI firmware is started from DRAM). # Alok, Should secure monitor (bl31) be launched before or during SEC phase? Secure Monitor (BL31) is one of the first components loaded by the Trusted Firmware. The Secure Monitor will be available before the UEFI firmware starts. # Alok/Eugene, Extending the PI SMM specification (Volume 4) for Trustzone I had a look at the SMM PI spec. I can see a lot of similitude to the UEFI spec (an architecture and implementation agnostic interface). I can also see some similitude between SMM and Trustzone technology (based on the ARM Secure Extension). And I am sure some SMM drivers will be ported to ARM Secure components (eg: authentification variable for secure boot). One notable difference between SMM and 'Trustzone' is the initialization. SMM seems to be initialized during the DXE phase while the ARM Secure/Trusted environment is initialized prior to start the Non Secure/Non Trusted environment (including UEFI, u-boot bootloaders). And I do not see this initialization phase to be changed for the reason that the secure environment (Trusted Firmware, Trusted OS, SiP/ODM/OEM secure components) will setup the appropriate hardware privileges and initialize their environment prior to switch to the Non-Secure environment. The concept of 'extending the PI SMM spec to Trustzone' or 'some form of SMM foundation glue code' is interesting. But it might be difficult to implement in the current situation (most of the solutions seem to be highly integrated without much interoperability). The level of standardization of the Secure/Trusted environment has not reached the API yet. Obviously, to create a standard an initiative has to be started. I am probably not the best person (due to my limited knowledge of SMM and their real use cases) to start this initiative. But as suggested Eugene, a discussion can be started in the UEFI Forum working groups. ABST (ARM Binding Sub-Team) might be a good place to get the initial feedbacks. # Tim, What happens when the secure OS is performing a secure task, but the other OS asks for a shutdown? As you know PSCI (Power State Coordination Interface) is recommended by ARM for OS Power Management (OSPM). In this case, the Secure world is aware of the shutdown. But the PSCI spec says 'a Trusted OS must not rely on the use of any notification, and must be resistant to any sudden loss of context'. Trusted OS vendors are expected to provide a Rich OS driver to invoke their services. There are probably ways to signal a Rich OS shutdown to the Trusted OS using this driver. Thanks, Olivier From: Pant, Alok [mailto:Alok.Pant@amd.com] Sent: 05 December 2013 18:08 To: edk2-devel(a)lists.sourceforge.net; Olivier Martin Subject: RE: ARM UEFI BIOS & Trusted firmware Hi Tim & Eugene, Thanks for the response. I agree current SMM foundation code gas some IA specific and there are various gotchas around SMM entry/exit (sync core , save restore etc, base protocol), however most of SMM foundation is generic and it provides a nice framework of independent driver and interaction via protocol and use common services; granted the DXE SMMipl role of launching and building initial SMM environment does not mesh well on ARM. In parallel there is separate work on ARM trusted firmware and seems there is no common ground between two. I am very must interested to hear how others are attempting to address such feature porting issue and the direction from industry toward runtime EL3 support (single monolithic TF binary+some proprietary form of RTOS "vs." attempt to integrate UEFI SMM with trusted fw core). I am sure I am not the first one stumbling on this question and seeking how others attempted to solve the above and if this a broader issue that need to be further discussed in this forum. Thanks -Alok From: Tim Lewis [mailto:tim.lewis@insyde.com] Sent: Thursday, December 05, 2013 11:39 AM To: edk2-devel(a)lists.sourceforge.net; olivier.martin(a)arm.com Subject: Re: [edk2] ARM UEFI BIOS & Trusted firmware Eugene - One of the issues for the SMM specification and TZ is the single-threaded nature. While most of ARM's TrustZone infrastructure can be mapped easily to SMM, the possibility of having cores in TZ and out of TZ simultaneously, or more than one core in TZ at the same time raises some interesting issues (resource contention, etc.) Tim From: Cohen, Eugene [mailto:eugene@hp.com] Sent: Thursday, December 05, 2013 9:29 AM To: edk2-devel(a)lists.sourceforge.net; olivier.martin(a)arm.com Subject: Re: [edk2] ARM UEFI BIOS & Trusted firmware Alok, I agree -- there is value in the modular nature of the PI component approach extending to the ARM trusted firmware environment. For SMM this is supported in the PI spec's SMM core interface specification and in edk2 by the PiSmmCore module and accompanying libraries. Unlike DXE and PEI, the SMM core, at least in name, is IA-specific as it refers to SMM, SMIs, SMRAM, etc. When you look past the names though you can see that the functions it is providing is really architecture independent -- IO protocols, secure memory allocation, protocol management, and handler registration. Given the current IA-specific naming, it would be difficult to recommend that ARM should simply adopt the "SMM" core architecture for the TZ/EL3/SecureMonitor implementation. Perhaps this should be raised in the PI working group, specifically "is the SMM core interface spec really an IA-specific concept or something that should become architecture agnostic?" Eugene From: Pant, Alok [mailto:Alok.Pant@amd.com] Sent: Thursday, December 05, 2013 8:42 AM To: edk2-devel(a)lists.sourceforge.net; olivier.martin(a)arm.com Subject: [edk2] ARM UEFI BIOS & Trusted firmware Changing topic.. Hi Oliver, Thanks. I also I have few separate questions wrt to Trusted firmware & UEFI ARM code and hope you/others can help answer . It seems there are two direction for SecureMonitor implementation. In one implementation the SEC code (ArmPlatformPkg\Sec\Sec.c) install the secure monitor ( when SEC start in El3) ; In other implementation the Trusted firmware start first install secure monitor (bl31) and launch SEC in El1/2 mode. My question is what is the preferred direction when both are possible? Should secure monitor (bl31) be launched before or during SEC phase? . Historically in x86 implementation the SMM mode hosts various runtime platform BIOS driver for feature such as authentication variable (for secure boot), platform runtime handing handling etc. EDKII has a good framework for SMM kernel and loading various independent SMM driver and interaction among those driver via protocol etc. In ARM based UEFI/Trusted firmware implementation what may be preferred way to deal with such need. Should all those UEFI SMM driver be ported to Trusted firmware which "today" is in primitive framework compare to SMM EDKII foundation code, or some form of SMM foundation can gel with trusted firmware design to allow independent platform el3 code be developed at independent driver. Curious how others have attempted to solve this problem and if there can be standard way for all of us to adopt here. Before creating yet another method I was hoping to hear from experts on any common ground for such feature implementation Thanks again for all your help and comments -Alok -----Original Message----- From: Olivier Martin [mailto:olivier.martin@arm.com] Sent: Wednesday, December 04, 2013 7:40 AM To: TigerLiu(a)viatech.com.cn; edk2-devel(a)lists.sourceforge.net Subject: Re: [edk2] SEC code support big.LITTLE tech? Hi Tiger, The ARM recommendation to manage secondary CPUs (the primary CPU is the CPU that runs UEFI and starts your OS kernel) is to use PSCI (Power State Coordination Interface - http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0022b/index.h tml). PSCI uses SMCs (Secure Memory Calls) to bring up secondary CPUs (CPU_UP / CPU_DOWN). This code runs in Secure World while UEFI runs in Non-Secure World. For the story... I started to implement PSCI support in Tianocore source code (in ArmPlatformPkg/Sec). But the EDK2 framework (PCD/Library/INF/FDF etc) had made the code quite hard to maintain. So, I wrote a new secure firmware framework project to handle this support. This firmware is not Open Source (available in binary format for TC2 only). A new project has been started by ARM Ltd last month. It is an Open Source implementation of the Trusted/Secure Firmware: https://github.com/ARM-software/arm-trusted-firmware Unfortunately at this stage, 32bit is not supported (only AArch64 is supported). And as far as I know there is no plan to add 32bit support by ARM Ltd in the short term. The current ArmPlatformPkg/Sec has support to hold the secondary cores in WFI. But it does not support PSCI. The current support might be sufficient enough for you at this stage. Thanks, Olivier > -----Original Message----- > From: TigerLiu(a)viatech.com.cn [mailto:TigerLiu@viatech.com.cn] > Sent: 04 December 2013 01:51 > To: edk2-devel(a)lists.sourceforge.net > Cc: Olivier Martin > Subject: [edk2] SEC code support big.LITTLE tech? > > Hi, Oliver: > Does current ArmPlatformPackage's sec code support big.LITTLE tech? > Such as : > An ARM SOC --- with 4 Cores Cortex-A15, 4 Cores Cortex-A7 > > So, if sec code support big.LITTLE tech, how does it let one core as > boot strap cpu, others go into wfe(or other sleeping state)? > > Best wishes, ---------------------------------------------------------------------------- -- Sponsored by Intel(R) XDK Develop, test and display web and hybrid apps with a single code base. Download it for free now! http://pubads.g.doubleclick.net/gampad/clk?id=111408631 <http://pubads.g.doubleclick.net/gampad/clk?id=111408631&iu=/4140/ostg.clktr k> &iu=/4140/ostg.clktrk _______________________________________________ edk2-devel mailing list edk2-devel(a)lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/edk2-devel

11 years, 11 months

1
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Re: ARM/BDS: skip initrd if not found

by Ryan Harkin

On 26 November 2013 11:43, Olivier Martin <olivier.martin(a)arm.com> wrote: > Hi Ryan/Leif, > > > > I was initially happy enough with the solution #4 and wanted to push your > change to SVN. And yes, I can only be agree on the fact the EFI stub is the > way we want to go to boot Linux kernel on a UEFI system. > > But I am not sure how the EFI stub will solve your problem. > > Even with the EFI stub, you will still need to change you Continuous > Integration Infrastructure to start the Linux kernel with different > parameters for Android/Ubuntu/OpenEmbedded > > > > So, it looks the only solution is #1. > > I do not mind to push your patch, but that will not help you in the future > neither. > I don't think ARM/BDS (and this patch) will be at all related to how the boards are booted by whatever LEG use in the future. I think the intention is that LEG provide something to *replace* ARM/BDS, not something that uses it. So I guess my patch is only relevant for those who use ARM/BDS. > > > Thanks, > > Olivier > > > > > > From: Ryan Harkin [mailto:ryan.harkin@linaro.org] > Sent: 19 November 2013 11:23 > To: Leif Lindholm > Cc: boot-architecture(a)lists.linaro.org; edk2-devel(a)lists.sourceforge.net; > Olivier Martin; Steven Kinney > Subject: Re: ARM/BDS: skip initrd if not found > > > > > > > > On 19 November 2013 10:34, Leif Lindholm <leif.lindholm(a)linaro.org> wrote: > > Hi Ryan, > > > On Tue, Nov 19, 2013 at 08:30:25AM +0000, Ryan Harkin wrote: > > Hi Olivier/Steve/Leif/whoever is interested, > > > > I have a problem I'm trying to solve and I don't think there is a proper > > solution using the current ARM BDS. > > > > > Basically, some of Linaro's releases are failing to boot "out of the > > box" due to incorrect default BDS config. The default assumes that > the > > > image has an initrd. > > > > Android (the main focus of our releases) and Ubuntu images use an initrd. > > OpenEmbedded images do not. > > > > I'd like a single UEFI binary that can work on all three without > > reconfiguration. > > > > The obvious solutions are: > > 1) there is no default config that always works and the user should > configure > > the board > > themselves each time they want to boot a different image type. > > Our LAVA automated test environment and people like myself who boot > test > > many images > > daily don't favour this option. > > > > 2) change OpenEmbedded to use an initrd > > It's not my image to change and the owners don't want to do that > because > > it's also wrong. > > > > 3) Have different UEFI binaries for each image type > > This isn't ideal because I (and LAVA) would be forever reflashing > UEFI. > > > > 4) Make BDS continue if it can't load the initrd > > This isn't ideal because if there is no initrd, it could be for a bad > > reason. By continuing, we > > aren't giving the user the change to immediately correct the config. > > However, the likelihood of the initrd being completely missing, whilst > a > > valid kernel and FDT > > is provided seems slim. If it is missing, it's most likely on > purpose. > > > > Of the options above, I prefer #4 and have provided a patch below for > > discussion. I suspect that if it's not going to cause other problems, it > could > > be like my other BDS hacks, fixes and improvements and only live in the > Linaro > > tree, which would be fine with me too. > > > > Opinions on a way forward and/or this patch? > > Medium-term, I would say that the correct thing to do will be to simply > use the UEFI stub loader version of the kernel image. But you may not > want to take on the tediousness of having to sync this not-yet-upstream > patchset across the various kernel branches things will build from for > each new release until this code does go upstream? > > > > I agree, moving to a proper boot solution is the end goal. But a lot of > that end-goal is out of my control/domain, so I'm hacking what I have to > make it more usable until the cool stuff hits mainline. > > > > I would say that the solution your patch introduces is wrong, but it is > less wrong than the current situation - so I have no fundamental > objection. > > > > I agree, it's not ideal, but as you say, it's less wrong. > > > > If we wanted to keep the built-in Linux loader, I would say that the > correct fix would be to add a "has initrd" property, or a NULL string > chack for the path. But we don't, so we shouldn't spend time trying to > to improve a way too old stop-gap solution. > > > > The initrd can be configured out in the default config, so UEFI does not > attempt to even load it. However, in that case, a single UEFI binary's > default config will fail to load an Android or Ubuntu image, because they > need an initrd. > > Really, I'm working around the fact that we cannot provide a config to BDS; > the config either has to be initialised by the UEFI binary or hand edited > by > the user. If we had that feature, each image (Android, Ubuntu, OE) could > provide a config that it knew would work. > > > > > / > Leif > > p.s. > The built-in Linux loader delenda est! > > > > Yes please :-) > > > _______________________________________________ > boot-architecture mailing list > boot-architecture(a)lists.linaro.org > http://lists.linaro.org/mailman/listinfo/boot-architecture >

11 years, 11 months

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ARM/BDS: skip initrd if not found

by Ryan Harkin

Hi Olivier/Steve/Leif/whoever is interested, I have a problem I'm trying to solve and I don't think there is a proper solution using the current ARM BDS. Basically, some of Linaro's releases are failing to boot "out of the box" due to incorrect default BDS config. The default assumes that the image has an initrd. Android (the main focus of our releases) and Ubuntu images use an initrd. OpenEmbedded images do not. I'd like a single UEFI binary that can work on all three without reconfiguration. The obvious solutions are: 1) there is no default config that always works and the user should configure the board themselves each time they want to boot a different image type. Our LAVA automated test environment and people like myself who boot test many images daily don't favour this option. 2) change OpenEmbedded to use an initrd It's not my image to change and the owners don't want to do that because it's also wrong. 3) Have different UEFI binaries for each image type This isn't ideal because I (and LAVA) would be forever reflashing UEFI. 4) Make BDS continue if it can't load the initrd This isn't ideal because if there is no initrd, it could be for a bad reason. By continuing, we aren't giving the user the change to immediately correct the config. However, the likelihood of the initrd being completely missing, whilst a valid kernel and FDT is provided seems slim. If it is missing, it's most likely on purpose. Of the options above, I prefer #4 and have provided a patch below for discussion. I suspect that if it's not going to cause other problems, it could be like my other BDS hacks, fixes and improvements and only live in the Linaro tree, which would be fine with me too. Opinions on a way forward and/or this patch? Regards, Ryan. note: the patch looks a little larger than it should because I had to indent the section beginning with the comment "// Check if the initrd is a uInitrd", although that section is unmodified otherwise. >From aaec8cb3f386a9a128f57a2d0fcbb4396a101ec4 Mon Sep 17 00:00:00 2001 From: Ryan Harkin <ryan.harkin(a)linaro.org> Date: Tue, 19 Nov 2013 08:10:00 +0000 Subject: [PATCH] ARM/BDS: skip initrd if not found When loading a Linux image, if the initrd is not found, we will display an error, but attempt to load the kernel anyway. Previous behaviour dropped the user back to the menu, thus allowing them to update the config. However, this does not suit booting in automated environments where test images may or may not have an initrd. Example, Ubuntu and Android images require an initrd; OpenEmbedded images do not. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ryan Harkin <ryan.harkin(a)linaro.org> --- ArmPkg/Library/BdsLib/Arm/BdsLinuxLoader.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/ArmPkg/Library/BdsLib/Arm/BdsLinuxLoader.c b/ArmPkg/Library/BdsLib/Arm/BdsLinuxLoader.c index d0eb075..d2a161a 100644 --- a/ArmPkg/Library/BdsLib/Arm/BdsLinuxLoader.c +++ b/ArmPkg/Library/BdsLib/Arm/BdsLinuxLoader.c @@ -258,19 +258,20 @@ BdsBootLinuxFdt ( Status = BdsLoadImage (InitrdDevicePath, AllocateAnyPages, &InitrdImageBase, &InitrdImageBaseSize); } if (EFI_ERROR(Status)) { - Print (L"ERROR: Did not find initrd image.\n"); - goto EXIT_FREE_LINUX; - } - - // Check if the initrd is a uInitrd - if (*(UINT32*)((UINTN)InitrdImageBase) == LINUX_UIMAGE_SIGNATURE) { - // Skip the 64-byte image header - InitrdImage = (EFI_PHYSICAL_ADDRESS)((UINTN)InitrdImageBase + 64); - InitrdImageSize = InitrdImageBaseSize - 64; - } else { - InitrdImage = InitrdImageBase; - InitrdImageSize = InitrdImageBaseSize; + Print (L"ERROR: Did not find initrd image, you may need to update your config. Attempting to continue without it.\n"); + InitrdImageBase = 0; } + else { + // Check if the initrd is a uInitrd + if (*(UINT32*)((UINTN)InitrdImageBase) == LINUX_UIMAGE_SIGNATURE) { + // Skip the 64-byte image header + InitrdImage = (EFI_PHYSICAL_ADDRESS)((UINTN)InitrdImageBase + 64); + InitrdImageSize = InitrdImageBaseSize - 64; + } else { + InitrdImage = InitrdImageBase; + InitrdImageSize = InitrdImageBaseSize; + } + } } // Load the FDT binary from a device path. The FDT will be reloaded later to a more appropriate location for the Linux kernel. @@ -299,7 +300,6 @@ EXIT_FREE_INITRD: gBS->FreePages (InitrdImageBase, EFI_SIZE_TO_PAGES (InitrdImageBaseSize)); } -EXIT_FREE_LINUX: gBS->FreePages (LinuxImage, EFI_SIZE_TO_PAGES (LinuxImageSize)); return Status; -- 1.7.9.5

11 years, 11 months

3
3
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SerialPrint not working in DxeServicesLib.c

by Bhupesh Sharma

Hi List, I am experiencing a Data Abort inside function 'GetSectionFromAnyFv' in file 'DxeServicesLib.c' on my ARMv7 UEFI platform. To debug the same I added some print messages like: /* Added for debugging */ CHAR8 Buffer1[100]; UINTN CharCount; CharCount = AsciiSPrint (Buffer1,sizeof (Buffer1),"Inside Func\n\r"); SerialPortWrite ((UINT8 *) Buffer1, CharCount); And also something like: SerialPrint ("Inside Func\n\r"); I have included: #include <Library/PrintLib.h> #include <Library/SerialPortLib.h> and defined: #define SerialPrint(txt) SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1); I still cannot see any debug prints on the UART (placed right after the entry point of 'GetSectionFromAnyFv' function). Debugger (DS-5) suggests that the crash is inside 'GetSectionFromAnyFv' itself. I get the UEFI firmware <version xx built at xx on xx) and Data Abort Exception PC at xx prints on the console, but no prints from 'DxeServicesLib.c' Any pointers to what I may be missing here. Regards, Bhupesh

11 years, 11 months

2
1
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UEFI SCT few queries

by Prabhakar Kushwaha

Hi List, I am new to UEFI and exploring about SCT. I have very basic question regarding SCT. 1) In order to use SCT in an organization, do we require any special license? 2) Looks like SCT compliance testing is only internal to an organization. We don't require to publish its details outside of the organization? 3) If anyone want to contribute to SCT test cases. Which forum/list he/she can be used? Please guide me. Regards, Prabhakar

12 years

1
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Re: [edk2] Debugging Sec and PI phases {Source symbols}

by Prabhakar Kushwaha

Hi Oliver, at very early stage UEFI firmware is present in DRAM. with DDR mapped from 0x90000000 size 512MB. while running source Z:\....\cmd_load_symbols.py -f (0x90001000,0x20000000) -a -v, I am getting following error Add symbols of /home/<...>/edk2/MyBuild/Board/DEBUG_ARMGCC/ARM/ArmPlatformPkg/PrePi/PeiUniCore/DEBUG/ArmPlatformPrePiUniCore.dll at 0x90001180 Warning: not possible to load symbols from /home/..../edk2/Build/MyBoard/DEBUG_ARMGCC/ARM/ArmPlatformPkg/PrePi/PeiUniCore/DEBUG/ArmPlatformPrePiUniCore.dll at 0x90001180 Note: no symbols have been found in System Memory (possible cause: the UEFI permanent memory has been installed yet) Also FDF file has following entries [FD.MyBoard_EFI] BaseAddress = 0x90001000|gArmTokenSpaceGuid.PcdFdBaseAddress #The base address of the DDR Device. Size = 0x20000000|gArmTokenSpaceGuid.PcdFdSize #The size in bytes of the DDR Device ErasePolarity = 1 BlockSize = 0x00001000 NumBlocks = 0x20000 Regards, Prabhakar On 10/23/2013 03:22 PM, Olivier Martin wrote: > To parse your FV file (embedded in your FD file), you can use > './BaseTools/BinWrappers/PosixLike/VolInfo <location of your FV file>' > > If you want to debug the early stage of your UEFI boot process, you can only > use (you do not need -m (...,...)): > source edk2/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py -f (..,...) -a -v > > At the early stage of the boot, the UEFI firmware has not loaded its > binaries into DRAM yet. > The UEFI System Table will not be found in System Memory. > > Where your UEFI firmware lives when started? In DRAM or in Flash/ROM memory? > >> -----Original Message----- >> From: Sharma Bhupesh-B45370 [mailto:B45370@freescale.com] >> Sent: 23 October 2013 06:33 >> To: Olivier Martin; edk2-devel(a)lists.sourceforge.net; 'Andrew Fish' >> Cc: 'Kim Phillips'; boot-architecture(a)lists.linaro.org; Kushwaha >> Prabhakar-B32579 >> Subject: RE: [edk2] Debugging Sec and PI phases {Source symbols} >> >> Hi Olivier, >> >> I tried to use the DS-5 scripts, but landed in some issues, like: >> "System table not found in System Memory". >> >> It seems there is some issue with the .FD gets generated for my >> BoardPkg. >> >> I am also now trying to understand if there is some documentation/tool >> available that >> can parse my .FD and .FV files and can tell me about the sections in >> this particular output >> file. For e.g. something like 'readelf -a XXX.ELF' produces as an >> output. >> >> Also I am using the following method to build the .FD to allow >> debugging of the source >> using the DS5 scripts: >> - export EDK2_DSC, EDK2_TOOLCHAIN, EDK2_ARCH, EDK2_BUILD. >> >> - Run 'make -f ArmPlatformPkg/Scripts/Makefile' >> >> - This will generate a .FD specific to my Board Pkg in >> 'Build/Board_Pkg_Name/DEBUG_ARMGCC/..' >> >> - Load this .FD using the DS5 and then try to load source symbols >> using: >> source edk2/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py -f (..,...) >> -m (..,...) -a >> >> - This gives me an error: >> "System table not found in System Memory". >> >> Any pointers on the above two points.. >> >> Regards, >> Bhupesh >> >>> -----Original Message----- >>> From: boot-architecture-bounces(a)lists.linaro.org [mailto:boot- >>> architecture-bounces(a)lists.linaro.org] On Behalf Of Olivier Martin >>> Sent: Tuesday, October 22, 2013 2:27 PM >>> To: edk2-devel(a)lists.sourceforge.net; 'Andrew Fish' >>> Cc: 'Kim Phillips'; boot-architecture(a)lists.linaro.org; Kushwaha >>> Prabhakar-B32579 >>> Subject: RE: [edk2] Debugging Sec and PI phases {Source symbols} >>> >>> Hi Bhupesh, >>> Yes, if you are using ARM DS-5, this is the wikipage to look at to >> setup >>> your environment to debug UEFI. Let me know if you have issue. >>> Regards, >>> Olivier >>> >>>> -----Original Message----- >>>> From: Sharma Bhupesh-B45370 [mailto:B45370@freescale.com] >>>> Sent: 22 October 2013 07:56 >>>> To: 'Andrew Fish'; 'edk2-devel(a)lists.sourceforge.net' >>>> Cc: 'Kim Phillips'; 'boot-architecture(a)lists.linaro.org'; Kushwaha >>>> Prabhakar-B32579 >>>> Subject: Re: [edk2] Debugging Sec and PI phases {Source symbols} >>>> >>>> >>>>> -----Original Message----- >>>>> From: boot-architecture-bounces(a)lists.linaro.org [mailto:boot- >>>>> architecture-bounces(a)lists.linaro.org] On Behalf Of Andrew Fish >>>>> Sent: Tuesday, October 22, 2013 2:07 AM >>>>> To: edk2-devel(a)lists.sourceforge.net >>>>> Cc: 'Kim Phillips'; 'boot-architecture(a)lists.linaro.org'; >> Kushwaha >>>>> Prabhakar-B32579 >>>>> Subject: Re: [edk2] Debugging Sec and PI phases {Source symbols} >>>>> >>>>> >>>>> >>>>> On Oct 21, 2013, at 11:38 AM, Sharma Bhupesh-B45370 >>>>> <B45370(a)freescale.com> wrote: >>>>> >>>>>> [Resending as I got a 'You must be subscribed to post messages >> to >>>> this >>>>>> mailing list' message from edk2 list] >>>>>> >>>>>> Hi List, >>>>>> >>>>>> I am new to UEFI and am trying to debug my UEFI ported code >> (from >>>> u- >>>>> boot) on a ARMv7 based SoC. >>>>>> I am able to do some basic debugging of the ARM CPU init code >>>>>> using >>>> a >>>>> DS-5 debugger attached to the board. >>>>>> I see that the ported code crashes somewhere while making a >>>> transition >>>>> from Sec to PI phase. >>>>>> However, I can only verify this by seeing instruction level >>>>>> disassembly. I cannot figure out a way to load the source code >>>> using >>>>> the DS-5 debugger. >>>>>> I am used to seeing ELF files which have the debug information >> and >>>>> which can be loaded via the debugger. >>>>>> Using the 'file' command I cannot find any ELF file in the >> output >>>>>> directory 'Build/..'. The FV and FD files don't seem to be ELF >>>> files as >>>>> well. >>>>> FD is short for Flash Device. So it is usually the layout of the >> ROM. >>>> You >>>>> could have multiple ROMs, but the most common thing is to just >> have >>>>> a single FD. >>>>> FV is a Firmware Volume. Basically a simple Flash Filesystem that >>>> allows >>>>> files, named by GUIDs to be discovered. >>>>> >>>>> EFI is a collection of relocatable PE/COFF images, and in general >> an >>>> INF >>>>> file (no for a library) in your project maps to a PE/COFF file >>>> getting >>>>> generated. >>>>> >>>>> It can vary by compiler, but it is common for the *.dll file to >> be >>>> the >>>>> native image with the debug info. So that is the file you want to >>>> load >>>>> symbols for. >>>>> >>>>> There are various schemes on how to do this. Some platforms print >>>>> out debug messages that map into the commands you need to load >>> symbols. >>>> Some >>>>> platforms have scripts that can load symbols. >>>>> >>>>> Sorry I don't remember the latest recommendation on which scheme >> to >>>> use >>>>> for your platform? Try looking at the *.Fv.map file as I think it >>>>> has info about how to load symbols. You would need a script to >>>>> convert >>>> this >>>>> into some format the DS-5 understands. >>>>> >>>>> Maybe the scripts in >>>>> >> https://svn.code.sf.net/p/edk2/code/trunk/edk2/ArmPlatformPkg/Scripts/ >>>> D >>>> s5 >>>>> / are what you are looking for? >>>> Many thanks Andrew. It seems the DS5 scripts will work for me. I >> found >>>> the wiki for the same here: >>>> >> http://sourceforge.net/apps/mediawiki/tianocore/index.php?title=ArmPkg >>>> / >>>> Ds5 >>>> >>>> I will try to debug the target using these scripts and get back >> with >>>> my results. >>>> >>>> Regards, >>>> Bhupesh >>>> >>>>> Thanks, >>>>> >>>>> Andrew Fish >>>>> >>>>>> Any pointers to which ELF file is generated while compiling a >> UEFI >>>>>> BoardPkg and how it can be loaded via the debugger. >>>>>> >>>>>> Thanks for your help. >>>>>> Regards, >>>>>> Bhupesh >>>>>> >>>>>> >>>>>> --------------------------------------------------------------- >> --- >>>>>> - >>>> --- >>>>>> -------- October Webinars: Code for Performance Free Intel >>>>>> webinars can help you accelerate application performance. >>>>>> Explore tips for MPI, OpenMP, advanced profiling, and more. Get >>>>>> the most from the latest Intel processors and coprocessors. See >>>> abstracts >>>>>> and register > >>>>>> >> http://pubads.g.doubleclick.net/gampad/clk?id=60135991&iu=/4140/ostg.c >>>>>> lktrk _______________________________________________ >>>>>> edk2-devel mailing list >>>>>> edk2-devel(a)lists.sourceforge.net >>>>>> https://lists.sourceforge.net/lists/listinfo/edk2-devel >>>>> >>>>> _______________________________________________ >>>>> boot-architecture mailing list >>>>> boot-architecture(a)lists.linaro.org >>>>> http://lists.linaro.org/mailman/listinfo/boot-architecture >>>> >>>> >>>> ------------------------------------------------------------------- >> --- >>>> - >>>> ------- >>>> October Webinars: Code for Performance Free Intel webinars can help >>>> you accelerate application performance. >>>> Explore tips for MPI, OpenMP, advanced profiling, and more. Get the >>>> most from the latest Intel processors and coprocessors. See >> abstracts >>>> and register > >>>> >> http://pubads.g.doubleclick.net/gampad/clk?id=60135991&iu=/4140/ostg.c >>>> l >>>> ktrk >>>> _______________________________________________ >>>> edk2-devel mailing list >>>> edk2-devel(a)lists.sourceforge.net >>>> https://lists.sourceforge.net/lists/listinfo/edk2-devel >>> >>> >>> >>> >>> _______________________________________________ >>> boot-architecture mailing list >>> boot-architecture(a)lists.linaro.org >>> http://lists.linaro.org/mailman/listinfo/boot-architecture >> > > > >

12 years

2
1
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RE: [edk2] Debugging Sec and PI phases {Source symbols}

by Olivier Martin

To parse your FV file (embedded in your FD file), you can use './BaseTools/BinWrappers/PosixLike/VolInfo <location of your FV file>' If you want to debug the early stage of your UEFI boot process, you can only use (you do not need -m (...,...)): source edk2/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py -f (..,...) -a -v At the early stage of the boot, the UEFI firmware has not loaded its binaries into DRAM yet. The UEFI System Table will not be found in System Memory. Where your UEFI firmware lives when started? In DRAM or in Flash/ROM memory? > -----Original Message----- > From: Sharma Bhupesh-B45370 [mailto:B45370@freescale.com] > Sent: 23 October 2013 06:33 > To: Olivier Martin; edk2-devel(a)lists.sourceforge.net; 'Andrew Fish' > Cc: 'Kim Phillips'; boot-architecture(a)lists.linaro.org; Kushwaha > Prabhakar-B32579 > Subject: RE: [edk2] Debugging Sec and PI phases {Source symbols} > > Hi Olivier, > > I tried to use the DS-5 scripts, but landed in some issues, like: > "System table not found in System Memory". > > It seems there is some issue with the .FD gets generated for my > BoardPkg. > > I am also now trying to understand if there is some documentation/tool > available that > can parse my .FD and .FV files and can tell me about the sections in > this particular output > file. For e.g. something like 'readelf -a XXX.ELF' produces as an > output. > > Also I am using the following method to build the .FD to allow > debugging of the source > using the DS5 scripts: > - export EDK2_DSC, EDK2_TOOLCHAIN, EDK2_ARCH, EDK2_BUILD. > > - Run 'make -f ArmPlatformPkg/Scripts/Makefile' > > - This will generate a .FD specific to my Board Pkg in > 'Build/Board_Pkg_Name/DEBUG_ARMGCC/..' > > - Load this .FD using the DS5 and then try to load source symbols > using: > source edk2/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py -f (..,...) > -m (..,...) -a > > - This gives me an error: > "System table not found in System Memory". > > Any pointers on the above two points.. > > Regards, > Bhupesh > > > -----Original Message----- > > From: boot-architecture-bounces(a)lists.linaro.org [mailto:boot- > > architecture-bounces(a)lists.linaro.org] On Behalf Of Olivier Martin > > Sent: Tuesday, October 22, 2013 2:27 PM > > To: edk2-devel(a)lists.sourceforge.net; 'Andrew Fish' > > Cc: 'Kim Phillips'; boot-architecture(a)lists.linaro.org; Kushwaha > > Prabhakar-B32579 > > Subject: RE: [edk2] Debugging Sec and PI phases {Source symbols} > > > > Hi Bhupesh, > > Yes, if you are using ARM DS-5, this is the wikipage to look at to > setup > > your environment to debug UEFI. Let me know if you have issue. > > Regards, > > Olivier > > > > > -----Original Message----- > > > From: Sharma Bhupesh-B45370 [mailto:B45370@freescale.com] > > > Sent: 22 October 2013 07:56 > > > To: 'Andrew Fish'; 'edk2-devel(a)lists.sourceforge.net' > > > Cc: 'Kim Phillips'; 'boot-architecture(a)lists.linaro.org'; Kushwaha > > > Prabhakar-B32579 > > > Subject: Re: [edk2] Debugging Sec and PI phases {Source symbols} > > > > > > > > > > -----Original Message----- > > > > From: boot-architecture-bounces(a)lists.linaro.org [mailto:boot- > > > > architecture-bounces(a)lists.linaro.org] On Behalf Of Andrew Fish > > > > Sent: Tuesday, October 22, 2013 2:07 AM > > > > To: edk2-devel(a)lists.sourceforge.net > > > > Cc: 'Kim Phillips'; 'boot-architecture(a)lists.linaro.org'; > Kushwaha > > > > Prabhakar-B32579 > > > > Subject: Re: [edk2] Debugging Sec and PI phases {Source symbols} > > > > > > > > > > > > > > > > On Oct 21, 2013, at 11:38 AM, Sharma Bhupesh-B45370 > > > > <B45370(a)freescale.com> wrote: > > > > > > > > > [Resending as I got a 'You must be subscribed to post messages > to > > > this > > > > > mailing list' message from edk2 list] > > > > > > > > > > Hi List, > > > > > > > > > > I am new to UEFI and am trying to debug my UEFI ported code > (from > > > u- > > > > boot) on a ARMv7 based SoC. > > > > > I am able to do some basic debugging of the ARM CPU init code > > > > > using > > > a > > > > DS-5 debugger attached to the board. > > > > > > > > > > I see that the ported code crashes somewhere while making a > > > transition > > > > from Sec to PI phase. > > > > > However, I can only verify this by seeing instruction level > > > > > disassembly. I cannot figure out a way to load the source code > > > using > > > > the DS-5 debugger. > > > > > > > > > > I am used to seeing ELF files which have the debug information > and > > > > which can be loaded via the debugger. > > > > > Using the 'file' command I cannot find any ELF file in the > output > > > > > directory 'Build/..'. The FV and FD files don't seem to be ELF > > > files as > > > > well. > > > > > > > > > > > > > FD is short for Flash Device. So it is usually the layout of the > ROM. > > > You > > > > could have multiple ROMs, but the most common thing is to just > have > > > > a single FD. > > > > FV is a Firmware Volume. Basically a simple Flash Filesystem that > > > allows > > > > files, named by GUIDs to be discovered. > > > > > > > > EFI is a collection of relocatable PE/COFF images, and in general > an > > > INF > > > > file (no for a library) in your project maps to a PE/COFF file > > > getting > > > > generated. > > > > > > > > It can vary by compiler, but it is common for the *.dll file to > be > > > the > > > > native image with the debug info. So that is the file you want to > > > load > > > > symbols for. > > > > > > > > There are various schemes on how to do this. Some platforms print > > > > out debug messages that map into the commands you need to load > > symbols. > > > Some > > > > platforms have scripts that can load symbols. > > > > > > > > Sorry I don't remember the latest recommendation on which scheme > to > > > use > > > > for your platform? Try looking at the *.Fv.map file as I think it > > > > has info about how to load symbols. You would need a script to > > > > convert > > > this > > > > into some format the DS-5 understands. > > > > > > > > Maybe the scripts in > > > > > > > > https://svn.code.sf.net/p/edk2/code/trunk/edk2/ArmPlatformPkg/Scripts/ > > > D > > > s5 > > > > / are what you are looking for? > > > > > > Many thanks Andrew. It seems the DS5 scripts will work for me. I > found > > > the wiki for the same here: > > > > http://sourceforge.net/apps/mediawiki/tianocore/index.php?title=ArmPkg > > > / > > > Ds5 > > > > > > I will try to debug the target using these scripts and get back > with > > > my results. > > > > > > Regards, > > > Bhupesh > > > > > > > Thanks, > > > > > > > > Andrew Fish > > > > > > > > > Any pointers to which ELF file is generated while compiling a > UEFI > > > > > BoardPkg and how it can be loaded via the debugger. > > > > > > > > > > Thanks for your help. > > > > > Regards, > > > > > Bhupesh > > > > > > > > > > > > > > > --------------------------------------------------------------- > --- > > > > > - > > > --- > > > > > -------- October Webinars: Code for Performance Free Intel > > > > > webinars can help you accelerate application performance. > > > > > Explore tips for MPI, OpenMP, advanced profiling, and more. Get > > > > > the most from the latest Intel processors and coprocessors. See > > > abstracts > > > > > and register > > > > > > > > > > http://pubads.g.doubleclick.net/gampad/clk?id=60135991&iu=/4140/ostg.c > > > > > lktrk _______________________________________________ > > > > > edk2-devel mailing list > > > > > edk2-devel(a)lists.sourceforge.net > > > > > https://lists.sourceforge.net/lists/listinfo/edk2-devel > > > > > > > > > > > > _______________________________________________ > > > > boot-architecture mailing list > > > > boot-architecture(a)lists.linaro.org > > > > http://lists.linaro.org/mailman/listinfo/boot-architecture > > > > > > > > > > > > ------------------------------------------------------------------- > --- > > > - > > > ------- > > > October Webinars: Code for Performance Free Intel webinars can help > > > you accelerate application performance. > > > Explore tips for MPI, OpenMP, advanced profiling, and more. Get the > > > most from the latest Intel processors and coprocessors. See > abstracts > > > and register > > > > > http://pubads.g.doubleclick.net/gampad/clk?id=60135991&iu=/4140/ostg.c > > > l > > > ktrk > > > _______________________________________________ > > > edk2-devel mailing list > > > edk2-devel(a)lists.sourceforge.net > > > https://lists.sourceforge.net/lists/listinfo/edk2-devel > > > > > > > > > > > > _______________________________________________ > > boot-architecture mailing list > > boot-architecture(a)lists.linaro.org > > http://lists.linaro.org/mailman/listinfo/boot-architecture > >

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