linaro-dev September 2012

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[RFC PATCH v7] media: add v4l2 subdev driver for S5K4ECGX sensor

by Sangwook Lee

This patch adds driver for S5K4ECGX sensor with embedded ISP SoC, S5K4ECGX, which is a 5M CMOS Image sensor from Samsung The driver implements preview mode of the S5K4ECGX sensor. capture (snapshot) operation, face detection are missing now. Following controls are supported: contrast/saturation/brightness/sharpness Signed-off-by: Sangwook Lee <sangwook.lee(a)linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> Cc: Francesco Lavra <francescolavra.fl(a)gmail.com> CC: Scott Bambrough <scott.bambrough(a)linaro.org> Cc: Homin Lee <suapapa(a)insignal.co.kr> --- Changes since v6: - fix alignment issue from Francesco, Sylwester Changes since v5: - deleted dummy lines - fixed pointer errors in handling firmware - updated comments - added le32_to_cpu,le16_to_cpu Changes since v4: - replaced register tables with the function from Sylwester - updated firmware parsing function with CRC32 check firmware generator from user space: git://git.linaro.org/people/sangwook/fimc-v4l2-app.git Changes since v3: - used request_firmware to configure initial settings - added parsing functions to read initial settings - updated regulator API - reduced preview setting tables by experiment Changes since v2: - added GPIO (reset/stby) and regulators - updated I2C read/write, based on s5k6aa datasheet - fixed set_fmt errors - reduced register tables a bit - removed vmalloc Changes since v1: - fixed s_stream(0) when it called twice - changed mutex_X position to be used when strictly necessary - add additional s_power(0) in case that error happens - update more accurate debugging statements - remove dummy else drivers/media/i2c/Kconfig | 7 + drivers/media/i2c/Makefile | 1 + drivers/media/i2c/s5k4ecgx.c | 1016 ++++++++++++++++++++++++++++++++++++++++++ include/media/s5k4ecgx.h | 37 ++ 4 files changed, 1061 insertions(+) create mode 100644 drivers/media/i2c/s5k4ecgx.c create mode 100644 include/media/s5k4ecgx.h diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 9a5a059..55b3bbb 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -484,6 +484,13 @@ config VIDEO_S5K6AA This is a V4L2 sensor-level driver for Samsung S5K6AA(FX) 1.3M camera sensor with an embedded SoC image signal processor. +config VIDEO_S5K4ECGX + tristate "Samsung S5K4ECGX sensor support" + depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + ---help--- + This is a V4L2 sensor-level driver for Samsung S5K4ECGX 5M + camera sensor with an embedded SoC image signal processor. + source "drivers/media/i2c/smiapp/Kconfig" comment "Flash devices" diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index 088a460..a720812 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_VIDEO_MT9V032) += mt9v032.o obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o obj-$(CONFIG_VIDEO_S5K6AA) += s5k6aa.o +obj-$(CONFIG_VIDEO_S5K4ECGX) += s5k4ecgx.o obj-$(CONFIG_VIDEO_ADP1653) += adp1653.o obj-$(CONFIG_VIDEO_AS3645A) += as3645a.o obj-$(CONFIG_VIDEO_SMIAPP_PLL) += smiapp-pll.o diff --git a/drivers/media/i2c/s5k4ecgx.c b/drivers/media/i2c/s5k4ecgx.c new file mode 100644 index 0000000..dd2f68d --- /dev/null +++ b/drivers/media/i2c/s5k4ecgx.c @@ -0,0 +1,1016 @@ +/* + * Driver for s5k4ecgx (5MP Camera) from Samsung + * a quarter-inch optical format 1.4 micron 5 megapixel (Mp) + * CMOS image sensor. + * + * Copyright (C) 2012, Linaro, Sangwook Lee <sangwook.lee(a)linaro.org> + * Copyright (C) 2012, Insignal Co,. Ltd, Homin Lee <suapapa(a)insignal.co.kr> + * + * Based on s5k6aa, noon010pc30 driver + * Copyright (C) 2011, Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/clk.h> +#include <linux/crc32.h> +#include <linux/ctype.h> +#include <linux/delay.h> +#include <linux/firmware.h> +#include <linux/gpio.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/regulator/consumer.h> +#include <linux/slab.h> +#include <asm/unaligned.h> + +#include <media/media-entity.h> +#include <media/s5k4ecgx.h> +#include <media/v4l2-ctrls.h> +#include <media/v4l2-device.h> +#include <media/v4l2-mediabus.h> +#include <media/v4l2-subdev.h> + +static int debug; +module_param(debug, int, 0644); + +#define S5K4ECGX_DRIVER_NAME "s5k4ecgx" +#define S5K4ECGX_FIRMWARE "s5k4ecgx.bin" + +/* Firmware revision information */ +#define REG_FW_REVISION 0x700001a6 +#define REG_FW_VERSION 0x700001a4 +#define S5K4ECGX_REVISION_1_1 0x11 +#define S5K4ECGX_FW_VERSION 0x4ec0 + +/* General purpose parameters */ +#define REG_USER_BRIGHTNESS 0x7000022c +#define REG_USER_CONTRAST 0x7000022e +#define REG_USER_SATURATION 0x70000230 + +#define REG_G_NEW_CFG_SYNC 0x7000024a +#define REG_G_PREV_IN_WIDTH 0x70000250 +#define REG_G_PREV_IN_HEIGHT 0x70000252 +#define REG_G_PREV_IN_XOFFS 0x70000254 +#define REG_G_PREV_IN_YOFFS 0x70000256 +#define REG_G_CAP_IN_WIDTH 0x70000258 +#define REG_G_CAP_IN_HEIGHT 0x7000025a +#define REG_G_CAP_IN_XOFFS 0x7000025c +#define REG_G_CAP_IN_YOFFS 0x7000025e +#define REG_G_INPUTS_CHANGE_REQ 0x70000262 +#define REG_G_ACTIVE_PREV_CFG 0x70000266 +#define REG_G_PREV_CFG_CHG 0x70000268 +#define REG_G_PREV_OPEN_AFTER_CH 0x7000026a + +/* Preview context register sets. n = 0...4. */ +#define PREG(n, x) ((n) * 0x30 + (x)) +#define REG_P_OUT_WIDTH(n) PREG(n, 0x700002a6) +#define REG_P_OUT_HEIGHT(n) PREG(n, 0x700002a8) +#define REG_P_FMT(n) PREG(n, 0x700002aa) +#define REG_P_PVI_MASK(n) PREG(n, 0x700002b4) +#define REG_P_FR_TIME_TYPE(n) PREG(n, 0x700002be) +#define FR_TIME_DYNAMIC 0 +#define FR_TIME_FIXED 1 +#define FR_TIME_FIXED_ACCURATE 2 +#define REG_P_FR_TIME_Q_TYPE(n) PREG(n, 0x700002c0) +#define FR_TIME_Q_DYNAMIC 0 +#define FR_TIME_Q_BEST_FRRATE 1 +#define FR_TIME_Q_BEST_QUALITY 2 + +/* Frame period in 0.1 ms units */ +#define REG_P_MAX_FR_TIME(n) PREG(n, 0x700002c2) +#define REG_P_MIN_FR_TIME(n) PREG(n, 0x700002c4) +#define US_TO_FR_TIME(__t) ((__t) / 100) +#define REG_P_PREV_MIRROR(n) PREG(n, 0x700002d0) +#define REG_P_CAP_MIRROR(n) PREG(n, 0x700002d2) + +#define REG_G_PREVZOOM_IN_WIDTH 0x70000494 +#define REG_G_PREVZOOM_IN_HEIGHT 0x70000496 +#define REG_G_PREVZOOM_IN_XOFFS 0x70000498 +#define REG_G_PREVZOOM_IN_YOFFS 0x7000049a +#define REG_G_CAPZOOM_IN_WIDTH 0x7000049c +#define REG_G_CAPZOOM_IN_HEIGHT 0x7000049e +#define REG_G_CAPZOOM_IN_XOFFS 0x700004a0 +#define REG_G_CAPZOOM_IN_YOFFS 0x700004a2 + +/* n = 0...4 */ +#define REG_USER_SHARPNESS(n) (0x70000a28 + (n) * 0xb6) + +/* Reduce sharpness range for user space API */ +#define SHARPNESS_DIV 8208 +#define TOK_TERM 0xffffffff + +/* + * FIXME: This is copied from s5k6aa, because of no information + * in the S5K4ECGX datasheet. + * H/W register Interface (0xd0000000 - 0xd0000fff) + */ +#define AHB_MSB_ADDR_PTR 0xfcfc +#define GEN_REG_OFFSH 0xd000 +#define REG_CMDWR_ADDRH 0x0028 +#define REG_CMDWR_ADDRL 0x002a +#define REG_CMDRD_ADDRH 0x002c +#define REG_CMDRD_ADDRL 0x002e +#define REG_CMDBUF0_ADDR 0x0f12 + +struct s5k4ecgx_frmsize { + struct v4l2_frmsize_discrete size; + /* Fixed sensor matrix crop rectangle */ + struct v4l2_rect input_window; +}; + +struct regval_list { + u32 addr; + u16 val; +}; + +/* + * TODO: currently only preview is supported and snapshot (capture) + * is not implemented yet + */ +static const struct s5k4ecgx_frmsize s5k4ecgx_prev_sizes[] = { + { + .size = { 176, 144 }, + .input_window = { 0x00, 0x00, 0x928, 0x780 }, + }, { + .size = { 352, 288 }, + .input_window = { 0x00, 0x00, 0x928, 0x780 }, + }, { + .size = { 640, 480 }, + .input_window = { 0x00, 0x00, 0xa00, 0x780 }, + }, { + .size = { 720, 480 }, + .input_window = { 0x00, 0x00, 0xa00, 0x6a8 }, + } +}; + +#define S5K4ECGX_NUM_PREV ARRAY_SIZE(s5k4ecgx_prev_sizes) + +struct s5k4ecgx_pixfmt { + enum v4l2_mbus_pixelcode code; + u32 colorspace; + /* REG_TC_PCFG_Format register value */ + u16 reg_p_format; +}; + +/* By default value, output from sensor will be YUV422 0-255 */ +static const struct s5k4ecgx_pixfmt s5k4ecgx_formats[] = { + { V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG, 5 }, +}; + +static const char * const s5k4ecgx_supply_names[] = { + /* + * Usually 2.8V is used for analog power (vdda) + * and digital IO (vddio, vdddcore) + */ + "vdda", + "vddio", + "vddcore", + "vddreg", /* The internal s5k4ecgx regulator's supply (1.8V) */ +}; + +#define S5K4ECGX_NUM_SUPPLIES ARRAY_SIZE(s5k4ecgx_supply_names) + +enum s5k4ecgx_gpio_id { + STBY, + RST, + GPIO_NUM, +}; + +struct s5k4ecgx { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_ctrl_handler handler; + + struct s5k4ecgx_platform_data *pdata; + const struct s5k4ecgx_pixfmt *curr_pixfmt; + const struct s5k4ecgx_frmsize *curr_frmsize; + struct mutex lock; + u8 streaming; + u8 set_params; + + struct regulator_bulk_data supplies[S5K4ECGX_NUM_SUPPLIES]; + struct s5k4ecgx_gpio gpio[GPIO_NUM]; +}; + +static inline struct s5k4ecgx *to_s5k4ecgx(struct v4l2_subdev *sd) +{ + return container_of(sd, struct s5k4ecgx, sd); +} + +static int s5k4ecgx_i2c_read(struct i2c_client *client, u16 addr, u16 *val) +{ + u8 wbuf[2] = { addr >> 8, addr & 0xff }; + struct i2c_msg msg[2]; + u8 rbuf[2]; + int ret; + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = 2; + msg[0].buf = wbuf; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].len = 2; + msg[1].buf = rbuf; + + ret = i2c_transfer(client->adapter, msg, 2); + *val = be16_to_cpu(*((u16 *)rbuf)); + + v4l2_dbg(4, debug, client, "i2c_read: 0x%04X : 0x%04x\n", addr, *val); + + return ret == 2 ? 0 : ret; +} + +static int s5k4ecgx_i2c_write(struct i2c_client *client, u16 addr, u16 val) +{ + u8 buf[4] = { addr >> 8, addr & 0xff, val >> 8, val & 0xff }; + + int ret = i2c_master_send(client, buf, 4); + v4l2_dbg(4, debug, client, "i2c_write: 0x%04x : 0x%04x\n", addr, val); + + return ret == 4 ? 0 : ret; +} + +static int s5k4ecgx_write(struct i2c_client *client, u32 addr, u16 val) +{ + u16 high = addr >> 16, low = addr & 0xffff; + int ret; + + v4l2_dbg(3, debug, client, "write: 0x%08x : 0x%04x\n", addr, val); + ret = s5k4ecgx_i2c_write(client, REG_CMDWR_ADDRH, high); + if (!ret) + ret = s5k4ecgx_i2c_write(client, REG_CMDWR_ADDRL, low); + if (!ret) + ret = s5k4ecgx_i2c_write(client, REG_CMDBUF0_ADDR, val); + + return ret; +} + +static int s5k4ecgx_read(struct i2c_client *client, u32 addr, u16 *val) +{ + u16 high = addr >> 16, low = addr & 0xffff; + int ret; + + ret = s5k4ecgx_i2c_write(client, REG_CMDRD_ADDRH, high); + if (!ret) + ret = s5k4ecgx_i2c_write(client, REG_CMDRD_ADDRL, low); + if (!ret) + ret = s5k4ecgx_i2c_read(client, REG_CMDBUF0_ADDR, val); + if (!ret) + dev_err(&client->dev, "Failed to execute read command\n"); + + return ret; +} + +static int s5k4ecgx_read_fw_ver(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 hw_rev, fw_ver = 0; + int ret; + + ret = s5k4ecgx_read(client, REG_FW_VERSION, &fw_ver); + if (ret < 0 || fw_ver != S5K4ECGX_FW_VERSION) { + v4l2_err(sd, "FW version check failed!\n"); + return -ENODEV; + } + + ret = s5k4ecgx_read(client, REG_FW_REVISION, &hw_rev); + if (ret < 0) + return ret; + + v4l2_info(sd, "chip found FW ver: 0x%x, HW rev: 0x%x\n", + fw_ver, hw_rev); + return 0; +} + +static int s5k4ecgx_set_ahb_address(struct v4l2_subdev *sd) +{ + int ret; + struct i2c_client *client = v4l2_get_subdevdata(sd); + + /* Set APB peripherals start address */ + ret = s5k4ecgx_i2c_write(client, AHB_MSB_ADDR_PTR, GEN_REG_OFFSH); + if (ret) + return ret; + /* + * FIXME: This is copied from s5k6aa, because of no information + * in s5k4ecgx's datasheet. + * sw_reset is activated to put device into idle status + */ + ret = s5k4ecgx_i2c_write(client, 0x0010, 0x0001); + if (ret) + return ret; + + ret = s5k4ecgx_i2c_write(client, 0x1030, 0x0000); + if (ret) + return ret; + /* Halt ARM CPU */ + return s5k4ecgx_i2c_write(client, 0x0014, 0x0001); +} + +#define FW_CRC_SIZE 4 +/* Register address, value are 4, 2 bytes */ +#define FW_RECORD_SIZE 6 +/* + * Firmware has the following format: + * <total number of records (4-bytes + 2-bytes padding) N >, < record 0 >, + * < record N - 1 >, < CRC32-CCITT (4-bytes) >, CRC32(4 bytes) + * where "record" is a 4-byte register address followed by 2-byte + * register value (little endian) + */ +static int s5k4ecgx_load_firmware(struct v4l2_subdev *sd) +{ + const struct firmware *fw; + const u8 *ptr; + int err, i, regs_num; + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 val; + u32 addr, crc, crc_file, addr_inc = 0; + + err = request_firmware(&fw, S5K4ECGX_FIRMWARE, sd->v4l2_dev->dev); + if (err) { + v4l2_err(sd, "Failed to read firmware %s\n", S5K4ECGX_FIRMWARE); + return err; + } + regs_num = le32_to_cpu(get_unaligned_le32(fw->data)); + v4l2_dbg(3, debug, sd, "FW: %s size %d register sets %d\n", + S5K4ECGX_FIRMWARE, fw->size, regs_num); + regs_num++; /* Add header */ + if (fw->size != regs_num * FW_RECORD_SIZE + FW_CRC_SIZE) { + err = -EINVAL; + goto fw_out; + } + crc_file = le32_to_cpu(get_unaligned_le32(fw->data + + regs_num * FW_RECORD_SIZE)); + crc = crc32_le(~0, fw->data, regs_num * FW_RECORD_SIZE); + if (crc != crc_file) { + v4l2_err(sd, "FW: invalid crc (%#x:%#x)\n", crc, crc_file); + err = -EINVAL; + goto fw_out; + } + ptr = fw->data + FW_RECORD_SIZE; + for (i = 1; i < regs_num; i++) { + addr = le32_to_cpu(get_unaligned_le32(ptr)); + ptr += sizeof(u32); + val = le16_to_cpu(get_unaligned_le16(ptr)); + ptr += sizeof(u16); + if (addr - addr_inc != 2) + err = s5k4ecgx_write(client, addr, val); + else + err = s5k4ecgx_i2c_write(client, REG_CMDBUF0_ADDR, val); + if (err) + break; + addr_inc = addr; + } +fw_out: + release_firmware(fw); + + return err; +} + +/* Set preview and capture input window */ +static int s5k4ecgx_set_input_window(struct i2c_client *c, + const struct v4l2_rect *r) +{ + int ret; + + ret = s5k4ecgx_write(c, REG_G_PREV_IN_WIDTH, r->width); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREV_IN_HEIGHT, r->height); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREV_IN_XOFFS, r->left); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREV_IN_YOFFS, r->top); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAP_IN_WIDTH, r->width); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAP_IN_HEIGHT, r->height); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAP_IN_XOFFS, r->left); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAP_IN_YOFFS, r->top); + + return ret; +} + +/* Set preview and capture zoom input window */ +static int s5k4ecgx_set_zoom_window(struct i2c_client *c, + const struct v4l2_rect *r) +{ + int ret; + + ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_WIDTH, r->width); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_HEIGHT, r->height); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_XOFFS, r->left); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_YOFFS, r->top); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_WIDTH, r->width); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_HEIGHT, r->height); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_XOFFS, r->left); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_YOFFS, r->top); + + return ret; +} + +static int s5k4ecgx_set_output_framefmt(struct s5k4ecgx *priv) +{ + struct i2c_client *client = v4l2_get_subdevdata(&priv->sd); + int ret; + + ret = s5k4ecgx_write(client, REG_P_OUT_WIDTH(0), + priv->curr_frmsize->size.width); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_OUT_HEIGHT(0), + priv->curr_frmsize->size.height); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_FMT(0), + priv->curr_pixfmt->reg_p_format); + return ret; +} + +static int s5k4ecgx_init_sensor(struct v4l2_subdev *sd) +{ + int ret; + + ret = s5k4ecgx_set_ahb_address(sd); + /* The delay is from manufacturer's settings */ + msleep(100); + + if (!ret) + ret = s5k4ecgx_load_firmware(sd); + if (ret) + v4l2_err(sd, "Failed to write initial settings\n"); + + return ret; +} + +static int s5k4ecgx_gpio_set_value(struct s5k4ecgx *priv, int id, u32 val) +{ + if (!gpio_is_valid(priv->gpio[id].gpio)) + return 0; + gpio_set_value(priv->gpio[id].gpio, val); + + return 1; +} + +static int __s5k4ecgx_power_on(struct s5k4ecgx *priv) +{ + int ret; + + ret = regulator_bulk_enable(S5K4ECGX_NUM_SUPPLIES, priv->supplies); + if (ret) + return ret; + usleep_range(30, 50); + + /* The polarity of STBY is controlled by TSP */ + if (s5k4ecgx_gpio_set_value(priv, STBY, priv->gpio[STBY].level)) + usleep_range(30, 50); + + if (s5k4ecgx_gpio_set_value(priv, RST, priv->gpio[RST].level)) + usleep_range(30, 50); + + return 0; +} + +static int __s5k4ecgx_power_off(struct s5k4ecgx *priv) +{ + if (s5k4ecgx_gpio_set_value(priv, RST, !priv->gpio[RST].level)) + usleep_range(30, 50); + + if (s5k4ecgx_gpio_set_value(priv, STBY, !priv->gpio[STBY].level)) + usleep_range(30, 50); + + priv->streaming = 0; + + return regulator_bulk_disable(S5K4ECGX_NUM_SUPPLIES, priv->supplies); +} + +/* Find nearest matching image pixel size. */ +static int s5k4ecgx_try_frame_size(struct v4l2_mbus_framefmt *mf, + const struct s5k4ecgx_frmsize **size) +{ + unsigned int min_err = ~0; + int i = ARRAY_SIZE(s5k4ecgx_prev_sizes); + const struct s5k4ecgx_frmsize *fsize = &s5k4ecgx_prev_sizes[0], + *match = NULL; + + while (i--) { + int err = abs(fsize->size.width - mf->width) + + abs(fsize->size.height - mf->height); + if (err < min_err) { + min_err = err; + match = fsize; + } + fsize++; + } + if (match) { + mf->width = match->size.width; + mf->height = match->size.height; + if (size) + *size = match; + return 0; + } + + return -EINVAL; +} + +static int s5k4ecgx_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_fh *fh, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= ARRAY_SIZE(s5k4ecgx_formats)) + return -EINVAL; + code->code = s5k4ecgx_formats[code->index].code; + + return 0; +} + +static int s5k4ecgx_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, + struct v4l2_subdev_format *fmt) +{ + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + struct v4l2_mbus_framefmt *mf; + + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { + if (fh) { + mf = v4l2_subdev_get_try_format(fh, 0); + fmt->format = *mf; + } + return 0; + } + + mf = &fmt->format; + + mutex_lock(&priv->lock); + mf->width = priv->curr_frmsize->size.width; + mf->height = priv->curr_frmsize->size.height; + mf->code = priv->curr_pixfmt->code; + mf->colorspace = priv->curr_pixfmt->colorspace; + mf->field = V4L2_FIELD_NONE; + mutex_unlock(&priv->lock); + + return 0; +} + +static const struct s5k4ecgx_pixfmt *s5k4ecgx_try_fmt(struct v4l2_subdev *sd, + struct v4l2_mbus_framefmt *mf) +{ + int i = ARRAY_SIZE(s5k4ecgx_formats); + + while (--i) + if (mf->code == s5k4ecgx_formats[i].code) + break; + mf->code = s5k4ecgx_formats[i].code; + + return &s5k4ecgx_formats[i]; +} + +static int s5k4ecgx_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, + struct v4l2_subdev_format *fmt) +{ + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + const struct s5k4ecgx_frmsize *fsize = NULL; + const struct s5k4ecgx_pixfmt *pf; + struct v4l2_mbus_framefmt *mf; + int ret = 0; + + pf = s5k4ecgx_try_fmt(sd, &fmt->format); + s5k4ecgx_try_frame_size(&fmt->format, &fsize); + fmt->format.colorspace = V4L2_COLORSPACE_JPEG; + + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { + if (fh) { + mf = v4l2_subdev_get_try_format(fh, 0); + *mf = fmt->format; + } + return 0; + } + + mutex_lock(&priv->lock); + if (!priv->streaming) { + priv->curr_frmsize = fsize; + priv->curr_pixfmt = pf; + priv->set_params = 1; + } else { + ret = -EBUSY; + } + mutex_unlock(&priv->lock); + + return ret; +} + +static const struct v4l2_subdev_pad_ops s5k4ecgx_pad_ops = { + .enum_mbus_code = s5k4ecgx_enum_mbus_code, + .get_fmt = s5k4ecgx_get_fmt, + .set_fmt = s5k4ecgx_set_fmt, +}; + +/* + * V4L2 subdev controls + */ +static int s5k4ecgx_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct v4l2_subdev *sd = &container_of(ctrl->handler, struct s5k4ecgx, + handler)->sd; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + unsigned int i; + int err = 0; + + v4l2_dbg(1, debug, sd, "ctrl: 0x%x, value: %d\n", ctrl->id, ctrl->val); + + mutex_lock(&priv->lock); + switch (ctrl->id) { + case V4L2_CID_CONTRAST: + err = s5k4ecgx_write(client, REG_USER_CONTRAST, ctrl->val); + break; + + case V4L2_CID_SATURATION: + err = s5k4ecgx_write(client, REG_USER_SATURATION, ctrl->val); + break; + + case V4L2_CID_SHARPNESS: + /* TODO: Revisit, is this setting for all presets ? */ + for (i = 0; i < 4 && !err; i++) + err = s5k4ecgx_write(client, REG_USER_SHARPNESS(i), + ctrl->val * SHARPNESS_DIV); + break; + + case V4L2_CID_BRIGHTNESS: + err = s5k4ecgx_write(client, REG_USER_BRIGHTNESS, ctrl->val); + break; + } + mutex_unlock(&priv->lock); + if (err < 0) + v4l2_err(sd, "Failed to write s_ctrl err %d\n", err); + + return err; +} + +static const struct v4l2_ctrl_ops s5k4ecgx_ctrl_ops = { + .s_ctrl = s5k4ecgx_s_ctrl, +}; + +/* + * Reading s5k4ecgx version information + */ +static int s5k4ecgx_registered(struct v4l2_subdev *sd) +{ + int ret; + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + + mutex_lock(&priv->lock); + ret = __s5k4ecgx_power_on(priv); + if (!ret) { + ret = s5k4ecgx_read_fw_ver(sd); + __s5k4ecgx_power_off(priv); + } + mutex_unlock(&priv->lock); + + return ret; +} + +/* + * V4L2 subdev internal operations + */ +static int s5k4ecgx_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + struct v4l2_mbus_framefmt *mf = v4l2_subdev_get_try_format(fh, 0); + + mf->width = s5k4ecgx_prev_sizes[0].size.width; + mf->height = s5k4ecgx_prev_sizes[0].size.height; + mf->code = s5k4ecgx_formats[0].code; + mf->colorspace = V4L2_COLORSPACE_JPEG; + mf->field = V4L2_FIELD_NONE; + + return 0; +} + +static const struct v4l2_subdev_internal_ops s5k4ecgx_subdev_internal_ops = { + .registered = s5k4ecgx_registered, + .open = s5k4ecgx_open, +}; + +static int s5k4ecgx_s_power(struct v4l2_subdev *sd, int on) +{ + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + int ret; + + v4l2_dbg(1, debug, sd, "Switching %s\n", on ? "on" : "off"); + + if (on) { + ret = __s5k4ecgx_power_on(priv); + if (ret < 0) + return ret; + /* Time to stabilize sensor */ + msleep(100); + ret = s5k4ecgx_init_sensor(sd); + if (ret < 0) + __s5k4ecgx_power_off(priv); + else + priv->set_params = 1; + } else { + ret = __s5k4ecgx_power_off(priv); + } + + return 0; +} + +static int s5k4ecgx_log_status(struct v4l2_subdev *sd) +{ + v4l2_ctrl_handler_log_status(sd->ctrl_handler, sd->name); + + return 0; +} + +static const struct v4l2_subdev_core_ops s5k4ecgx_core_ops = { + .s_power = s5k4ecgx_s_power, + .log_status = s5k4ecgx_log_status, +}; + +static int __s5k4ecgx_s_stream(struct s5k4ecgx *priv, int on) +{ + struct i2c_client *client = v4l2_get_subdevdata(&priv->sd); + const struct v4l2_rect *crop_rect = &priv->curr_frmsize->input_window; + int ret = 0; + + /* TODO: Add s_stream(0) handling */ + + if (!on || !priv->set_params) + return 0; + + ret = s5k4ecgx_set_input_window(client, crop_rect); + if (!ret) + ret = s5k4ecgx_set_zoom_window(client, crop_rect); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_INPUTS_CHANGE_REQ, 1); + if (!ret) + ret = s5k4ecgx_write(client, 0x70000a1e, 0x28); + if (!ret) + ret = s5k4ecgx_write(client, 0x70000ad4, 0x3c); + if (!ret) + ret = s5k4ecgx_set_output_framefmt(priv); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_PVI_MASK(0), 0x52); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_FR_TIME_TYPE(0), + FR_TIME_DYNAMIC); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_FR_TIME_Q_TYPE(0), + FR_TIME_Q_BEST_FRRATE); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_MIN_FR_TIME(0), + US_TO_FR_TIME(33300)); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_MAX_FR_TIME(0), + US_TO_FR_TIME(66600)); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_PREV_MIRROR(0), 0); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_CAP_MIRROR(0), 0); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_ACTIVE_PREV_CFG, 0); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_PREV_OPEN_AFTER_CH, 1); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_NEW_CFG_SYNC, 1); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_PREV_CFG_CHG, 1); + if (!ret) + priv->set_params = 0; + + return ret; +} + +static int s5k4ecgx_s_stream(struct v4l2_subdev *sd, int on) +{ + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + int ret = 0; + + v4l2_dbg(1, debug, sd, "Turn streaming %s\n", on ? "on" : "off"); + + mutex_lock(&priv->lock); + if (on) { + /* Ignore if s_stream is called twice */ + if (priv->streaming == !on) { + ret = __s5k4ecgx_s_stream(priv, on); + if (!ret) + priv->streaming = on & 1; + } + } + mutex_unlock(&priv->lock); + + return ret; +} + +static const struct v4l2_subdev_video_ops s5k4ecgx_video_ops = { + .s_stream = s5k4ecgx_s_stream, +}; + +static const struct v4l2_subdev_ops s5k4ecgx_ops = { + .core = &s5k4ecgx_core_ops, + .pad = &s5k4ecgx_pad_ops, + .video = &s5k4ecgx_video_ops, +}; + +/* + * GPIO setup + */ +static int s5k4ecgx_config_gpio(int nr, int val, const char *name) +{ + unsigned long flags = val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; + int ret; + + if (!gpio_is_valid(nr)) + return 0; + ret = gpio_request_one(nr, flags, name); + if (!ret) + gpio_export(nr, 0); + + return ret; +} + +static void s5k4ecgx_free_gpios(struct s5k4ecgx *priv) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(priv->gpio); i++) { + if (!gpio_is_valid(priv->gpio[i].gpio)) + continue; + gpio_free(priv->gpio[i].gpio); + priv->gpio[i].gpio = -EINVAL; + } +} + +static int s5k4ecgx_config_gpios(struct s5k4ecgx *priv, + const struct s5k4ecgx_platform_data *pdata) +{ + const struct s5k4ecgx_gpio *gpio = &pdata->gpio_stby; + int ret; + + priv->gpio[STBY].gpio = -EINVAL; + priv->gpio[RST].gpio = -EINVAL; + + ret = s5k4ecgx_config_gpio(gpio->gpio, gpio->level, "S5K4ECGX_STBY"); + + if (ret) { + s5k4ecgx_free_gpios(priv); + return ret; + } + priv->gpio[STBY] = *gpio; + if (gpio_is_valid(gpio->gpio)) + gpio_set_value(gpio->gpio, 0); + + gpio = &pdata->gpio_reset; + + ret = s5k4ecgx_config_gpio(gpio->gpio, gpio->level, "S5K4ECGX_RST"); + if (ret) { + s5k4ecgx_free_gpios(priv); + return ret; + } + priv->gpio[RST] = *gpio; + if (gpio_is_valid(gpio->gpio)) + gpio_set_value(gpio->gpio, 0); + + return 0; +} + +static int s5k4ecgx_init_v4l2_ctrls(struct s5k4ecgx *priv) +{ + const struct v4l2_ctrl_ops *ops = &s5k4ecgx_ctrl_ops; + struct v4l2_ctrl_handler *hdl = &priv->handler; + int ret; + + ret = v4l2_ctrl_handler_init(hdl, 4); + if (ret) + return ret; + + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BRIGHTNESS, -208, 127, 1, 0); + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, -127, 127, 1, 0); + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, -127, 127, 1, 0); + + /* Sharpness default is 24612, and then (24612/SHARPNESS_DIV) = 2 */ + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SHARPNESS, -32704/SHARPNESS_DIV, + 24612/SHARPNESS_DIV, 1, 2); + if (hdl->error) { + ret = hdl->error; + v4l2_ctrl_handler_free(hdl); + return ret; + } + priv->sd.ctrl_handler = hdl; + + return 0; +}; + +static int s5k4ecgx_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret, i; + struct v4l2_subdev *sd; + struct s5k4ecgx *priv; + struct s5k4ecgx_platform_data *pdata = client->dev.platform_data; + + if (pdata == NULL) { + dev_err(&client->dev, "platform data is missing!\n"); + return -EINVAL; + } + priv = devm_kzalloc(&client->dev, sizeof(struct s5k4ecgx), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + mutex_init(&priv->lock); + priv->streaming = 0; + + sd = &priv->sd; + /* Registering subdev */ + v4l2_i2c_subdev_init(sd, client, &s5k4ecgx_ops); + strlcpy(sd->name, S5K4ECGX_DRIVER_NAME, sizeof(sd->name)); + + sd->internal_ops = &s5k4ecgx_subdev_internal_ops; + /* Support v4l2 sub-device user space API */ + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + + priv->pad.flags = MEDIA_PAD_FL_SOURCE; + sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR; + ret = media_entity_init(&sd->entity, 1, &priv->pad, 0); + if (ret) + return ret; + + ret = s5k4ecgx_config_gpios(priv, pdata); + if (ret) { + dev_err(&client->dev, "Failed to set gpios\n"); + goto out_err1; + } + for (i = 0; i < S5K4ECGX_NUM_SUPPLIES; i++) + priv->supplies[i].supply = s5k4ecgx_supply_names[i]; + + ret = devm_regulator_bulk_get(&client->dev, S5K4ECGX_NUM_SUPPLIES, + priv->supplies); + if (ret) { + dev_err(&client->dev, "Failed to get regulators\n"); + goto out_err2; + } + ret = s5k4ecgx_init_v4l2_ctrls(priv); + if (ret) + goto out_err2; + + priv->curr_pixfmt = &s5k4ecgx_formats[0]; + priv->curr_frmsize = &s5k4ecgx_prev_sizes[0]; + + return 0; + +out_err2: + s5k4ecgx_free_gpios(priv); +out_err1: + media_entity_cleanup(&priv->sd.entity); + + return ret; +} + +static int s5k4ecgx_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + + mutex_destroy(&priv->lock); + v4l2_device_unregister_subdev(sd); + v4l2_ctrl_handler_free(&priv->handler); + media_entity_cleanup(&sd->entity); + + return 0; +} + +static const struct i2c_device_id s5k4ecgx_id[] = { + { S5K4ECGX_DRIVER_NAME, 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, s5k4ecgx_id); + +static struct i2c_driver v4l2_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = S5K4ECGX_DRIVER_NAME, + }, + .probe = s5k4ecgx_probe, + .remove = s5k4ecgx_remove, + .id_table = s5k4ecgx_id, +}; + +module_i2c_driver(v4l2_i2c_driver); + +MODULE_DESCRIPTION("Samsung S5K4ECGX 5MP SOC camera"); +MODULE_AUTHOR("Sangwook Lee <sangwook.lee(a)linaro.org>"); +MODULE_AUTHOR("Seok-Young Jang <quartz.jang(a)samsung.com>"); +MODULE_LICENSE("GPL"); +MODULE_FIRMWARE(S5K4ECGX_FIRMWARE); diff --git a/include/media/s5k4ecgx.h b/include/media/s5k4ecgx.h new file mode 100644 index 0000000..90c1be7 --- /dev/null +++ b/include/media/s5k4ecgx.h @@ -0,0 +1,37 @@ +/* + * S5K4ECGX image sensor header file + * + * Copyright (C) 2012, Linaro + * Copyright (C) 2012, Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef S5K4ECGX_H +#define S5K4ECGX_H + +/** + * struct s5k4ecgx_gpio - data structure describing a GPIO + * @gpio : GPIO number + * @level: indicates active state of the @gpio + */ +struct s5k4ecgx_gpio { + int gpio; + int level; +}; + +/** + * struct ss5k4ecgx_platform_data- s5k4ecgx driver platform data + * @gpio_reset: GPIO driving RESET pin + * @gpio_stby : GPIO driving STBY pin + */ + +struct s5k4ecgx_platform_data { + struct s5k4ecgx_gpio gpio_reset; + struct s5k4ecgx_gpio gpio_stby; +}; + +#endif /* S5K4ECGX_H */ -- 1.7.9.5

12 years, 10 months

Re: [RFC] sched: nohz_idle_balance

by Vincent Guittot

Wrong button make me removed others guys from the thread. Sorry for this mistake. On 13 September 2012 09:56, Mike Galbraith <efault(a)gmx.de> wrote: > On Thu, 2012-09-13 at 09:44 +0200, Vincent Guittot wrote: >> On 13 September 2012 09:29, Mike Galbraith <efault(a)gmx.de> wrote: >> > On Thu, 2012-09-13 at 08:59 +0200, Vincent Guittot wrote: >> >> On 13 September 2012 08:49, Mike Galbraith <efault(a)gmx.de> wrote: >> >> > On Thu, 2012-09-13 at 06:11 +0200, Vincent Guittot wrote: >> >> >> On tickless system, one CPU runs load balance for all idle CPUs. >> >> >> The cpu_load of this CPU is updated before starting the load balance >> >> >> of each other idle CPUs. We should instead update the cpu_load of the balance_cpu. >> >> >> >> >> >> Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> >> >> >> --- >> >> >> kernel/sched/fair.c | 11 ++++++----- >> >> >> 1 file changed, 6 insertions(+), 5 deletions(-) >> >> >> >> >> >> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c >> >> >> index 1ca4fe4..9ae3a5b 100644 >> >> >> --- a/kernel/sched/fair.c >> >> >> +++ b/kernel/sched/fair.c >> >> >> @@ -4794,14 +4794,15 @@ static void nohz_idle_balance(int this_cpu, enum cpu_idle_type idle) >> >> >> if (need_resched()) >> >> >> break; >> >> >> >> >> >> - raw_spin_lock_irq(&this_rq->lock); >> >> >> - update_rq_clock(this_rq); >> >> >> - update_idle_cpu_load(this_rq); >> >> >> - raw_spin_unlock_irq(&this_rq->lock); >> >> >> + rq = cpu_rq(balance_cpu); >> >> >> + >> >> >> + raw_spin_lock_irq(&rq->lock); >> >> >> + update_rq_clock(rq); >> >> >> + update_idle_cpu_load(rq); >> >> >> + raw_spin_unlock_irq(&rq->lock); >> >> >> >> >> >> rebalance_domains(balance_cpu, CPU_IDLE); >> >> >> >> >> >> - rq = cpu_rq(balance_cpu); >> >> >> if (time_after(this_rq->next_balance, rq->next_balance)) >> >> >> this_rq->next_balance = rq->next_balance; >> >> >> } >> >> > >> >> > Ew, banging locks and updating clocks to what good end? >> >> >> >> The goal is to update the cpu_load table of the CPU before starting >> >> the load balance. Other wise we will use outdated value in the load >> >> balance sequence >> > >> > If there's load to distribute, seems it should all work out fine without >> > doing that. What harm is being done that makes this worth while? >> >> this_load and avg_load can be wrong and make an idle CPU set as >> balanced compared to the busy one > > I think you need to present numbers showing benefit. Crawling all over > a mostly idle (4096p?) box is decidedly bad thing to do. Yep, let me prepare some figures You should also notice that you are already crawling all over the idle processor in rebalance_domains Vincent > > -Mike >

12 years, 10 months

big.LITTLE MP status Sep 10, 2012

by David Zinman

https://wiki.linaro.org/projects/big.LITTLE.MP Blueprint Status: https://blueprints.launchpad.net/linaro-power-kernel/+spec/perf-record-repl… * The basic work is done and has been verfied in August build * Blueprint will be updated https://blueprints.launchpad.net/linaro-power-kernel/+spec/big.little.mp-ho… * in progress, target for end Sept. https://blueprints.launchpad.net/linaro-power-kernel/+spec/cpuidle-add-cpu-… * in progress, target for end Sept. https://blueprints.launchpad.net/linaro-power-kernel/+spec/cpuidle-upstream… * in progress, target for end Sept. https://blueprints.launchpad.net/linaro-qa/+spec/sched-test-porting-to-andr… * working externally to resolve for this work item: Fix tests to return clear pass/fail status: INPROGRESS - Meeting with partner engineers to resolve = Planning for the next phase of the big.LITTLE MP project has begun with a set of new roadmap cards and blueprints = Roadmap Cards: ============== http://cards.linaro.org/browse/CARD-189 (Mobile workload generation suite) http://cards.linaro.org/browse/CARD-190 (Improving HMP Linux scheduling) http://cards.linaro.org/browse/CARD-191 (Improving Idle frameworks in Linux) http://cards.linaro.org/browse/CARD-192 (Simplifying power management on a busy system) Blueprints: ========= https://blueprints.launchpad.net/linaro-power-kernel/+spec/cpuidle-u8500-up… https://blueprints.launchpad.net/linaro-power-kernel/+spec/perf-record-repl… https://blueprints.launchpad.net/linaro-power-kernel/+spec/timer-workqueue-… https://blueprints.launchpad.net/linaro-power-kernel/+spec/devfreq-core-cha… https://blueprints.launchpad.net/linaro-power-kernel/+spec/power-aware-sche… https://blueprints.launchpad.net/linaro-power-kernel/+spec/cpuidle-exynos-d… Miscellaneous items ================= Good instructions for running big.LITTLE MP on fastmodels: http://lists.linaro.org/pipermail/linaro-dev/2012-September/013369.html * Viresh has created the V8 branch with following changes: - Based on v3.6-rc5 - applied Sudeeps's "sched: fix arch_get_fast_and_slow_cpus to get logical cpumask correctly" patch over task-placement-v1 branch - new branch from Paulm: rcu-hotplug-v1 * new Patchset from Morten by middle of week * new perf framework supporting multiple Performance Monitoring Units work in a patchset * working on the ability to boot from A7 The project plan is at https://docs.google.com/a/linaro.org/document/d/1XI9FaEd6dYfCEDezboF7gWtrTO… -- David Zinman Linaro Release Manager | Project Manager Linaro.org | Open source software for ARM SoCs

12 years, 10 months

2012-09-12 Android Platform Team Meeting Agenda Posted

by Zach Pfeffer

Take a look at: https://wiki.linaro.org/Platform/Android/Meetings/2012-09-12 Feel free to add to the agenda and join us in #linaro-meeting on irc.freenode.net at 13:00 UTC on 2012/9/12. -- Zach Pfeffer Android Platform Team Lead, Linaro Platform Teams Linaro.org | Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro http://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog

12 years, 10 months

[PATCH] acpi : remove power from acpi_processor_cx structure

by Daniel Lezcano

Remove the power field as it is not used. Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org> Cc: Konrad Rzeszutek Wilk <konrad.wilk(a)oracle.com> --- drivers/acpi/processor_idle.c | 2 -- drivers/xen/xen-acpi-processor.c | 1 - include/acpi/processor.h | 1 - 3 files changed, 0 insertions(+), 4 deletions(-) diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index e589c19..90582fb 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -483,8 +483,6 @@ static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) if (obj->type != ACPI_TYPE_INTEGER) continue; - cx.power = obj->integer.value; - current_count++; memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); diff --git a/drivers/xen/xen-acpi-processor.c b/drivers/xen/xen-acpi-processor.c index 7ff2569..7ef9c1d 100644 --- a/drivers/xen/xen-acpi-processor.c +++ b/drivers/xen/xen-acpi-processor.c @@ -98,7 +98,6 @@ static int push_cxx_to_hypervisor(struct acpi_processor *_pr) dst_cx->type = cx->type; dst_cx->latency = cx->latency; - dst_cx->power = cx->power; dst_cx->dpcnt = 0; set_xen_guest_handle(dst_cx->dp, NULL); diff --git a/include/acpi/processor.h b/include/acpi/processor.h index 64ec644..db427fa 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h @@ -59,7 +59,6 @@ struct acpi_processor_cx { u8 entry_method; u8 index; u32 latency; - u32 power; u8 bm_sts_skip; char desc[ACPI_CX_DESC_LEN]; }; -- 1.7.5.4

12 years, 10 months

new fastmodel naming in LAVA

by Andy Doan

A head's up for people submitting fastmodel jobs to LAVA. We've recently decided on a different naming scheme for the device/device-types in the lab. Previously it was: device-type: fastmodel device: fastmodel01, fastmodel02 We are changing this to be: device-type: rtsm_ve-a15x4-a7x4 device: rtsm_ve-a15x4-a7x4_01, rtsm_ve-a15x4-a7x4_02 and I'll also be creating a new device/type: device-type: rtsm_ve-a15x1-a7x1 device: rtsm_ve-a15x1-a7x1_01, rtsm_ve-a15x1-a7x1_02 How does this affect me? You'll need to change your job you submit to LAVA to match this new device type. -andy

12 years, 10 months

Linaro Release 12.08 Postmortem Summary

by David Zinman

Postmortem and lessons learned for Linaro's release 2012.08 https://wiki.linaro.org/Cycles/1208/Release/Review Highlights and Key Successes ============================ Linaro also held its first Virtual Connect event on 13 - 17 August, 2012. This online event used Google+ Hangouts on Air and was streamed and recorded via YouTube. Members of the various Linaro Teams provided informative, educational and exciting sessions that allowed for public viewing and participation. http://plus.google.com/u/0/b/112814496864921562564/116754366033915823792/po… The Android team created stable Jelly Bean builds from AOSP and an Android benchmarking platform to automate many of the tests in the AOSP codebase. The Developer Platform Team announced USB Host enablement is now available in LAVA and that all packaged linux-linaro kernels are now cross-compiled and boot tested via LAVA before they are uploaded to Linaro Overlay PPA. Additionally, U-Boot-Linaro is now based on the latest upstream release--v2012.07. Postmortem and Lessons Learned ============================== This cycle was fairly low key: lots of people were out for vacations and many others were attending external conferences such as Linux Plumbers. One issue of concern was the deployment of an infrastructure project on the last week before release. A the new django application was deployed on snapshots.linaro.org that disrupted several builds on the Friday before the release. The issues took one week to resolve. The issues are: - The deployment was not communicated and broadcast properly - Build maintainers were not given proper warning - deploying new functional software on a Friday with no one available on the weekend for emergency - deploying during a release week A big "thank you" is in order for Georgy Redkozubov (gesha) for his help and availability in troubleshooting and getting it fixed. An incident report has been filed here: https://wiki.linaro.org/Internal/Process/DealingWithCrisis/IncidentReports/… Blueprints ========= The number of high or essential priority blueprints that missed the cycle: Android 3 out of 13 Developer Platform 0 out of 3 Infrastructure 1 out of 6 Lava 2 out of 4 Total 6 out of 26 23% of high or essential priority blueprints scheduled for this cycle were not delivered. Total blueprints: 14 out of 49 missed the cycle. High priority missed blueprints recap: 12.05: 19 out of 48, 39% 12.06: 13 out of 31, 42% 12.07: 14 out of 31, 45% 12.08: 6 out of 26, 23% * Not included is data from working groups and landing teams Source: https://docs.google.com/a/linaro.org/spreadsheet/ccc?key=0AjEaTwrvj1bidGhNZ… -- David Zinman Linaro Release Manager | Project Manager Linaro.org | Open source software for ARM SoCs

12 years, 10 months

[PATCH 0/2] Android fixes w.r.t. 3.6 kernel

by Tushar Behera

Required for android-3.6 tree. Tushar Behera (2): netfilter: xt_quota2: Move away from NLMSG_PUT() netfilter: xt_quota2: Update parameter list in netlink_kernel_create net/netfilter/xt_quota2.c | 25 ++++++++++++++++--------- 1 files changed, 16 insertions(+), 9 deletions(-) -- 1.7.4.1

12 years, 10 months

[RFC PATCH v6] media: add v4l2 subdev driver for S5K4ECGX sensor

by Sangwook Lee

This patch adds driver for S5K4ECGX sensor with embedded ISP SoC, S5K4ECGX, which is a 5M CMOS Image sensor from Samsung The driver implements preview mode of the S5K4ECGX sensor. capture (snapshot) operation, face detection are missing now. Following controls are supported: contrast/saturation/brightness/sharpness Signed-off-by: Sangwook Lee <sangwook.lee(a)linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> --- Changes since v5: - deleted dummy lines - fixed pointer errors in handling firmware - updated comments - added le32_to_cpu,le16_to_cpu Changes since v4: - replaced register tables with the function from Sylwester - updated firmware parsing function with CRC32 check firmware generator from user space: git://git.linaro.org/people/sangwook/fimc-v4l2-app.git Changes since v3: - used request_firmware to configure initial settings - added parsing functions to read initial settings - updated regulator API - reduced preview setting tables by experiment Changes since v2: - added GPIO (reset/stby) and regulators - updated I2C read/write, based on s5k6aa datasheet - fixed set_fmt errors - reduced register tables a bit - removed vmalloc Changes since v1: - fixed s_stream(0) when it called twice - changed mutex_X position to be used when strictly necessary - add additional s_power(0) in case that error happens - update more accurate debugging statements - remove dummy else drivers/media/i2c/Kconfig | 7 + drivers/media/i2c/Makefile | 1 + drivers/media/i2c/s5k4ecgx.c | 1011 ++++++++++++++++++++++++++++++++++++++++++ include/media/s5k4ecgx.h | 37 ++ 4 files changed, 1056 insertions(+) create mode 100644 drivers/media/i2c/s5k4ecgx.c create mode 100644 include/media/s5k4ecgx.h diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 9a5a059..55b3bbb 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -484,6 +484,13 @@ config VIDEO_S5K6AA This is a V4L2 sensor-level driver for Samsung S5K6AA(FX) 1.3M camera sensor with an embedded SoC image signal processor. +config VIDEO_S5K4ECGX + tristate "Samsung S5K4ECGX sensor support" + depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API + ---help--- + This is a V4L2 sensor-level driver for Samsung S5K4ECGX 5M + camera sensor with an embedded SoC image signal processor. + source "drivers/media/i2c/smiapp/Kconfig" comment "Flash devices" diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index 088a460..a720812 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_VIDEO_MT9V032) += mt9v032.o obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o obj-$(CONFIG_VIDEO_S5K6AA) += s5k6aa.o +obj-$(CONFIG_VIDEO_S5K4ECGX) += s5k4ecgx.o obj-$(CONFIG_VIDEO_ADP1653) += adp1653.o obj-$(CONFIG_VIDEO_AS3645A) += as3645a.o obj-$(CONFIG_VIDEO_SMIAPP_PLL) += smiapp-pll.o diff --git a/drivers/media/i2c/s5k4ecgx.c b/drivers/media/i2c/s5k4ecgx.c new file mode 100644 index 0000000..66107c8 --- /dev/null +++ b/drivers/media/i2c/s5k4ecgx.c @@ -0,0 +1,1011 @@ +/* + * Driver for s5k4ecgx (5MP Camera) from Samsung + * a quarter-inch optical format 1.4 micron 5 megapixel (Mp) + * CMOS image sensor. + * + * Copyright (C) 2012, Linaro, Sangwook Lee <sangwook.lee(a)linaro.org> + * Copyright (C) 2012, Insignal Co,. Ltd, Homin Lee <suapapa(a)insignal.co.kr> + * + * Based on s5k6aa, noon010pc30 driver + * Copyright (C) 2011, Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/clk.h> +#include <linux/crc32.h> +#include <linux/ctype.h> +#include <linux/delay.h> +#include <linux/firmware.h> +#include <linux/gpio.h> +#include <linux/i2c.h> +#include <linux/module.h> +#include <linux/regulator/consumer.h> +#include <linux/slab.h> + +#include <media/media-entity.h> +#include <media/s5k4ecgx.h> +#include <media/v4l2-ctrls.h> +#include <media/v4l2-device.h> +#include <media/v4l2-mediabus.h> +#include <media/v4l2-subdev.h> + +static int debug; +module_param(debug, int, 0644); + +#define S5K4ECGX_DRIVER_NAME "s5k4ecgx" +#define S5K4ECGX_FIRMWARE "s5k4ecgx.bin" + +/* Firmware revision information */ +#define REG_FW_REVISION 0x700001a6 +#define REG_FW_VERSION 0x700001a4 +#define S5K4ECGX_REVISION_1_1 0x11 +#define S5K4ECGX_FW_VERSION 0x4ec0 + +/* General purpose parameters */ +#define REG_USER_BRIGHTNESS 0x7000022c +#define REG_USER_CONTRAST 0x7000022e +#define REG_USER_SATURATION 0x70000230 + +#define REG_G_NEW_CFG_SYNC 0x7000024a +#define REG_G_PREV_IN_WIDTH 0x70000250 +#define REG_G_PREV_IN_HEIGHT 0x70000252 +#define REG_G_PREV_IN_XOFFS 0x70000254 +#define REG_G_PREV_IN_YOFFS 0x70000256 +#define REG_G_CAP_IN_WIDTH 0x70000258 +#define REG_G_CAP_IN_HEIGHT 0x7000025a +#define REG_G_CAP_IN_XOFFS 0x7000025c +#define REG_G_CAP_IN_YOFFS 0x7000025e +#define REG_G_INPUTS_CHANGE_REQ 0x70000262 +#define REG_G_ACTIVE_PREV_CFG 0x70000266 +#define REG_G_PREV_CFG_CHG 0x70000268 +#define REG_G_PREV_OPEN_AFTER_CH 0x7000026a + +/* Preview context register sets. n = 0...4. */ +#define PREG(n, x) ((n) * 0x30 + (x)) +#define REG_P_OUT_WIDTH(n) PREG(n, 0x700002a6) +#define REG_P_OUT_HEIGHT(n) PREG(n, 0x700002a8) +#define REG_P_FMT(n) PREG(n, 0x700002aa) +#define REG_P_PVI_MASK(n) PREG(n, 0x700002b4) +#define REG_P_FR_TIME_TYPE(n) PREG(n, 0x700002be) +#define FR_TIME_DYNAMIC 0 +#define FR_TIME_FIXED 1 +#define FR_TIME_FIXED_ACCURATE 2 +#define REG_P_FR_TIME_Q_TYPE(n) PREG(n, 0x700002c0) +#define FR_TIME_Q_DYNAMIC 0 +#define FR_TIME_Q_BEST_FRRATE 1 +#define FR_TIME_Q_BEST_QUALITY 2 + +/* Frame period in 0.1 ms units */ +#define REG_P_MAX_FR_TIME(n) PREG(n, 0x700002c2) +#define REG_P_MIN_FR_TIME(n) PREG(n, 0x700002c4) +#define US_TO_FR_TIME(__t) ((__t) / 100) +#define REG_P_PREV_MIRROR(n) PREG(n, 0x700002d0) +#define REG_P_CAP_MIRROR(n) PREG(n, 0x700002d2) + +#define REG_G_PREVZOOM_IN_WIDTH 0x70000494 +#define REG_G_PREVZOOM_IN_HEIGHT 0x70000496 +#define REG_G_PREVZOOM_IN_XOFFS 0x70000498 +#define REG_G_PREVZOOM_IN_YOFFS 0x7000049a +#define REG_G_CAPZOOM_IN_WIDTH 0x7000049c +#define REG_G_CAPZOOM_IN_HEIGHT 0x7000049e +#define REG_G_CAPZOOM_IN_XOFFS 0x700004a0 +#define REG_G_CAPZOOM_IN_YOFFS 0x700004a2 + +/* n = 0...4 */ +#define REG_USER_SHARPNESS(n) (0x70000a28 + (n) * 0xb6) + +/* Reduce sharpness range for user space API */ +#define SHARPNESS_DIV 8208 +#define TOK_TERM 0xffffffff + +/* + * FIXME: This is copied from s5k6aa, because of no information + * in the S5K4ECGX datasheet. + * H/W register Interface (0xd0000000 - 0xd0000fff) + */ +#define AHB_MSB_ADDR_PTR 0xfcfc +#define GEN_REG_OFFSH 0xd000 +#define REG_CMDWR_ADDRH 0x0028 +#define REG_CMDWR_ADDRL 0x002a +#define REG_CMDRD_ADDRH 0x002c +#define REG_CMDRD_ADDRL 0x002e +#define REG_CMDBUF0_ADDR 0x0f12 + +struct s5k4ecgx_frmsize { + struct v4l2_frmsize_discrete size; + /* Fixed sensor matrix crop rectangle */ + struct v4l2_rect input_window; +}; + +struct regval_list { + u32 addr; + u16 val; +}; + +/* + * TODO: currently only preview is supported and snapshot (capture) + * is not implemented yet + */ +static const struct s5k4ecgx_frmsize s5k4ecgx_prev_sizes[] = { + { + .size = { 176, 144 }, + .input_window = { 0x00, 0x00, 0x928, 0x780 }, + }, { + .size = { 352, 288 }, + .input_window = { 0x00, 0x00, 0x928, 0x780 }, + }, { + .size = { 640, 480 }, + .input_window = { 0x00, 0x00, 0xa00, 0x780 }, + }, { + .size = { 720, 480 }, + .input_window = { 0x00, 0x00, 0xa00, 0x6a8 }, + } +}; + +#define S5K4ECGX_NUM_PREV ARRAY_SIZE(s5k4ecgx_prev_sizes) + +struct s5k4ecgx_pixfmt { + enum v4l2_mbus_pixelcode code; + u32 colorspace; + /* REG_TC_PCFG_Format register value */ + u16 reg_p_format; +}; + +/* By default value, output from sensor will be YUV422 0-255 */ +static const struct s5k4ecgx_pixfmt s5k4ecgx_formats[] = { + { V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG, 5 }, +}; + +static const char * const s5k4ecgx_supply_names[] = { + /* + * Usually 2.8V is used for analog power (vdda) + * and digital IO (vddio, vddd_core) + */ + "vdda", + "vddio", + "vddcore", + "vddreg", /* The internal s5k4ecgx regulator's supply (1.8V) */ +}; + +#define S5K4ECGX_NUM_SUPPLIES ARRAY_SIZE(s5k4ecgx_supply_names) + +enum s5k4ecgx_gpio_id { + STBY, + RST, + GPIO_NUM, +}; + +struct s5k4ecgx { + struct v4l2_subdev sd; + struct media_pad pad; + struct v4l2_ctrl_handler handler; + + struct s5k4ecgx_platform_data *pdata; + const struct s5k4ecgx_pixfmt *curr_pixfmt; + const struct s5k4ecgx_frmsize *curr_frmsize; + struct mutex lock; + u8 streaming; + u8 set_params; + + struct regulator_bulk_data supplies[S5K4ECGX_NUM_SUPPLIES]; + struct s5k4ecgx_gpio gpio[GPIO_NUM]; +}; + +static inline struct s5k4ecgx *to_s5k4ecgx(struct v4l2_subdev *sd) +{ + return container_of(sd, struct s5k4ecgx, sd); +} + +static int s5k4ecgx_i2c_read(struct i2c_client *client, u16 addr, u16 *val) +{ + u8 wbuf[2] = { addr >> 8, addr & 0xff }; + struct i2c_msg msg[2]; + u8 rbuf[2]; + int ret; + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = 2; + msg[0].buf = wbuf; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].len = 2; + msg[1].buf = rbuf; + + ret = i2c_transfer(client->adapter, msg, 2); + *val = be16_to_cpu(*((u16 *)rbuf)); + + v4l2_dbg(4, debug, client, "i2c_read: 0x%04X : 0x%04x\n", addr, *val); + + return ret == 2 ? 0 : ret; +} + +static int s5k4ecgx_i2c_write(struct i2c_client *client, u16 addr, u16 val) +{ + u8 buf[4] = { addr >> 8, addr & 0xff, val >> 8, val & 0xff }; + + int ret = i2c_master_send(client, buf, 4); + v4l2_dbg(4, debug, client, "i2c_write: 0x%04x : 0x%04x\n", addr, val); + + return ret == 4 ? 0 : ret; +} + +static int s5k4ecgx_write(struct i2c_client *client, u32 addr, u16 val) +{ + u16 high = addr >> 16, low = addr & 0xffff; + int ret; + + v4l2_dbg(3, debug, client, "write: 0x%08x : 0x%04x\n", addr, val); + ret = s5k4ecgx_i2c_write(client, REG_CMDWR_ADDRH, high); + if (!ret) + ret = s5k4ecgx_i2c_write(client, REG_CMDWR_ADDRL, low); + if (!ret) + ret = s5k4ecgx_i2c_write(client, REG_CMDBUF0_ADDR, val); + + return ret; +} + +static int s5k4ecgx_read(struct i2c_client *client, u32 addr, u16 *val) +{ + u16 high = addr >> 16, low = addr & 0xffff; + int ret; + + ret = s5k4ecgx_i2c_write(client, REG_CMDRD_ADDRH, high); + if (!ret) + ret = s5k4ecgx_i2c_write(client, REG_CMDRD_ADDRL, low); + if (!ret) + ret = s5k4ecgx_i2c_read(client, REG_CMDBUF0_ADDR, val); + if (!ret) + dev_err(&client->dev, "Failed to execute read command\n"); + + return ret; +} + +static int s5k4ecgx_read_fw_ver(struct v4l2_subdev *sd) +{ + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 hw_rev, fw_ver = 0; + int ret; + + ret = s5k4ecgx_read(client, REG_FW_VERSION, &fw_ver); + if (ret < 0 || fw_ver != S5K4ECGX_FW_VERSION) { + v4l2_err(sd, "FW version check failed!\n"); + return -ENODEV; + } + + ret = s5k4ecgx_read(client, REG_FW_REVISION, &hw_rev); + if (ret < 0) + return ret; + + v4l2_info(sd, "chip found FW ver: 0x%x, HW rev: 0x%x\n", + fw_ver, hw_rev); + return 0; +} + +static int s5k4ecgx_set_ahb_address(struct v4l2_subdev *sd) +{ + int ret; + struct i2c_client *client = v4l2_get_subdevdata(sd); + + /* Set APB peripherals start address */ + ret = s5k4ecgx_i2c_write(client, AHB_MSB_ADDR_PTR, GEN_REG_OFFSH); + if (ret) + return ret; + /* + * FIXME: This is copied from s5k6aa, because of no information + * in s5k4ecgx's datasheet. + * sw_reset is activated to put device into idle status + */ + ret = s5k4ecgx_i2c_write(client, 0x0010, 0x0001); + if (ret) + return ret; + + ret = s5k4ecgx_i2c_write(client, 0x1030, 0x0000); + if (ret) + return ret; + /* Halt ARM CPU */ + return s5k4ecgx_i2c_write(client, 0x0014, 0x0001); +} + +#define FW_CRC_SIZE 4 +#define FW_HEAD 6 +/* Register address, value are 4, 2 bytes */ +#define FW_RECORD_SIZE 6 +/* + * Firmware has the following format: + * <total number of records (4-bytes + 2-bytes padding) N >, < record 0 >, + * < record N - 1 >, < CRC32-CCITT (4-bytes) >, CRC32(4 bytes) + * where "record" is a 4-byte register address followed by 2-byte + * register value (little endian) + */ +static int s5k4ecgx_load_firmware(struct v4l2_subdev *sd) +{ + const struct firmware *fw; + int err, i, regs_num; + struct i2c_client *client = v4l2_get_subdevdata(sd); + u16 val; + u32 addr, crc, crc_file, addr_inc = 0; + + err = request_firmware(&fw, S5K4ECGX_FIRMWARE, sd->v4l2_dev->dev); + if (err) { + v4l2_err(sd, "Failed to read firmware %s\n", S5K4ECGX_FIRMWARE); + return err; + } + regs_num = *(u32 *)(fw->data); + v4l2_dbg(3, debug, sd, "FW: %s size %d register sets %d\n", + S5K4ECGX_FIRMWARE, fw->size, regs_num); + regs_num++; /* Add header */ + if (fw->size != regs_num * FW_RECORD_SIZE + FW_CRC_SIZE) { + err = -EINVAL; + goto fw_out; + } + crc_file = *(u32 *)(fw->data + regs_num * FW_RECORD_SIZE); + crc = crc32_le(~0, fw->data, regs_num * FW_RECORD_SIZE); + if (crc != crc_file) { + v4l2_err(sd, "FW: invalid crc (%#x:%#x)\n", crc, crc_file); + err = -EINVAL; + goto fw_out; + } + for (i = 1; i < regs_num; i++) { + addr = le32_to_cpu(*(u32 *)(fw->data + i * FW_RECORD_SIZE)); + val = le16_to_cpu(*(u16 *)(fw->data + i * FW_RECORD_SIZE + 4)); + if (addr - addr_inc != 2) + err = s5k4ecgx_write(client, addr, val); + else + err = s5k4ecgx_i2c_write(client, REG_CMDBUF0_ADDR, val); + if (err) + break; + addr_inc = addr; + } +fw_out: + release_firmware(fw); + + return err; +} + +/* Set preview and capture input window */ +static int s5k4ecgx_set_input_window(struct i2c_client *c, + const struct v4l2_rect *r) +{ + int ret; + + ret = s5k4ecgx_write(c, REG_G_PREV_IN_WIDTH, r->width); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREV_IN_HEIGHT, r->height); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREV_IN_XOFFS, r->left); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREV_IN_YOFFS, r->top); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAP_IN_WIDTH, r->width); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAP_IN_HEIGHT, r->height); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAP_IN_XOFFS, r->left); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAP_IN_YOFFS, r->top); + + return ret; +} + +/* Set preview and capture zoom input window */ +static int s5k4ecgx_set_zoom_window(struct i2c_client *c, + const struct v4l2_rect *r) +{ + int ret; + + ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_WIDTH, r->width); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_HEIGHT, r->height); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_XOFFS, r->left); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_PREVZOOM_IN_YOFFS, r->top); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_WIDTH, r->width); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_HEIGHT, r->height); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_XOFFS, r->left); + if (!ret) + ret = s5k4ecgx_write(c, REG_G_CAPZOOM_IN_YOFFS, r->top); + + return ret; +} + +static int s5k4ecgx_set_output_framefmt(struct s5k4ecgx *priv) +{ + struct i2c_client *client = v4l2_get_subdevdata(&priv->sd); + int ret; + + ret = s5k4ecgx_write(client, REG_P_OUT_WIDTH(0), + priv->curr_frmsize->size.width); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_OUT_HEIGHT(0), + priv->curr_frmsize->size.height); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_FMT(0), + priv->curr_pixfmt->reg_p_format); + return ret; +} + +static int s5k4ecgx_init_sensor(struct v4l2_subdev *sd) +{ + int ret; + + ret = s5k4ecgx_set_ahb_address(sd); + /* The delay is from manufacturer's settings */ + msleep(100); + + if (!ret) + ret = s5k4ecgx_load_firmware(sd); + if (ret) + v4l2_err(sd, "Failed to write initial settings\n"); + + return ret; +} + +static int s5k4ecgx_gpio_set_value(struct s5k4ecgx *priv, int id, u32 val) +{ + if (!gpio_is_valid(priv->gpio[id].gpio)) + return 0; + gpio_set_value(priv->gpio[id].gpio, val); + + return 1; +} + +static int __s5k4ecgx_power_on(struct s5k4ecgx *priv) +{ + int ret; + + ret = regulator_bulk_enable(S5K4ECGX_NUM_SUPPLIES, priv->supplies); + if (ret) + return ret; + usleep_range(30, 50); + + /* The polarity of STBY is controlled by TSP */ + if (s5k4ecgx_gpio_set_value(priv, STBY, priv->gpio[STBY].level)) + usleep_range(30, 50); + + if (s5k4ecgx_gpio_set_value(priv, RST, priv->gpio[RST].level)) + usleep_range(30, 50); + + return 0; +} + +static int __s5k4ecgx_power_off(struct s5k4ecgx *priv) +{ + if (s5k4ecgx_gpio_set_value(priv, RST, !priv->gpio[RST].level)) + usleep_range(30, 50); + + if (s5k4ecgx_gpio_set_value(priv, STBY, !priv->gpio[STBY].level)) + usleep_range(30, 50); + + priv->streaming = 0; + + return regulator_bulk_disable(S5K4ECGX_NUM_SUPPLIES, priv->supplies); +} + +/* Find nearest matching image pixel size. */ +static int s5k4ecgx_try_frame_size(struct v4l2_mbus_framefmt *mf, + const struct s5k4ecgx_frmsize **size) +{ + unsigned int min_err = ~0; + int i = ARRAY_SIZE(s5k4ecgx_prev_sizes); + const struct s5k4ecgx_frmsize *fsize = &s5k4ecgx_prev_sizes[0], + *match = NULL; + + while (i--) { + int err = abs(fsize->size.width - mf->width) + + abs(fsize->size.height - mf->height); + if (err < min_err) { + min_err = err; + match = fsize; + } + fsize++; + } + if (match) { + mf->width = match->size.width; + mf->height = match->size.height; + if (size) + *size = match; + return 0; + } + + return -EINVAL; +} + +static int s5k4ecgx_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_fh *fh, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= ARRAY_SIZE(s5k4ecgx_formats)) + return -EINVAL; + code->code = s5k4ecgx_formats[code->index].code; + + return 0; +} + +static int s5k4ecgx_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, + struct v4l2_subdev_format *fmt) +{ + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + struct v4l2_mbus_framefmt *mf; + + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { + if (fh) { + mf = v4l2_subdev_get_try_format(fh, 0); + fmt->format = *mf; + } + return 0; + } + + mf = &fmt->format; + + mutex_lock(&priv->lock); + mf->width = priv->curr_frmsize->size.width; + mf->height = priv->curr_frmsize->size.height; + mf->code = priv->curr_pixfmt->code; + mf->colorspace = priv->curr_pixfmt->colorspace; + mf->field = V4L2_FIELD_NONE; + mutex_unlock(&priv->lock); + + return 0; +} + +static const struct s5k4ecgx_pixfmt *s5k4ecgx_try_fmt(struct v4l2_subdev *sd, + struct v4l2_mbus_framefmt *mf) +{ + int i = ARRAY_SIZE(s5k4ecgx_formats); + + while (--i) + if (mf->code == s5k4ecgx_formats[i].code) + break; + mf->code = s5k4ecgx_formats[i].code; + + return &s5k4ecgx_formats[i]; +} + +static int s5k4ecgx_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, + struct v4l2_subdev_format *fmt) +{ + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + const struct s5k4ecgx_frmsize *fsize = NULL; + const struct s5k4ecgx_pixfmt *pf; + struct v4l2_mbus_framefmt *mf; + int ret = 0; + + pf = s5k4ecgx_try_fmt(sd, &fmt->format); + s5k4ecgx_try_frame_size(&fmt->format, &fsize); + fmt->format.colorspace = V4L2_COLORSPACE_JPEG; + + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { + if (fh) { + mf = v4l2_subdev_get_try_format(fh, 0); + *mf = fmt->format; + } + return 0; + } + + mutex_lock(&priv->lock); + if (!priv->streaming) { + priv->curr_frmsize = fsize; + priv->curr_pixfmt = pf; + priv->set_params = 1; + } else { + ret = -EBUSY; + } + mutex_unlock(&priv->lock); + + return ret; +} + +static const struct v4l2_subdev_pad_ops s5k4ecgx_pad_ops = { + .enum_mbus_code = s5k4ecgx_enum_mbus_code, + .get_fmt = s5k4ecgx_get_fmt, + .set_fmt = s5k4ecgx_set_fmt, +}; + +/* + * V4L2 subdev controls + */ +static int s5k4ecgx_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct v4l2_subdev *sd = &container_of(ctrl->handler, struct s5k4ecgx, + handler)->sd; + struct i2c_client *client = v4l2_get_subdevdata(sd); + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + unsigned int i; + int err = 0; + + v4l2_dbg(1, debug, sd, "ctrl: 0x%x, value: %d\n", ctrl->id, ctrl->val); + + mutex_lock(&priv->lock); + switch (ctrl->id) { + case V4L2_CID_CONTRAST: + err = s5k4ecgx_write(client, REG_USER_CONTRAST, ctrl->val); + break; + + case V4L2_CID_SATURATION: + err = s5k4ecgx_write(client, REG_USER_SATURATION, ctrl->val); + break; + + case V4L2_CID_SHARPNESS: + /* TODO: Revisit, is this setting for all presets ? */ + for (i = 0; i < 4 && !err; i++) + err = s5k4ecgx_write(client, REG_USER_SHARPNESS(i), + ctrl->val * SHARPNESS_DIV); + break; + + case V4L2_CID_BRIGHTNESS: + err = s5k4ecgx_write(client, REG_USER_BRIGHTNESS, ctrl->val); + break; + } + mutex_unlock(&priv->lock); + if (err < 0) + v4l2_err(sd, "Failed to write s_ctrl err %d\n", err); + + return err; +} + +static const struct v4l2_ctrl_ops s5k4ecgx_ctrl_ops = { + .s_ctrl = s5k4ecgx_s_ctrl, +}; + +/* + * Reading s5k4ecgx version information + */ +static int s5k4ecgx_registered(struct v4l2_subdev *sd) +{ + int ret; + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + + mutex_lock(&priv->lock); + ret = __s5k4ecgx_power_on(priv); + if (!ret) { + ret = s5k4ecgx_read_fw_ver(sd); + __s5k4ecgx_power_off(priv); + } + mutex_unlock(&priv->lock); + + return ret; +} + +/* + * V4L2 subdev internal operations + */ +static int s5k4ecgx_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +{ + struct v4l2_mbus_framefmt *mf = v4l2_subdev_get_try_format(fh, 0); + + mf->width = s5k4ecgx_prev_sizes[0].size.width; + mf->height = s5k4ecgx_prev_sizes[0].size.height; + mf->code = s5k4ecgx_formats[0].code; + mf->colorspace = V4L2_COLORSPACE_JPEG; + mf->field = V4L2_FIELD_NONE; + + return 0; +} + +static const struct v4l2_subdev_internal_ops s5k4ecgx_subdev_internal_ops = { + .registered = s5k4ecgx_registered, + .open = s5k4ecgx_open, +}; + +static int s5k4ecgx_s_power(struct v4l2_subdev *sd, int on) +{ + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + int ret; + + v4l2_dbg(1, debug, sd, "Switching %s\n", on ? "on" : "off"); + + if (on) { + ret = __s5k4ecgx_power_on(priv); + if (ret < 0) + return ret; + /* Time to stabilize sensor */ + msleep(100); + ret = s5k4ecgx_init_sensor(sd); + if (ret < 0) + __s5k4ecgx_power_off(priv); + else + priv->set_params = 1; + } else { + ret = __s5k4ecgx_power_off(priv); + } + + return 0; +} + +static int s5k4ecgx_log_status(struct v4l2_subdev *sd) +{ + v4l2_ctrl_handler_log_status(sd->ctrl_handler, sd->name); + + return 0; +} + +static const struct v4l2_subdev_core_ops s5k4ecgx_core_ops = { + .s_power = s5k4ecgx_s_power, + .log_status = s5k4ecgx_log_status, +}; + +static int __s5k4ecgx_s_stream(struct s5k4ecgx *priv, int on) +{ + struct i2c_client *client = v4l2_get_subdevdata(&priv->sd); + const struct v4l2_rect *crop_rect = &priv->curr_frmsize->input_window; + int ret = 0; + + /* TODO: Add s_stream(0) handling */ + + if (!on || !priv->set_params) + return 0; + + ret = s5k4ecgx_set_input_window(client, crop_rect); + if (!ret) + ret = s5k4ecgx_set_zoom_window(client, crop_rect); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_INPUTS_CHANGE_REQ, 1); + if (!ret) + ret = s5k4ecgx_write(client, 0x70000a1e, 0x28); + if (!ret) + ret = s5k4ecgx_write(client, 0x70000ad4, 0x3c); + if (!ret) + ret = s5k4ecgx_set_output_framefmt(priv); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_PVI_MASK(0), 0x52); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_FR_TIME_TYPE(0), + FR_TIME_DYNAMIC); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_FR_TIME_Q_TYPE(0), + FR_TIME_Q_BEST_FRRATE); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_MIN_FR_TIME(0), + US_TO_FR_TIME(33300)); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_MAX_FR_TIME(0), + US_TO_FR_TIME(66600)); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_PREV_MIRROR(0), 0); + if (!ret) + ret = s5k4ecgx_write(client, REG_P_CAP_MIRROR(0), 0); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_ACTIVE_PREV_CFG, 0); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_PREV_OPEN_AFTER_CH, 1); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_NEW_CFG_SYNC, 1); + if (!ret) + ret = s5k4ecgx_write(client, REG_G_PREV_CFG_CHG, 1); + if (!ret) + priv->set_params = 0; + + return ret; +} + +static int s5k4ecgx_s_stream(struct v4l2_subdev *sd, int on) +{ + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + int ret = 0; + + v4l2_dbg(1, debug, sd, "Turn streaming %s\n", on ? "on" : "off"); + + mutex_lock(&priv->lock); + if (on) { + /* Ignore if s_stream is called twice */ + if (priv->streaming == !on) { + ret = __s5k4ecgx_s_stream(priv, on); + if (!ret) + priv->streaming = on & 1; + } + } + mutex_unlock(&priv->lock); + + return ret; +} + +static const struct v4l2_subdev_video_ops s5k4ecgx_video_ops = { + .s_stream = s5k4ecgx_s_stream, +}; + +static const struct v4l2_subdev_ops s5k4ecgx_ops = { + .core = &s5k4ecgx_core_ops, + .pad = &s5k4ecgx_pad_ops, + .video = &s5k4ecgx_video_ops, +}; + +/* + * GPIO setup + */ +static int s5k4ecgx_config_gpio(int nr, int val, const char *name) +{ + unsigned long flags = val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; + int ret; + + if (!gpio_is_valid(nr)) + return 0; + ret = gpio_request_one(nr, flags, name); + if (!ret) + gpio_export(nr, 0); + + return ret; +} + +static void s5k4ecgx_free_gpios(struct s5k4ecgx *priv) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(priv->gpio); i++) { + if (!gpio_is_valid(priv->gpio[i].gpio)) + continue; + gpio_free(priv->gpio[i].gpio); + priv->gpio[i].gpio = -EINVAL; + } +} + +static int s5k4ecgx_config_gpios(struct s5k4ecgx *priv, + const struct s5k4ecgx_platform_data *pdata) +{ + const struct s5k4ecgx_gpio *gpio = &pdata->gpio_stby; + int ret; + + priv->gpio[STBY].gpio = -EINVAL; + priv->gpio[RST].gpio = -EINVAL; + + ret = s5k4ecgx_config_gpio(gpio->gpio, gpio->level, "S5K4ECGX_STBY"); + + if (ret) { + s5k4ecgx_free_gpios(priv); + return ret; + } + priv->gpio[STBY] = *gpio; + if (gpio_is_valid(gpio->gpio)) + gpio_set_value(gpio->gpio, 0); + + gpio = &pdata->gpio_reset; + + ret = s5k4ecgx_config_gpio(gpio->gpio, gpio->level, "S5K4ECGX_RST"); + if (ret) { + s5k4ecgx_free_gpios(priv); + return ret; + } + priv->gpio[RST] = *gpio; + if (gpio_is_valid(gpio->gpio)) + gpio_set_value(gpio->gpio, 0); + + return 0; +} + +static int s5k4ecgx_init_v4l2_ctrls(struct s5k4ecgx *priv) +{ + const struct v4l2_ctrl_ops *ops = &s5k4ecgx_ctrl_ops; + struct v4l2_ctrl_handler *hdl = &priv->handler; + int ret; + + ret = v4l2_ctrl_handler_init(hdl, 4); + if (ret) + return ret; + + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BRIGHTNESS, -208, 127, 1, 0); + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST, -127, 127, 1, 0); + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION, -127, 127, 1, 0); + + /* Sharpness default is 24612, and then (24612/SHARPNESS_DIV) = 2 */ + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SHARPNESS, -32704/SHARPNESS_DIV, + 24612/SHARPNESS_DIV, 1, 2); + if (hdl->error) { + ret = hdl->error; + v4l2_ctrl_handler_free(hdl); + return ret; + } + priv->sd.ctrl_handler = hdl; + + return 0; +}; + +static int s5k4ecgx_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int ret, i; + struct v4l2_subdev *sd; + struct s5k4ecgx *priv; + struct s5k4ecgx_platform_data *pdata = client->dev.platform_data; + + if (pdata == NULL) { + dev_err(&client->dev, "platform data is missing!\n"); + return -EINVAL; + } + priv = devm_kzalloc(&client->dev, sizeof(struct s5k4ecgx), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + mutex_init(&priv->lock); + priv->streaming = 0; + + sd = &priv->sd; + /* Registering subdev */ + v4l2_i2c_subdev_init(sd, client, &s5k4ecgx_ops); + strlcpy(sd->name, S5K4ECGX_DRIVER_NAME, sizeof(sd->name)); + + sd->internal_ops = &s5k4ecgx_subdev_internal_ops; + /* Support v4l2 sub-device user space API */ + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + + priv->pad.flags = MEDIA_PAD_FL_SOURCE; + sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR; + ret = media_entity_init(&sd->entity, 1, &priv->pad, 0); + if (ret) + return ret; + + ret = s5k4ecgx_config_gpios(priv, pdata); + if (ret) { + dev_err(&client->dev, "Failed to set gpios\n"); + goto out_err1; + } + for (i = 0; i < S5K4ECGX_NUM_SUPPLIES; i++) + priv->supplies[i].supply = s5k4ecgx_supply_names[i]; + + ret = devm_regulator_bulk_get(&client->dev, S5K4ECGX_NUM_SUPPLIES, + priv->supplies); + if (ret) { + dev_err(&client->dev, "Failed to get regulators\n"); + goto out_err2; + } + ret = s5k4ecgx_init_v4l2_ctrls(priv); + if (ret) + goto out_err2; + + priv->curr_pixfmt = &s5k4ecgx_formats[0]; + priv->curr_frmsize = &s5k4ecgx_prev_sizes[0]; + + return 0; + +out_err2: + s5k4ecgx_free_gpios(priv); +out_err1: + media_entity_cleanup(&priv->sd.entity); + + return ret; +} + +static int s5k4ecgx_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct s5k4ecgx *priv = to_s5k4ecgx(sd); + + mutex_destroy(&priv->lock); + v4l2_device_unregister_subdev(sd); + v4l2_ctrl_handler_free(&priv->handler); + media_entity_cleanup(&sd->entity); + + return 0; +} + +static const struct i2c_device_id s5k4ecgx_id[] = { + { S5K4ECGX_DRIVER_NAME, 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, s5k4ecgx_id); + +static struct i2c_driver v4l2_i2c_driver = { + .driver = { + .owner = THIS_MODULE, + .name = S5K4ECGX_DRIVER_NAME, + }, + .probe = s5k4ecgx_probe, + .remove = s5k4ecgx_remove, + .id_table = s5k4ecgx_id, +}; + +module_i2c_driver(v4l2_i2c_driver); + +MODULE_DESCRIPTION("Samsung S5K4ECGX 5MP SOC camera"); +MODULE_AUTHOR("Sangwook Lee <sangwook.lee(a)linaro.org>"); +MODULE_AUTHOR("Seok-Young Jang <quartz.jang(a)samsung.com>"); +MODULE_LICENSE("GPL"); +MODULE_FIRMWARE(S5K4ECGX_FIRMWARE); diff --git a/include/media/s5k4ecgx.h b/include/media/s5k4ecgx.h new file mode 100644 index 0000000..90c1be7 --- /dev/null +++ b/include/media/s5k4ecgx.h @@ -0,0 +1,37 @@ +/* + * S5K4ECGX image sensor header file + * + * Copyright (C) 2012, Linaro + * Copyright (C) 2012, Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef S5K4ECGX_H +#define S5K4ECGX_H + +/** + * struct s5k4ecgx_gpio - data structure describing a GPIO + * @gpio : GPIO number + * @level: indicates active state of the @gpio + */ +struct s5k4ecgx_gpio { + int gpio; + int level; +}; + +/** + * struct ss5k4ecgx_platform_data- s5k4ecgx driver platform data + * @gpio_reset: GPIO driving RESET pin + * @gpio_stby : GPIO driving STBY pin + */ + +struct s5k4ecgx_platform_data { + struct s5k4ecgx_gpio gpio_reset; + struct s5k4ecgx_gpio gpio_stby; +}; + +#endif /* S5K4ECGX_H */ -- 1.7.9.5

12 years, 10 months

boot fail with omap4-panda.dts release 12.08

by Viresh Kumar

Hi, I am trying to boot kernel on panda board. I got the source from: http://git.linaro.org/gitweb?p=kernel/linux-linaro-tracking.git;a=shortlog;… Following is my branch HEAD: commit 7f39bb7ab9591c6254e5930a00d762e4b37f08b2 Merge: 1d10459 8b29cd5 Author: Andrey Konovalov <andrey.konovalov(a)linaro.org> Date: Mon Sep 3 17:10:24 2012 +0400 Merge branch 'tracking-ll-last-minute-fixes' into merge-linux-linaro I am using following for compilation: omap2plus_defconfig, omap4-panda.dts When i try to boot, kernel hangs after uncompressing linux... If i just remove the 0x815f0000 from bootm command.. i.e. boot without dtb... it boots fine. Earlier i have flashed my card using linaro-media-create. Got, H/w package and devel rootfs from 12.08 release. Replaced uImage and board.dtb in /dev/mmcblk0p1 viresh

12 years, 10 months

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linaro-dev September 2012