linaro-dev December 2010

linaro-dev@lists.linaro.org

84 participants
75 discussions

by Ira Rosen

Hi, After working fine for a while, the board crashed during the weekend, and I am getting the following error: Texas Instruments X-Loader 1.4.4ss (Sep 30 2010 - 14:44:32) Beagle xM Rev A Reading boot sector not there u-boot.bin not found or blank nand contents - attempting serial boot . . . ## Ready for binary (kermit) download to 0x80008000 at 115200 bps.. The SD card was formatted and reinstalled: ./linaro-media-create --mmc /dev/mmcblk0 --dev beagle --binary image/linaro-m-headless-tar-*.tar.gz --hwpack ../hwpack_linaro-omap3_20101105-75_armel_supported.tar.gz but it didn't help. The card seems to be OK: root@idol-laptop:~# df Filesystem 1K-blocks Used Available Use% Mounted on /dev/sda2 144183992 38735348 98124484 29% / none 1574348 372 1573976 1% /dev none 1578568 5204 1573364 1% /dev/shm none 1578568 120 1578448 1% /var/run none 1578568 0 1578568 0% /var/lock none 1578568 0 1578568 0% /lib/init/rw /dev/mmcblk0p2 3731768 360100 3182104 11% /media/rootfs /dev/mmcblk0p1 71133 8481 62653 12% /media/boot ls -l /media/boot/ total 8480 -rwxr-xr-x 1 idol idol 397 2010-11-21 11:39 boot.ini -rwxr-xr-x 1 idol idol 397 2010-11-21 11:39 boot.scr -rwxr-xr-x 1 idol idol 18360 2010-11-21 11:39 MLO -rwxr-xr-x 1 idol idol 192204 2010-11-21 11:39 u-boot.bin -rwxr-xr-x 1 idol idol 3704228 2010-11-21 11:39 uImage -rwxr-xr-x 1 idol idol 4766721 2010-11-21 11:39 uInitrd ls -l /media/rootfs/ total 784 drwxr-xr-x 2 root root 4096 2010-11-21 06:46 bin drwxr-xr-x 2 root root 4096 2010-11-21 11:36 boot drwxr-xr-x 4 root root 4096 2010-11-21 06:42 dev drwxr-xr-x 60 root root 4096 2010-11-21 11:41 etc drwxr-xr-x 2 root root 4096 2010-10-07 11:15 home lrwxrwxrwx 1 root root 39 2010-11-21 11:39 initrd.img -> boot/initrd.img-2.6.35-1006-linaro-omap drwxr-xr-x 10 root root 4096 2010-11-21 06:45 lib drwx------ 2 root root 16384 2010-11-21 11:36 lost+found -rw-r--r-- 1 root root 708215 2010-11-21 06:48 md5sum.txt drwxr-xr-x 2 root root 4096 2010-11-21 06:41 media drwxr-xr-x 2 root root 4096 2010-10-07 11:15 mnt drwxr-xr-x 2 root root 4096 2010-11-21 06:41 opt drwxr-xr-x 2 root root 4096 2010-10-07 11:15 proc drwx------ 2 root root 4096 2010-11-21 11:59 root drwxr-xr-x 2 root root 4096 2010-11-21 11:34 sbin drwxr-xr-x 2 root root 4096 2010-05-09 21:20 selinux drwxr-xr-x 2 root root 4096 2010-11-21 06:41 srv drwxr-xr-x 2 root root 4096 2010-09-25 00:05 sys drwxrwxrwt 2 root root 4096 2010-11-21 11:36 tmp drwxr-xr-x 10 root root 4096 2010-11-21 06:41 usr drwxr-xr-x 13 root root 4096 2010-11-21 06:38 var lrwxrwxrwx 1 root root 36 2010-11-21 11:41 vmlinuz -> boot/vmlinuz-2.6.35-1006-linaro-omap fdisk -l Disk /dev/mmcblk0: 3959 MB, 3959422976 bytes 255 heads, 63 sectors/track, 481 cylinders Units = cylinders of 16065 * 512 = 8225280 bytes Sector size (logical/physical): 512 bytes / 512 bytes I/O size (minimum/optimal): 512 bytes / 512 bytes Disk identifier: 0x00042b57 Device Boot Start End Blocks Id System /dev/mmcblk0p1 * 1 9 72261 c W95 FAT32 (LBA) /dev/mmcblk0p2 10 481 3791340 83 Linux Any clue? Thanks, Ira

14 years, 3 months

[PATCH V2] ARM: SAMSUNG: Add support for clock debugging through debug-fs interface

by Amit Daniel Kachhap

This patch adds support for clock information exposed to debug-fs interface. Signed-off-by: Amit Daniel Kachhap <amit.daniel(a)samsung.com> --- Code modified for V2 version are, a)Inserted the debug-fs code inside macro CONFIG_PM_DEBUG as suggested by yong.shen(a)linaro.org. b)Removed macro CONFIG_PLAT_SAMSUNG and implemented other coding standards as suggested by kgene.kim(a)samsung.com arch/arm/plat-samsung/clock.c | 91 ++++++++++++++++++++++++++++ arch/arm/plat-samsung/include/plat/clock.h | 3 + 2 files changed, 94 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c index e8d20b0..029a49d 100644 --- a/arch/arm/plat-samsung/clock.c +++ b/arch/arm/plat-samsung/clock.c @@ -39,6 +39,9 @@ #include <linux/clk.h> #include <linux/spinlock.h> #include <linux/io.h> +#if defined(CONFIG_DEBUG_FS) +#include <linux/debugfs.h> +#endif #include <mach/hardware.h> #include <asm/irq.h> @@ -447,3 +450,91 @@ int __init s3c24xx_register_baseclocks(unsigned long xtal) return 0; } +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) +/* debugfs support to trace clock tree hierarchy and attributes */ + +static struct dentry *clk_debugfs_root; + +static int clk_debugfs_register_one(struct clk *c) +{ + int err; + struct dentry *d, *child, *child_tmp; + struct clk *pa = c->parent; + char s[255]; + char *p = s; + + p += sprintf(p, "%s", c->name); + /*Append id field with name also*/ + if (c->id >= 0) + sprintf(p, ":%d", c->id); + + d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); + if (!d) + return -ENOMEM; + + c->dent = d; + + d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usage); + if (!d) { + err = -ENOMEM; + goto err_out; + } + d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); + if (!d) { + err = -ENOMEM; + goto err_out; + } + return 0; + +err_out: + d = c->dent; + list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child) + debugfs_remove(child); + debugfs_remove(c->dent); + return err; +} + +static int clk_debugfs_register(struct clk *c) +{ + int err; + struct clk *pa = c->parent; + + if (pa && !pa->dent) { + err = clk_debugfs_register(pa); + if (err) + return err; + } + + if (!c->dent) { + err = clk_debugfs_register_one(c); + if (err) + return err; + } + return 0; +} + +static int __init clk_debugfs_init(void) +{ + struct clk *c; + struct dentry *d; + int err; + + d = debugfs_create_dir("clock", NULL); + if (!d) + return -ENOMEM; + clk_debugfs_root = d; + + list_for_each_entry(c, &clocks, list) { + err = clk_debugfs_register(c); + if (err) + goto err_out; + } + return 0; +err_out: + debugfs_remove_recursive(clk_debugfs_root); + return err; +} +late_initcall(clk_debugfs_init); + +#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ + diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index 0fbcd0e..9a82b88 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h @@ -47,6 +47,9 @@ struct clk { struct clk_ops *ops; int (*enable)(struct clk *, int enable); +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) + struct dentry *dent; /* For visible tree hierarchy */ +#endif }; /* other clocks which may be registered by board support */ -- 1.6.2.5

14 years, 3 months

Minutes & actions: Kernel Working Group meeting of Dec 13th, 2010

by Mounir Bsaibes

Greetings, Enclosed you'll find a link to the agenda, minutes and actions from the Linaro kernel working group weekly meeting of December 13, 2010. https://wiki.linaro.org/WorkingGroups/KernelConsolidation/Meetings/2010-12-…<https://wiki.linaro.org/WorkingGroups/KernelConsolidation/Meetings/2010-11-…> == Summary == * Reviewed Freescale BSP. Many drivers are close to being upstreamable. * eMMC performance improvement, initial numbers shows 5% performance gains for large writes and 10% performance gains for large reads. * USB patches for 8500 have been accepted into Greg KH's tree, and Felipe Balbi's tree. * u-boot is in the final phases of the 2010-12 release. Patch from last week (environment code would incorrectly report correctable errors) accepted in mainline. * Working RTC issues: timer list and timer queue which are precursors to getting the Android alarms upstreamed. Patches in -tip slated for 2.6.38. LWN article for timers and alarms. * Working IRQ code in core code in support of virtual IRQ. Working on QEMU model of Versatile Express and the Nvidia Tegra (Serial port and eMMC). Dusting off u-boot work that John Rigby has done so that device tree is passed correctly to kernel. Kernel configuration management solution in the works -- "Kconfig fragment". Configuration process loads an alternative per-board Kconfig file that sets defaults for Kconfig, and then sets up with the full Kconfig, so that you can have definitions set up for a family of SoCs or boards. * Looked at gitdm tool, considering sending in a patch to list Linaro people as belonging to Linaro instead of to whatever gitdm currently accounts them to. * Finished kexec() blueprint specification, will get it reviewed next. * Progress on RCU priority boosting, additional energy-management tasks and scalability tasks look to be easily handled. Regards, Mounir

14 years, 3 months

Linaro Infrastructure Team Weekly Report (2010-12-17 to 2010-12-23)

by Ian Smith

All, The weekly report for the Linaro Infrastructure team may be found at:- Status report: https://wiki.linaro.org/Platform/Infrastructure/Status/2010-12-23 Burndown chart: This link is awaiting the production of new burndown charts. The Infrastructure related blueprints from the maverick cycle, of which currently there are 4 active ones (4 from the last report), are showing that there are 9 work items in progress (8 last report), and 10 work items to undertake (11 last report). These are to be moved into the natty cycle if still required. * arm-m-validation-dashboard; 0 work items completed (1 last report); 4 in progress (3 last report); 6 to do (6 last report); 0 work item added (1 last report) * arm-m-image-building-console; no change in status from last report; 3 in progress; 3 to do * arm-m-automated-testing-framework; no change in status from last report; 1 in progress; 0 to do * arm-m-testsuites-and-profilers; no change in status from last report; 1 in progress; 1 to do In the natty cycle, the following lists the current active Blueprints, or Blueprints planned and not started. Currently there are 5 active Blueprints (4 from the last report), which are showing that there are 9 work items in progress (8 last report), 43 work items to undertake (41 last report), 2 work items postponed in total (2 last report) and 0 work items added (1 item added last report). * other-linaro-n-improve-linaro-media-create: 8 work items completed in total (7 last week); 2 work items in progress (3 last week); 8 work items to do (8 last week); 1 work item added this week (1 last week). * other-linaro-n-test-result-display-in-launch-control: 0 work items completed (0 last week); 1 work item in progress (1 last week); 10 work items to do (10 last week); 0 work items added (0 last week) * other-linaro-n-patch-tracking: 0 work item completed (0 last week); 2 work items in progress (2 last week); 9 work items to do (9 last week) * other-linaro-n-image-building: 2 work items in progress (2 last week); 5 work items to do (5 last week); 2 work items postponed (2 last week); 0 work items added (0 last week) * other-linaro-n-continuous-integration: Not started - awaiting a Hudson build server (RT#42278). * other-linaro-n-package-development-tools: Not Started; 9 work items to do * other-linaro-n-benchmark-reports-in-launch-control: 2 work item completed (2 last week); 2 work items in progress (2 last week); 2 work items to do (2 last week) Specifics accomplished this week include:- * Reports have indicated reduced accomplishments due to people being on leave. * Work on a comprehensive MX51 test plan than headless one: https://wiki.linaro.org/Platform/QA/TestCases/IMX51EVK - Adding SATA, Backlight, Touchscreen, Keypad, etc. * [ImproveLinaroMediaCreate] port check_device to python:DONE. * Submitted the hardware pack licence request to the TSC for approval. Please let me know if you have any comments or questions. Kind Regards, Ian

14 years, 3 months

Linaro gcc ICE bug

by Khem Raj

Hi The bug http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46883 files against GCC trunk also happens with linaro gcc 4.5 My guess is that there is a backported patch from trunk into linaro 4.5 tree thats causing this ICE This ICE does not happen on upstream gcc-4.5 branch I havent figured out the commit yet. Should you need a bug in linaro bug tracker I will be happy to file one Thanks -Khem

14 years, 3 months

Re: Freescale Linux BSP review

by Arnd Bergmann

Following a discussion we had on the Freescale BSP, I started a tree at http://git.linaro.org/gitweb?p=people/arnd/imx.git;a=summary that has the same contents as the tree on the freescale git server, but splits them into six branches at this time, though the number should increase. The current split is * master -- an octopus merge of all the other branches, identical to the BSP 381 patches total 1286 files changed, 882747 insertions(+), 2932 deletions(-) * drv-mxc -- all drivers in the new drivers/mxc/ directory and new drivers in drivers/char/, as these typically introduce new user ABIs that need very careful review. 23 patches 189 files changed, 97215 insertions(+), 0 deletions(-) * amd-gpu -- a single but huge driver for the GPU. As is normally the case with GPU drivers, we can expect long discussions before it will get considered for mainline 4 patches 98 files changed, 278321 insertions(+), 0 deletions(-) * ath -- another single driver that is rather large, for the ath6km wifi controller. Split out because it is not owned by freescale. 4 patches 169 files changed, 94561 insertions(+), 0 deletions(-) * other-subsys -- device drivers for existing subsystems. These should be largely uncontroversial, because they don't introduce new ABIs and the code looks clean enough for a straight- forward inclusion through the respective subsystem maintainers. Someone still needs to go through these and split them up by subsystem and separate new drivers from patches to existing drivers where needed. 159 patches 445 files changed, 270318 insertions(+), 959 deletions(-) * arch -- everything in the arch/arm, directory, this will go through review on the linux-arm-kernel mailing list. This also needs to be split up further into smaller branches. 179 patches 378 files changed, 140275 insertions(+), 1991 deletions(-) * external -- patches that look unrelated to the rest, and are probably backported from patches that already went upstream. 9 patches 7 files changed, 37 insertions(+), 32 deletions(-) Arnd

14 years, 3 months

autobuild system of linaro

by Paul Li

Hi, If I want to build the system from scratch, what should I do? I mean, where to get the deb binary packages of Linaro? Where to get the image creator tool? etc. thank you. B.R Paul

14 years, 3 months

[PM] 22/12/2010 - Minutes for the Power Management WG weekly call

by Vishwanath Sripathy

Hello Everyone, The minutes of the weekly call can be found at: https://wiki.linaro.org/WorkingGroups/PowerManagement/Meetings/2010-12-22 Attendees: Vishwa, Torez, Vincent, Yong Regards, Vishwa

14 years, 3 months

Weekly Release Meeting Cancelled

by Jamie Bennett

Hi, Due to the holiday season many key people are on vacation at the moment. For this reason the weekly Release Meeting has been cancelled. The next meeting will be Wednesday 5th January 2010. Regards, Jamie. -- Linaro Release Manager

14 years, 3 months

MMC double buffering

by Per Forlin

Hi, I am working on the blueprint https://blueprints.launchpad.net/linux-linaro/+spec/other-storage-performan…. Currently I am investigating performance for DMA vs PIO on eMMC. Pros and cons for DMA on MMC + Offloads CPU + Fewer interrupts, one single interrupt for each transfer compared to 100s or even 1000s + Power save, DMA consumes less power than CPU - Less bandwidth / throughput compared to PIO-CPU The reason for introducing double buffering in the MMC framework is to address the throughput issue for DMA on MMC. The assumption is that the CPU and DMA have higher throughput than the MMC / SD-card. My hypothesis is that the difference in performance between PIO-mode and DMA-mode for MMC is due to latency for preparing a DMA-job. If the next DMA-job could be prepared while the current job is ongoing this latency would be reduced. The biggest part of preparing a DMA-job is maintenance of caches. In my case I run on U5500 (mach-ux500) which has both L1 and L2 caches. The host mmc driver in use is the mmci driver (PL180). I have done a hack in both the MMC-framework and mmci in order to make a prove of concept. I have run IOZone to get measurements to prove my case worthy. The next step, if the results are promising will be to clean up my work and send out patches for review. The DMAC in ux500 support to modes LOG and PHY. LOG - Many logical channels are multiplex on top of one physical channel PHY - Only one channel per physical channel DMA mode LOG and PHY have different latency both HW and SW wise. One could almost treat them as "two different DMACs. To get a wider test scope I have tested using both modes. Summary of the results. * It is optional for the mmc host driver to utitlize the 2-buf support. 2-buf in framework requires no change in the host drivers. * IOZone shows no performance hit on existing drivers* if adding 2-buf to the framework but not in the host driver. (* So far I have only test one driver) * The performance gain for DMA using 2-buf is probably proportional to the cache maintenance time. The faster the card is the more significant the cache maintenance part becomes and vice versa. * For U5500 with 2-buf performance for DMA is: Throughput: DMA vanilla vs DMA 2-buf * read +5-10 % * write +0-3 % CPU load: CPU vs DMA 2-buf * read large data: minus 10-20 units of % * read small data: same as PIO * write: same load as PIO ( why? ) Here follows two of the measurements from IOZones comparing MMC with double buffering and without. The rest you can find in the text files attached. === Performance CPU compared with DMA vanilla kernel === Absolute diff: MMC-VANILLA-CPU -> MMC-VANILLA-DMA-LOG random random KB reclen write rewrite read reread read write 51200 4 -14 -8 -1005 -988 -679 -1 cpu: -0.0 -0.1 -0.8 -0.9 -0.7 +0.0 51200 8 -35 -34 -1763 -1791 -1327 +0 cpu: +0.0 -0.1 -0.9 -1.2 -0.7 +0.0 51200 16 +6 -38 -2712 -2728 -2225 +0 cpu: -0.1 -0.0 -1.6 -1.2 -0.7 -0.0 51200 32 -10 -79 -3640 -3710 -3298 -1 cpu: -0.1 -0.2 -1.2 -1.2 -0.7 -0.0 51200 64 +31 -16 -4401 -4533 -4212 -1 cpu: -0.2 -0.2 -0.6 -1.2 -1.2 -0.0 51200 128 +58 -58 -4749 -4776 -4532 -4 cpu: -0.2 -0.0 -1.2 -1.1 -1.2 +0.1 51200 256 +192 +283 -5343 -5347 -5184 +13 cpu: +0.0 +0.1 -1.2 -0.6 -1.2 +0.0 51200 512 +232 +470 -4663 -4690 -4588 +171 cpu: +0.1 +0.1 -4.5 -3.9 -3.8 -0.1 51200 1024 +250 +68 -3151 -3318 -3303 +122 cpu: -0.1 -0.5 -14.0 -13.5 -14.0 -0.1 51200 2048 +224 +401 -2708 -2601 -2612 +161 cpu: -1.7 -1.3 -18.4 -19.5 -17.8 -0.5 51200 4096 +194 +417 -2380 -2361 -2520 +242 cpu: -1.3 -1.6 -19.4 -19.9 -19.4 -0.6 51200 8192 +228 +315 -2279 -2327 -2291 +270 cpu: -1.0 -0.9 -20.8 -20.3 -21.0 -0.6 51200 16384 +254 +289 -2260 -2232 -2269 +308 cpu: -0.8 -0.8 -20.5 -19.9 -21.5 -0.4 === Performance CPU compared with DMA with MMC double buffering === Absolute diff: MMC-VANILLA-CPU -> MMC-MMCI-2-BUF-DMA-LOG random random KB reclen write rewrite read reread read write 51200 4 -7 -11 -533 -513 -365 +0 cpu: -0.0 -0.1 -0.5 -0.7 -0.4 +0.0 51200 8 -19 -28 -916 -932 -671 +0 cpu: -0.0 -0.0 -0.3 -0.6 -0.2 +0.0 51200 16 +14 -13 -1467 -1479 -1203 +1 cpu: +0.0 -0.1 -0.7 -0.7 -0.2 -0.0 51200 32 +61 +24 -2008 -2088 -1853 +4 cpu: -0.3 -0.2 -0.7 -0.7 -0.2 -0.0 51200 64 +130 +84 -2571 -2692 -2483 +5 cpu: +0.0 -0.4 -0.1 -0.7 -0.7 +0.0 51200 128 +275 +279 -2760 -2747 -2607 +19 cpu: -0.1 +0.1 -0.7 -0.6 -0.7 +0.1 51200 256 +558 +503 -3455 -3429 -3216 +55 cpu: -0.1 +0.1 -0.8 -0.1 -0.8 +0.0 51200 512 +608 +820 -2476 -2497 -2504 +154 cpu: +0.2 +0.5 -3.3 -2.1 -2.7 +0.0 51200 1024 +652 +493 -818 -977 -1023 +291 cpu: +0.0 -0.1 -13.2 -12.8 -13.3 +0.1 51200 2048 +654 +809 -241 -218 -242 +501 cpu: -1.5 -1.2 -16.9 -18.2 -17.0 -0.2 51200 4096 +482 +908 -80 +82 -154 +633 cpu: -1.4 -1.2 -19.1 -18.4 -18.6 -0.2 51200 8192 +643 +810 +199 +186 +182 +675 cpu: -0.8 -0.7 -19.8 -19.2 -19.5 -0.7 51200 16384 +684 +724 +275 +323 +269 +724 cpu: -0.6 -0.7 -19.2 -18.6 -19.8 -0.2

14 years, 4 months

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linaro-dev December 2010