Hi Joao,
Your conclusion is correct. We currently don't support HDMI on the latest
mainline kernel, only on the LSK 3.10 kernel.
Regards,
Ryan
On 17 June 2015 at 17:04, Joao Pinto <Joao.Pinto(a)synopsys.com> wrote:
> Hi Ryan!
>
>
>
> We are now facing a new challenge! We need to output video from the
> HDMI1/2 available in the Juno r1 Board.
>
> By checking the device tree, I concluded that video is not supported for
> now… Can you advise me about this subject?
>
>
>
> Thanks,
>
> Joao
>
>
>
> *From:* Ryan Harkin [mailto:ryan.harkin@linaro.org]
> *Sent:* Wednesday, June 17, 2015 4:28 PM
> *To:* Joao Pinto
> *Cc:* Linaro Dev Mailman List; Linaro Kernel Mailman List
> *Subject:* Re: Problems detected in ARM Juno r1
>
>
>
> Hi Joao,
>
> I see from emails via another route that you've solved your problems by
> using updated software from Connected Community.
>
> For reference, the Linaro release that supports PCIe on Juno R1 is the
> "latest.xml" and "juno-oe" variant from this release:
>
> http://releases.linaro.org/15.05/members/arm/platforms
>
> Regards,
>
> Ryan.
>
>
>
> On 17 June 2015 at 13:34, Joao Pinto <Joao.Pinto(a)synopsys.com> wrote:
>
> Hi!
>
> My name is Joao Pinto and I am currently developing a pilot project with
> ARM'
> Juno r1 board.
> The application is very simple: I have a Synopsys board connected to Juno
> through PCIe.
> Using ARM' factory kernel image or our own linaro kernel image (using
> latest
> release: 4.1 rc4), PCI initialization log provides some worrying messages
> (please check bellow log).
>
> pci_hotplug: PCI Hot Plug PCI Core version: 0.5
> pciehp: PCI Express Hot Plug Controller Driver version: 0.4
> PCI host bridge /pci@30000000 ranges:
> IO 0x5ff00000..0x5fffffff -> 0x00000000
> MEM 0x50000000..0x5effffff -> 0x00000000
> MEM 0x4000000000..0x407fffffff -> 0x20000000
> MEM 0x4080000000..0x40ffffffff -> 0xa0000000
> XpressRICH3-AXI PCIe Host Bridge 4x link negotiated (gen 2), maxpayload
> 256,
> maxreqsize 1024
> pcie-xr3 7ff30000.pci: PCI host bridge to bus 0000:00
> pci_bus 0000:00: root bus resource [bus 00-ff]
> pci_bus 0000:00: root bus resource [io 0x0000-0xfffff]
> pci_bus 0000:00: root bus resource [mem 0x50000000-0x5effffff] (bus address
> [0x00000000-0x0effffff])
> pci_bus 0000:00: root bus resource [mem 0x4000000000-0x407fffffff pref]
> (bus
> address [0x20000000-0x9fffffff])
> pci_bus 0000:00: root bus resource [mem 0x4080000000-0x40ffffffff] (bus
> address
> [0xa0000000-0x11fffffff])
> pci 0000:00:00.0: [1556:1100] type 01 class 0xff0000
> pci 0000:00:00.0: reg 0x10: [mem 0x50000000-0x50003fff 64bit pref]
> pci 0000:00:00.0: supports D1 D2
> pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
> pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:01:00.0: [111d:8090] type 01 class 0x060400
> pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
> pci 0000:01:00.0: of_irq_parse_pci() failed with rc=-19
> pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:02:01.0: [111d:8090] type 01 class 0x060400
> pci 0000:02:01.0: PME# supported from D0 D3hot D3cold
> pci 0000:02:01.0: of_irq_parse_pci() failed with rc=-19
> pci 0000:02:02.0: [111d:8090] type 01 class 0x060400
> pci 0000:02:02.0: PME# supported from D0 D3hot D3cold
> pci 0000:02:02.0: of_irq_parse_pci() failed with rc=-19
> pci 0000:02:03.0: [111d:8090] type 01 class 0x060400
> pci 0000:02:03.0: PME# supported from D0 D3hot D3cold
> pci 0000:02:03.0: of_irq_parse_pci() failed with rc=-19
> pci 0000:02:0c.0: [111d:8090] type 01 class 0x060400
> pci 0000:02:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:02:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:02:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:02:0c.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:02:10.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:02:1f.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> pci 0000:03:00.0: [1095:3132] type 00 class 0x018000
> pci 0000:03:00.0: reg 0x10: [mem 0x50000000-0x5000007f 64bit]
> pci 0000:03:00.0: reg 0x18: [mem 0x50000000-0x50003fff 64bit]
> pci 0000:03:00.0: reg 0x20: [io 0x0000-0x007f]
> pci 0000:03:00.0: reg 0x30: [mem 0x50000000-0x5007ffff pref]
> pci 0000:03:00.0: supports D1 D2
> pci 0000:03:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable
> it with
> 'pcie_aspm=force'11:07 AM
> pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03
> pci 0000:04:00.0: [16c3:abcd] type 00 class 0x0c0330
> pci 0000:04:00.0: reg 0x10: [mem 0x50000000-0x500fffff 64bit]
> pci 0000:04:00.0: reg 0x30: [mem 0x50000000-0x5000ffff pref]
> pci 0000:04:00.0: supports D1
> pci 0000:04:00.0: PME# supported from D0 D1 D3hot D3cold
> pci_bus 0000:04: busn_res: [bus 04-ff] end is updated to 04
> pci_bus 0000:05: busn_res: [bus 05-ff] end is updated to 05
> pci_bus 0000:06: busn_res: [bus 06-ff] end is updated to 06
> pci_bus 0000:07: busn_res: [bus 07-ff] end is updated to 07
> pci 0000:08:00.0: [11ab:4380] type 00 class 0x020000
> pci 0000:08:00.0: reg 0x10: [mem 0x50000000-0x50003fff 64bit]
> pci 0000:08:00.0: reg 0x18: [io 0x0000-0x00ff]
> pci 0000:08:00.0: supports D1 D2
> pci 0000:08:00.0: PME# supported from D0 D1 D2 D3hot D3cold
> pci_bus 0000:08: busn_res: [bus 08-ff] end is updated to 08
> pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 08
> pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 08
> pcie-xr3 7ff30000.pci: Unable to locate msi-parent node.
> dma-pl330 7ff00000.dma: Loaded driver for PL330 DMAC-341330
> dma-pl330 7ff00000.dma: DBUFF-1024x16bytes Num_Chans-8 Num_Peri-8
> Num_Events-8
>
> In our initial test, despite the previous failure messages we were able to
> see
> the PCI bus and devices (through lspci command) where you can see Synopsys
> board on 04:00.0:
>
> 00:00.0 PCI bridge: PLDA PCI Express Core Reference Design (rev 01)
> 01:00.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090
> (rev 02)
> 02:01.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090
> (rev 02)
> 02:02.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090
> (rev 02)
> 02:03.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090
> (rev 02)
> 02:0c.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090
> (rev 02)
> 02:10.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090
> (rev 02)
> 02:1f.0 PCI bridge: Integrated Device Technology, Inc. [IDT] Device 8090
> (rev 02)
> 03:00.0 Mass storage controller: Silicon Image, Inc. SiI 3132 Serial ATA
> Raid II
> Controller (rev 01)
> 04:00.0 USB controller: Synopsys, Inc. Device abcd (rev 01)
> 08:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8057 PCI-E
> Gigabit
> Ethernet Controller
>
> But after several driver initialization failures we checked that 03:00.0,
> 04:00.0 and 08:00.0 PCI devices are pointing to the same base address:
>
> 03:00.0 Mass storage controller: Silicon Image, Inc. SiI 3132 Serial ATA
> Raid II
> Controller (rev 01)
> Subsystem: Silicon Image, Inc. SiI 3132 Serial ATA Raid II
> Controller
> Flags: fast devsel, IRQ 36
> Memory at 50000000 (64-bit, non-prefetchable) [disabled] [size=128]
> Memory at 50000000 (64-bit, non-prefetchable) [disabled] [size=16K]
> I/O ports at <unassigned> [disabled] [size=128]
> [virtual] Expansion ROM at 50000000 [disabled] [size=512K]
> Capabilities: [54] Power Management version 2
> Capabilities: [5c] MSI: Enable- Count=1/1 Maskable- 64bit+
> Capabilities: [70] Express Legacy Endpoint, MSI 00
> Capabilities: [100] Advanced Error Reporting
>
> 04:00.0 USB controller: Synopsys, Inc. Device abcd (rev 01) (prog-if 30
> [XHCI])
> Subsystem: Synopsys, Inc. Device 0124
> Flags: bus master, fast devsel, latency 0, IRQ 37
> Memory at 50000000 (64-bit, non-prefetchable) [size=1M]
> [virtual] Expansion ROM at 50000000 [disabled] [size=64K]
> Capabilities: [40] Power Management version 3
> Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+
> Capabilities: [70] Express Endpoint, MSI 00
> Capabilities: [100] Advanced Error Reporting
>
> 08:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8057 PCI-E
> Gigabit
> Ethernet Controller
> Subsystem: Marvell Technology Group Ltd. 88E8057 PCI-E Gigabit
> Ethernet
> Controller
> Flags: fast devsel, IRQ 38
> Memory at 50000000 (64-bit, non-prefetchable) [disabled] [size=16K]
> I/O ports at <unassigned> [disabled] [size=256]
> Capabilities: [48] Power Management version 3
> Capabilities: [5c] MSI: Enable- Count=1/1 Maskable- 64bit+
> Capabilities: [c0] Express Legacy Endpoint, MSI 00
> Capabilities: [100] Advanced Error Reporting
> Capabilities: [130] Device Serial Number 00-00-00-00-00-00-00-00
>
> I tried also to read a register from our USB Controller (0xc120) though
> devmem
> (provided by Busybox) using the base address 0x50000000 + 0xc120 offset
> and the
> result is a segmentation fault which is not normal.
> In our opinion the PCI has problems in the initialization and obviously
> that
> reflects in its memory mapping.
>
> I would like to know if this is a known issue and what should we do to
> overcome it.
>
> Thanks,
> Joao Pinto
>
>
>
>
> IMPORTANT NOTICE: This email message, which includes any attachments, may
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> of the intended recipient. Any unauthorized review, use, copying,
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> _______________________________________________
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>
>
>
== Progress ==
* release
== Plans ==
* Deploy new lay out
* study LEAP
--
Koen Kooi
Builds and Baselines | Release Manager
Linaro.org | Open source software for ARM SoCs
****************
Team Work Logged
****************
# tyler-baker Progress #
* LAVA-1511 - Upstream Kernel CI
* LAVA-2181 - Emergency fix for build trigger (23.08%)
* Created and tested a patch on kbuilder01, to fix a syntax error introduced by a previous commit. (log #3h hours)
* LAVA-1608 - General Team Items
* LAVA-1606 - Tyler's Bugs (46.15%)
* Discussed solution with interested parties, and applied a fix to master. This has been pulled into our 2015.06 RC. (log #2h hours)
* Investigated /etc/profile fix, applied to master and staging branches. Fabo to confirm in staging. (log #2h hours)
* The latest Jenkins update to ci.linaro.org removed the gerrit plugin completely. Therefore no pre-merge LAVA ci jobs were running. It also wiped our gerrit configuration away completely, so I had to rebuild. https://bugs.linaro.org/show_bug.cgi?id=1634 (log #2h hours)
* LAVA-1511 - Upstream Kernel CI
* LAVA-2166 - Add UEFI KVM guest boot support (30.77%)
* final tweaks done (log #4h hours)
# stylesen Progress #
* LAVA-1608 - General Team Items
* LAVA-1609 - Senthil's Bugs (100.0%)
* Analyzed random unicode errors.
* patchset #2 up for review #[6401|https://review.linaro.org/#/c/6401] (log #10h hours)
* patchset up for review #[6456|https://review.linaro.org/#/c/6456] and review #[6366|https://review.linaro.org/#/c/6366] (log #4h hours)
* Patchset created, reviewed and merged.
# milo Progress #
* LAVA-1511 - Upstream Kernel CI
* LAVA-1920 - Backend improvements (45.71%)
* Refactored the build import functions into its own module and added errors handling that will propagate errors up the call stack to eventually send email to the users.
* Added function to parse dtb directory if available and started refactoring build import logic.
* LAVA-1511 - Upstream Kernel CI
* LAVA-1811 - Frontend UI improvements/requests (17.14%)
* More work on refactoring JS libraries.
* Fixed problem with boot log links.
* LAVA-1511 - Upstream Kernel CI
* LAVA-1554 - Email notification system (37.14%)
* Extended send API to support CC and BCC email fields.
* Implemented in-reply-to header support for send API in order to reply to a mailing list message.
# stevan.radakovic Progress #
* LAVA-1608 - General Team Items
* LAVA-1592 - Stevan's Bugs (100.0%)
* Code review fixes.
* Updating documentation and context help links.
* Code review updates.
* Code review fixes.
* Fix the forms exclude field. Patch: https://review.linaro.org/6480 (log #2h hours)
# neil.williams(a)linaro.org Progress #
* LAVA-1608 - General Team Items
* LAVA-1573 - Neil's Bugs (7.41%)
* LAVA-1429 - Dispatcher Refactoring
* LAVA-1394 - DF: LAVA server integration (92.59%)
* (log #16h hours)
* (log #3h hours)
****************
Team In-Progress
****************
# alan.bennett(a)linaro.org Plan #
* LAVA-2105 - Create a sample Jira --> git interface
# dean.arnold(a)linaro.org Plan #
* LAVA-2118 - Dispatcher Refactoring: Add support for Fastmodel Devices
* LAVA-1966 - Bug-1409
# milo.casagrande(a)linaro.org Plan #
* LAVA-2099 - Refactor bisect library
* LAVA-1589 - Milo's Bugs
* LAVA-2124 - Refactor JavaScript views libraries into modules
* LAVA-2045 - Collect and report errors during async operations
* LAVA-1811 - Frontend UI improvements/requests
# neil.williams(a)linaro.org Plan #
* LAVA-1853 - Ensure VMgroup operations use a clean environment
* LAVA-2051 - Ensure template errors are reported without failures
* LAVA-1806 - Port VMGroup support as secondary connections
* LAVA-2177 - Drop processing of cpuinfo
* LAVA-1573 - Neil's Bugs
# senthil.kumaran(a)linaro.org Plan #
* LAVA-1976 - 5044
* LAVA-2111 - Support switch user by superuser
* LAVA-2117 - Reserved devices check in master scheduler
* LAVA-2116 - Atomic transactions within dbjobsource
* LAVA-2115 - Scheduler improvements
* LAVA-1609 - Senthil's Bugs
# stevan.radakovic(a)linaro.org Plan #
* LAVA-2103 - Device integration template helper
* LAVA-1592 - Stevan's Bugs
# tyler.baker(a)linaro.org Plan #
* LAVA-1792 - Tyler's Mentoring
* LAVA-1754 - Investigate usage of -drive for QEMU
* LAVA-2154 - Blacklist tree / kernel / defconfig
* LAVA-1606 - Tyler's Bugs
* LAVA-2010 - Meetings
* LAVA-2175 - Configure new kernelci build machines
* LAVA-2176 - Setup LSK AOSP Build
* Investigation into ILP32 readiness (DEVPAT-374 10%)
* Crosstoolchain work in Debian (DEVPLAT-220 50%)
Added support for configurable frontends to cross-gcc
Updated wiki pages
* arm64 and multiarch fixes in Debian (DEVPLAT-221 40%)
NMUed sidproxd, link-grammar, docbook-xml, ocaml-ladspa, setools
* registered debconf talks
Wookey
--
Principal hats: Linaro, Debian, Wookware, ARM
http://wookware.org/
Hello,
If you don't use Gerrit review services of https://review.linaro.org
you can stop reading now.
Over this weekend, Systems team reconfigured login mechanism of
https://review.linaro.org to be based on LDAP authentication instead of
previously used OpenID authentication.
The only expected user-visible change is that now there will be native
Gerrit login page (https://review.linaro.org/login/q/status:open,n,z)
instead of redirection to https://crowd.linaro.org/... . So, please
don't be alerted, this is expected change. Login credentials otherwise
stay the same - Linaro email address and standard Linaro password. If
you find that you're still logged in to Gerrit on Monday, you're
recommended to log out and log in again via new methods.
The reason for this change is that unfortunately Gerrit ties generic
LDAP integration (e.g. being able to use LDAP groups) to LDAP-backed
authentication method. We had this enabled on few project-specific
instances, and as stakeholders elaborated Gerrit usage, we started to
get requests to set up more advanced workflows for the public instance
too. Unfortunately, with OpenID-based auth, we couldn't set up Gerrit
groups based on existing centrally managed LDAP groups, so the only
choice was to duplicate user lists which is error-prone and doesn't
scale. The change above fixes that, and it's expected that we'll follow
with the similar change on another public instance,
http://review.android.git.linaro.org/ .
We tried our best to make the migration seamless, but if you experience
or spot any issues, please let us know - either by directly replying to
this mail, pinging #linaro-systems channel or submitting ITS request
via its(a)linaro.org (the latter is standard, preferred method, but feel
free to use other for possibly quicker turnaround). You are recommended
to check your Gerrit group membership after logging in via new method,
by visiting page
https://review.linaro.org/#/settings/group-memberships . If you see
that any groups you used to have are missing, let us know immediately.
Thanks,
Paul
Linaro.org | Open source software for ARM SoCs
Follow Linaro: http://www.facebook.com/pages/Linarohttp://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog
== Progress ==
* LKP Arm/Arm64 porting (DEVPLAT-377 40%)
* KVM job vivid migration (30%)
* v3 of deb-pkg source package (DEVPLAT-303 30%)
== Plans ==
* Test and send to tianocore list fastboot sparse image support
* Add perf/linux-tools package creating to builddeb
* 1 day off, Midsummer eve (perhaps the summer will start in finland
by then.. :P)
== Progress ==
* June 12th was a day off: local holiday (20%)
* CARD-788 "EPIC: Linux linaro baseline maintenance" (80%):
- moved linux-linaro kernel tree to v4.1-rc7.
- llct and ll CI jobs updated to use the rootfs with gator daemon version matching the kernel driver
- old llct CI job is updated and its configuration is moved to ci/job/configs.git.
The corresponding build trigger created.
- RE switching from board config fragments to corresponding defcconfigs:
Arndale boots OK when arndale.conf is replaced with exynos_defconfig. With multi_v7_defconfig it also
boots but w/o the onboard ethernet due to missing CONFIG_USB_HSIC_USB3503 [1]
== Plans ==
* CARD-788 "EPIC: Linux linaro baseline maintenance":
- move linux-linaro kernel tree to v4.1-rc8, tag the tree for the 15.06 release.
- switch linux linaro builds in ci.l.o from board config fragments to relevant defconfigs
(small board specific config fragments could still be used if important options are missing
from the defconfigs)
== Issues ==
* none
[1] http://www.spinics.net/lists/linux-samsung-soc/msg42965.html
