This module external interface is a pad on the chip which complies to the MIPI System Trace Protocol v1.0, and the actual trace output can be read by an electronic probe, not by software so it cannot be intercepted by the CPU and reach Linux userspace.
I'm not an expert here, but my understanding is that the architecture allows to put all the trace data to both trace port and ETB (Embedded Trace Buffer) at the same time. It's just that the STM (along with ETM/PTM and other xTMs ;-) outputs its data via funnel to a trace bus, and the bus can feed both the buffer and the port.
And as it is possible to read the ETB content - see arch/arm/kernel/etm.c
I'd like to know if another ARM SoC plan to use or already use STM or some similar hardware enabling the same kind of MIPI trace points. If yes, we can share our works.
Would you be so kind to talk to Ian Spray Ian.Spray@arm.com? He is doing stuff around CoreSight drivers...
Cheers!
Paweł