Re: [PATCH v5 4/4] clk: basic clock hardware types

On Sun, Mar 4, 2012 at 6:35 AM, Andrew Lunn andrew@lunn.ch wrote:

...

+#define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr,    \

• _flags, _reg, _bit_idx,         \
• _gate_flags, _lock)             \
• static struct clk _name;                                \
• static char *_name##_parent_names[] = {                 \
• _parent_name,                                   \
• };                                                      \
• static struct clk *_name##_parents[] = {                \
• _parent_ptr,                                    \
• };                                                      \
• static struct clk_gate _name##_hw = {                   \
• .hw = {                                         \
• .clk = &_name,                          \
• },                                              \
• .reg = _reg,                                    \
• .bit_idx = _bit_idx,                            \
• .flags = _gate_flags                            \
• .lock = _lock,                                  \
• };                                                      \
• static struct clk _name = {                             \
• .name = #_name,                                 \
• .ops = &clk_gate_ops,                           \
• .hw = &_name##_hw.hw,                           \
• .parent_names = _name##_parent_names,           \
• .num_parents =                                  \
• ARRAY_SIZE(_name##parent_names),        \

Hi Mike

This should be _name##_parent_names, i.e. you are missing a _.

With this and the previous change, i get something which at least compiles...

The gate clock is the only type of the basic clocks that I do not (currently) use in my OMAP port and it's test coverage has suffered as a result. My bad.

Thanks for the review and the patch in the separate thread. I'll take the changes in.

Regards, Mike

Andrew