From: linaro-dev-bounces@lists.linaro.org [mailto:linaro-dev- bounces@lists.linaro.org] On Behalf Of Dave Martin Sent: Tuesday, November 30, 2010 3:41 AM
- VFP uses the same register set. Does a floating point
instruction
also turn the NEON coprocessor on?
Yes-- these are one and the same thing from the kernel's point of view. FPEXC.EN=0 basically causes all instructions accessing that register bank to trap.
Same registers for neon/vfp and the hardware engines from omap-prcm (global hw power fsm) perspective are in same power domain. Inside ARM blocks many times yet more power domains exist which the soc must supply power to in some way.
General interest is standard A8 VFP block is much less powerful than ARM11 version and A9 version. It is an iterative engine instead of a pipelined one. For A8 the projected faster clock speeds were supposed to make it sufficient and allowed a smaller footprint. In A9 other tradeoffs happened which resulted in the more capable engine being put back in for vfp side. A8 does have some run fast mode which allows elements of VFP to enter neon pipe for speed for those who need it. A few customers did this.
Neon is much faster and for single precision if you don't mind non-full ieee compliance. It might end up being more power efficient given the way an soc powers the block or not. For double you have to use vfp as neon can't do it.
Your description of operations seems to follow what I've seen before. Finding a cleaver way to exploit it would be the trick.