From: Yong Shen yong.shen@linaro.org
everytime when screen refresh, the clock_info data stucture will be reacclocated, which does not make sence. This patch addresses this issue.
Signed-off-by: Yong Shen yong.shen@linaro.org --- clocks.c | 198 +++++++++++++++++++++++++++++++++++---------------------- clocks.h | 3 +- powerdebug.c | 2 + powerdebug.h | 2 +- 4 files changed, 126 insertions(+), 79 deletions(-)
diff --git a/clocks.c b/clocks.c index b556644..47881c5 100644 --- a/clocks.c +++ b/clocks.c @@ -133,18 +133,18 @@ static void dump_parent(struct clock_info *clk, int line, bool dump) static struct clock_info *find_clock(struct clock_info *clk, char *clkarg) { int i; - struct clock_info *ret = clk; + struct clock_info *ret = clk, *tmp;
if (!strcmp(clk->name, clkarg)) return ret;
if (clk->children) { - for (i = 0; i < clk->num_children; i++) { - if (!strcmp(clk->children[i]->name, clkarg)) - return clk->children[i]; + for (tmp = clk->children, i = 0; i < clk->num_children; i++, tmp = tmp->buddy) { + if (!strcmp(tmp->name, clkarg)) + return tmp; } - for (i = 0; i < clk->num_children; i++) { - ret = find_clock(clk->children[i], clkarg); + for (tmp = clk->children, i = 0; i < clk->num_children; i++, tmp = tmp->buddy) { + ret = find_clock(tmp, clkarg); if (ret) return ret; } @@ -194,51 +194,11 @@ void find_parents_for_clock(char *clkname, int complete) dump_all_parents(clkname, false); }
-static void destroy_clocks_info_recur(struct clock_info *clock) -{ - int i; - - if (clock && clock->num_children) { - for (i = (clock->num_children - 1); i >= 0; i--) { - fflush(stdin); - destroy_clocks_info_recur(clock->children[i]); - if (!i) { - free(clock->children); - clock->children = NULL; - clock->num_children = 0; - } - } - } -} - -static void destroy_clocks_info(void) -{ - int i; - - if (!clocks_info) - return; - - if (clocks_info->num_children) { - for (i = (clocks_info->num_children - 1); i >= 0 ; i--) { - destroy_clocks_info_recur(clocks_info->children[i]); - if (!i) { - free(clocks_info->children); - clocks_info->children = NULL; - } - } - } - clocks_info->num_children = 0; - free(clocks_info); - clocks_info = NULL; -} - - int read_and_print_clock_info(int verbose, int hrow, int selected) { print_one_clock(0, "Reading Clock Tree ...", 1, 1);
if (!old_clock_line_no || selected == REFRESH_WINDOW) { - destroy_clocks_info(); read_clock_info(clk_dir_path); }
@@ -280,11 +240,12 @@ static void prepare_name_str(char *namestr, struct clock_info *clock) static void collapse_all_subclocks(struct clock_info *clock) { int i; + struct clock_info *tmp;
clock->expanded = 0; if (clock->num_children) - for (i = 0; i < clock->num_children; i++) - collapse_all_subclocks(clock->children[i]); + for (tmp = clock->children, i = 0; i < clock->num_children; i++, tmp = tmp->buddy) + collapse_all_subclocks(tmp); }
static void add_clock_details_recur(struct clock_info *clock, @@ -295,6 +256,7 @@ static void add_clock_details_recur(struct clock_info *clock, char rate_str[64]; char name_str[256]; double drate = (double)clock->rate; + struct clock_info *tmp;
if (drate > 1000 && drate < 1000000) { unit = "KHz"; @@ -324,23 +286,23 @@ static void add_clock_details_recur(struct clock_info *clock, }
if (clock->expanded && clock->num_children) - for (i = 0; i < clock->num_children; i++) - add_clock_details_recur(clock->children[i], - hrow, selected); + for (tmp = clock->children, i = 0; i < clock->num_children; i++, tmp = tmp->buddy) + add_clock_details_recur(tmp, hrow, selected); + strcpy(clock_lines[clock_line_no], ""); }
void print_clock_info(int verbose, int hrow, int selected) { int i, count = 0, delta; + struct clock_info *tmp;
(void)verbose;
print_clock_header();
- for (i = 0; i < clocks_info->num_children; i++) - add_clock_details_recur(clocks_info->children[i], - hrow, selected); + for (tmp = clocks_info->children, i = 0; i < clocks_info->num_children; i++, tmp = tmp->buddy) + add_clock_details_recur(tmp, hrow, selected);
delta = calc_delta_screen_size(hrow);
@@ -377,6 +339,93 @@ void read_and_dump_clock_info(int verbose) printf("\n\n"); }
+static struct clock_info *clk_head; +static unsigned int max_node_num, max_clk_num, alloc_index; +static int clk_number_recursive(char *clk_path) +{ + DIR *dir; + struct dirent *item; + char filename[NAME_MAX]; + int ret; + struct stat buf; + + dir = opendir(clk_path); + if (!dir) + return 0; + + while ((item = readdir(dir))) { + /* skip hidden dirs except ".." */ + if (item->d_name[0] == '.') + continue; + + sprintf(filename, "%s/%s", clk_path, item->d_name); + ret = stat(filename, &buf); + + if (ret < 0) { + printf("Error doing a stat on %s\n", filename); + exit(1); + } + + if (!S_ISDIR(buf.st_mode)) + continue; + + max_clk_num++; + clk_number_recursive(filename); + } + closedir(dir); + + return max_clk_num; +} + +static int get_clk_number(char *clk_path) +{ + if ((max_clk_num != 0)) /* no nodes have been added */ + return max_clk_num; + else { + max_clk_num = 0; + /*recaculate the number*/ + return clk_number_recursive(clk_path); + } +} + +int init_clk_info_memory_allocator(char *clk_path) +{ + int clk_number = get_clk_number(clk_path); + + if (max_node_num < clk_number) { + int alloc_number = clk_number * 2; + /* we need more nodes than actual clock number + to host the extra info due to original design scheme */ + if (max_node_num == 0) + clk_head = (struct clock_info *)malloc( + sizeof(struct clock_info) * alloc_number); + else + clk_head = (struct clock_info *)realloc( + clk_head, + sizeof(struct clock_info *) * alloc_number); + + max_node_num = alloc_number; + } + alloc_index = 0; +} + +inline struct clock_info *alloc_clk_info() +{ + alloc_index++; + /* we are pretty sure we have enough nodes, + since we checked every refresh */ + if (alloc_index < max_node_num) + return &clk_head[alloc_index - 1]; + else + return NULL; +} + +void release_all_clk_info_mem(void) +{ + if (clk_head) + free(clk_head); +} + void read_clock_info(char *clkpath) { DIR *dir; @@ -389,7 +438,8 @@ void read_clock_info(char *clkpath) if (!dir) return;
- clocks_info = (struct clock_info *)malloc(sizeof(struct clock_info)); + init_clk_info_memory_allocator(clkpath); + clocks_info = alloc_clk_info(); memset(clocks_info, 0, sizeof(clocks_info)); strcpy(clocks_info->name, "/"); clocks_info->level = 0; @@ -401,14 +451,14 @@ void read_clock_info(char *clkpath)
strcpy(clockname, item->d_name); sprintf(filename, "%s/%s", clkpath, item->d_name); - cur = (struct clock_info *)malloc(sizeof(struct clock_info)); + cur = alloc_clk_info(); memset(cur, 0, sizeof(struct clock_info)); strcpy(cur->name, clockname); cur->parent = clocks_info; cur->num_children = 0; cur->expanded = 0; cur->level = 1; - insert_children(&clocks_info, cur); + insert_children(clocks_info, cur); child = read_clock_info_recur(filename, 2, cur); } closedir(dir); @@ -456,7 +506,7 @@ struct clock_info *read_clock_info_recur(char *clkpath, int level, if (!S_ISDIR(buf.st_mode)) continue;
- cur = (struct clock_info *)malloc(sizeof(struct clock_info)); + cur = alloc_clk_info(); memset(cur, 0, sizeof(cur)); strcpy(cur->name, item->d_name); cur->children = NULL; @@ -465,7 +515,7 @@ struct clock_info *read_clock_info_recur(char *clkpath, int level, cur->expanded = 0; cur->level = level; child = read_clock_info_recur(filename, level + 1, cur); - insert_children(&parent, cur); + insert_children(parent, cur); cur->parent = parent; } closedir(dir); @@ -473,29 +523,22 @@ struct clock_info *read_clock_info_recur(char *clkpath, int level, return cur; }
-void insert_children(struct clock_info **parent, struct clock_info *clk) +void insert_children(struct clock_info *parent, struct clock_info *clk) { - if (!(*parent)->num_children || (*parent)->children == NULL) { - (*parent)->children = (struct clock_info **) - malloc(sizeof(struct clock_info *)*2); - (*parent)->num_children = 0; - } else - (*parent)->children = (struct clock_info **) - realloc((*parent)->children, - sizeof(struct clock_info *) * - ((*parent)->num_children + 2)); - if ((*parent)->num_children > 0) - (*parent)->children[(*parent)->num_children - 1]->last_child - = 0; + if (parent->children == NULL) + clk->buddy = clk; + else + clk->buddy = parent->children; + parent->children = clk; + clk->last_child = 1; - (*parent)->children[(*parent)->num_children] = clk; - (*parent)->children[(*parent)->num_children + 1] = NULL; - (*parent)->num_children++; + parent->num_children++; }
void dump_clock_info(struct clock_info *clk, int level, int bmp) { int i, j; + struct clock_info *tmp;
if (!clk) return; @@ -541,9 +584,10 @@ void dump_clock_info(struct clock_info *clk, int level, int bmp) xbmp = tbmp & xbmp; } else xbmp = bmp; - for (i = 0; i < clk->num_children; i++) { + + for (tmp = clk->children, i = 0; i < clk->num_children; i++, tmp = tmp->buddy) { tbmp = xbmp | (1 << level); - dump_clock_info(clk->children[i], level + 1, tbmp); + dump_clock_info(tmp, level + 1, tbmp); } } } diff --git a/clocks.h b/clocks.h index 9ad9804..5f8e195 100644 --- a/clocks.h +++ b/clocks.h @@ -25,7 +25,8 @@ struct clock_info { int expanded; int level; struct clock_info *parent; - struct clock_info **children; + struct clock_info *children; + struct clock_info *buddy; } *clocks_info;
extern int clock_init(void); diff --git a/powerdebug.c b/powerdebug.c index 4d55f17..a26d16f 100644 --- a/powerdebug.c +++ b/powerdebug.c @@ -389,5 +389,7 @@ int main(int argc, char **argv) powerdebug_dump(options, regulators_info, numregulators) : powerdebug_display(options, regulators_info, numregulators);
+ release_all_clk_info_mem(); + return ret < 0; } diff --git a/powerdebug.h b/powerdebug.h index a122b7f..f97e3b9 100644 --- a/powerdebug.h +++ b/powerdebug.h @@ -34,7 +34,7 @@ extern void read_clock_info(char *clkpath); extern struct clock_info *read_clock_info_recur(char *clkpath, int level, struct clock_info *parent); extern void dump_clock_info(struct clock_info *clk, int level, int bmp); -extern void insert_children(struct clock_info **parent, struct clock_info *clk); +extern inline void insert_children(struct clock_info *parent, struct clock_info *clk); extern void find_parents_for_clock(char *clkname, int complete); extern int read_and_print_clock_info(int verbose, int hrow, int selected); extern void print_clock_info(int verbose, int hrow, int selected);
From: Yong Shen yong.shen@linaro.org
Signed-off-by: Yong Shen yong.shen@linaro.org --- clocks.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++++++- powerdebug.c | 3 +++ powerdebug.h | 3 +++ 3 files changed, 59 insertions(+), 1 deletions(-)
diff --git a/clocks.c b/clocks.c index 47881c5..a4c54b0 100644 --- a/clocks.c +++ b/clocks.c @@ -16,12 +16,18 @@ #include <stdio.h> #include <mntent.h> #include <sys/stat.h> +#include <sys/inotify.h> +#include <poll.h>
#include "powerdebug.h" #include "clocks.h"
#define MAX_LINES 120
+int inotify_fd; +int inotify_wd; +static struct pollfd fds; + static char clk_dir_path[PATH_MAX]; static int bold[MAX_LINES]; static char clock_lines[MAX_LINES][128]; @@ -58,11 +64,56 @@ int clock_init(void) if (locate_debugfs(clk_dir_path)) return -1;
+ inotify_fd = inotify_init(); + if ( inotify_fd < 0 ) { + fprintf(stderr, "inotify_init error.\n" ); + return -1; + } + + inotify_wd = inotify_add_watch(inotify_fd, clk_dir_path, + IN_ALL_EVENTS ); + + fds.fd = inotify_fd; + fds.events = POLLIN; + sprintf(clk_dir_path, "%s/clock", clk_dir_path);
return access(clk_dir_path, F_OK); }
+#define EVENT_SIZE ( sizeof (struct inotify_event) ) +#define BUF_LEN ( 10 * ( EVENT_SIZE + 16 ) ) + +int debugfs_changed(void) +{ + int length, i = 0; + char buffer[BUF_LEN]; + + if (inotify_fd <= 0) { + return 1; + } + + poll(&fds, 1, 1); + if (fds.revents != POLLIN) { + return 0; + } + + length = read(inotify_fd, buffer, BUF_LEN); + + if (length < 0) + return 0; + + while (i < length) { + struct inotify_event *event = (struct inotify_event *) &buffer[i]; + if (event->mask & IN_ALL_EVENTS) + return 1; + + i += EVENT_SIZE + event->len; + } + + return 0; +} + static int file_read_from_format(char *file, int *value, const char *format) { FILE *f; @@ -379,7 +430,8 @@ static int clk_number_recursive(char *clk_path)
static int get_clk_number(char *clk_path) { - if ((max_clk_num != 0)) /* no nodes have been added */ + /* no nodes have been added */ + if ((max_clk_num != 0) && (!debugfs_changed())) return max_clk_num; else { max_clk_num = 0; diff --git a/powerdebug.c b/powerdebug.c index a26d16f..621052f 100644 --- a/powerdebug.c +++ b/powerdebug.c @@ -14,6 +14,7 @@ *******************************************************************************/
#include <getopt.h> +#include <sys/inotify.h> #include <stdbool.h> #include "regulator.h" #include "display.h" @@ -390,6 +391,8 @@ int main(int argc, char **argv) powerdebug_display(options, regulators_info, numregulators);
release_all_clk_info_mem(); + inotify_rm_watch(inotify_fd, inotify_wd); + close(inotify_fd);
return ret < 0; } diff --git a/powerdebug.h b/powerdebug.h index f97e3b9..4071eaa 100644 --- a/powerdebug.h +++ b/powerdebug.h @@ -54,3 +54,6 @@ extern void create_selectedwindow(int selectedwindow); struct regulator_info; extern void show_regulator_info(struct regulator_info *reg_info, int nr_reg, int verbose); +extern int inotify_fd; +extern int inotify_wd; +extern int need_refresh(void);
On 04/05/2011 10:28 AM, yong.shen@linaro.org wrote:
From: Yong Shenyong.shen@linaro.org
Signed-off-by: Yong Shenyong.shen@linaro.org
clocks.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++++++- powerdebug.c | 3 +++ powerdebug.h | 3 +++ 3 files changed, 59 insertions(+), 1 deletions(-)
diff --git a/clocks.c b/clocks.c index 47881c5..a4c54b0 100644 --- a/clocks.c +++ b/clocks.c @@ -16,12 +16,18 @@ #include<stdio.h> #include<mntent.h> #include<sys/stat.h> +#include<sys/inotify.h> +#include<poll.h>
#include "powerdebug.h" #include "clocks.h"
#define MAX_LINES 120
+int inotify_fd; +int inotify_wd; +static struct pollfd fds;
- static char clk_dir_path[PATH_MAX]; static int bold[MAX_LINES]; static char clock_lines[MAX_LINES][128];
@@ -58,11 +64,56 @@ int clock_init(void) if (locate_debugfs(clk_dir_path)) return -1;
inotify_fd = inotify_init();
if ( inotify_fd< 0 ) {
fprintf(stderr, "inotify_init error.\n" );
return -1;
}
inotify_wd = inotify_add_watch(inotify_fd, clk_dir_path,
IN_ALL_EVENTS );
fds.fd = inotify_fd;
fds.events = POLLIN;
sprintf(clk_dir_path, "%s/clock", clk_dir_path);
return access(clk_dir_path, F_OK); }
+#define EVENT_SIZE ( sizeof (struct inotify_event) ) +#define BUF_LEN ( 10 * ( EVENT_SIZE + 16 ) )
+int debugfs_changed(void) +{
- int length, i = 0;
- char buffer[BUF_LEN];
- if (inotify_fd<= 0) {
return 1;
- }
- poll(&fds, 1, 1);
- if (fds.revents != POLLIN) {
return 0;
- }
- length = read(inotify_fd, buffer, BUF_LEN);
- if (length< 0)
return 0;
- while (i< length) {
struct inotify_event *event = (struct inotify_event *)&buffer[i];
if (event->mask& IN_ALL_EVENTS)
return 1;
i += EVENT_SIZE + event->len;
- }
- return 0;
+}
- static int file_read_from_format(char *file, int *value, const char *format) { FILE *f;
@@ -379,7 +430,8 @@ static int clk_number_recursive(char *clk_path)
static int get_clk_number(char *clk_path) {
- if ((max_clk_num != 0)) /* no nodes have been added */
- /* no nodes have been added */
- if ((max_clk_num != 0)&& (!debugfs_changed())) return max_clk_num;
Thats wrong, you have to add the inotify_wd to the mainloop code.
Index: dlezcano/work/src/powerdebug/powerdebug.c =================================================================== --- dlezcano.orig/work/src/powerdebug/powerdebug.c 2011-04-05 14:38:40.437379003 +0200 +++ dlezcano/work/src/powerdebug/powerdebug.c 2011-04-05 14:42:48.397379003 +0200 @@ -291,16 +291,21 @@ int mainloop(struct powerdebug_options *
FD_ZERO(&readfds); FD_SET(0, &readfds); + FD_SET(inotify_fd, &readfds); tval.tv_sec = options->ticktime; tval.tv_usec = (options->ticktime - tval.tv_sec) * 1000000;
- key = select(1, &readfds, NULL, NULL, &tval); + key = select(inotify_fd + 1, &readfds, NULL, NULL, &tval); if (!key) continue;
- if (keystroke_callback(&enter_hit, &findparent_ncurses, - clkname_str, &refreshwin, options)) - break; + if (FD_ISSET(0, &readfds)) + if (keystroke_callback(&enter_hit, &findparent_ncurses, + clkname_str, &refreshwin, options)) + break; + + if (FD_ISSET(inotify_fd, &readfds)) + thecallback();
}
else { max_clk_num = 0; diff --git a/powerdebug.c b/powerdebug.c index a26d16f..621052f 100644 --- a/powerdebug.c +++ b/powerdebug.c @@ -14,6 +14,7 @@ *******************************************************************************/
#include<getopt.h> +#include<sys/inotify.h> #include<stdbool.h> #include "regulator.h" #include "display.h" @@ -390,6 +391,8 @@ int main(int argc, char **argv) powerdebug_display(options, regulators_info, numregulators);
release_all_clk_info_mem();
inotify_rm_watch(inotify_fd, inotify_wd);
close(inotify_fd);
return ret< 0; }
diff --git a/powerdebug.h b/powerdebug.h index f97e3b9..4071eaa 100644 --- a/powerdebug.h +++ b/powerdebug.h @@ -54,3 +54,6 @@ extern void create_selectedwindow(int selectedwindow); struct regulator_info; extern void show_regulator_info(struct regulator_info *reg_info, int nr_reg, int verbose); +extern int inotify_fd; +extern int inotify_wd; +extern int need_refresh(void);
I would suggest you create a clock_info structure where you store the inotify_fd and inotify_wd and you use a clock_fini function.
struct clock_info *clock_info;
...
clock_info = clock_init();
...
clock_fini(clock_info);
...
That will prevent to add more global variables and extern definitions.
On Tue, Apr 5, 2011 at 8:49 PM, Daniel Lezcano daniel.lezcano@free.frwrote:
On 04/05/2011 10:28 AM, yong.shen@linaro.org wrote:
From: Yong Shenyong.shen@linaro.org
Signed-off-by: Yong Shenyong.shen@linaro.org
clocks.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++++++- powerdebug.c | 3 +++ powerdebug.h | 3 +++ 3 files changed, 59 insertions(+), 1 deletions(-)
diff --git a/clocks.c b/clocks.c index 47881c5..a4c54b0 100644 --- a/clocks.c +++ b/clocks.c @@ -16,12 +16,18 @@ #include<stdio.h> #include<mntent.h> #include<sys/stat.h> +#include<sys/inotify.h> +#include<poll.h>
#include "powerdebug.h" #include "clocks.h"
#define MAX_LINES 120
+int inotify_fd; +int inotify_wd; +static struct pollfd fds;
static char clk_dir_path[PATH_MAX]; static int bold[MAX_LINES]; static char clock_lines[MAX_LINES][128]; @@ -58,11 +64,56 @@ int clock_init(void) if (locate_debugfs(clk_dir_path)) return -1;
inotify_fd = inotify_init();
if ( inotify_fd< 0 ) {
fprintf(stderr, "inotify_init error.\n" );
return -1;
}
inotify_wd = inotify_add_watch(inotify_fd, clk_dir_path,
IN_ALL_EVENTS );
fds.fd = inotify_fd;
fds.events = POLLIN;
sprintf(clk_dir_path, "%s/clock", clk_dir_path); return access(clk_dir_path, F_OK);
}
+#define EVENT_SIZE ( sizeof (struct inotify_event) ) +#define BUF_LEN ( 10 * ( EVENT_SIZE + 16 ) )
+int debugfs_changed(void) +{
int length, i = 0;
char buffer[BUF_LEN];
if (inotify_fd<= 0) {
return 1;
}
poll(&fds, 1, 1);
if (fds.revents != POLLIN) {
return 0;
}
length = read(inotify_fd, buffer, BUF_LEN);
if (length< 0)
return 0;
while (i< length) {
struct inotify_event *event = (struct inotify_event
*)&buffer[i];
if (event->mask& IN_ALL_EVENTS)
return 1;
i += EVENT_SIZE + event->len;
}
return 0;
+}
static int file_read_from_format(char *file, int *value, const char *format) { FILE *f; @@ -379,7 +430,8 @@ static int clk_number_recursive(char *clk_path)
static int get_clk_number(char *clk_path) {
if ((max_clk_num != 0)) /* no nodes have been added */
/* no nodes have been added */
if ((max_clk_num != 0)&& (!debugfs_changed())) return max_clk_num;
Thats wrong, you have to add the inotify_wd to the mainloop code.
Index: dlezcano/work/src/powerdebug/powerdebug.c
--- dlezcano.orig/work/src/powerdebug/powerdebug.c 2011-04-05 14:38:40.437379003 +0200 +++ dlezcano/work/src/powerdebug/powerdebug.c 2011-04-05 14:42:48.397379003 +0200 @@ -291,16 +291,21 @@ int mainloop(struct powerdebug_options *
FD_ZERO(&readfds); FD_SET(0, &readfds);
FD_SET(inotify_fd, &readfds); tval.tv_sec = options->ticktime; tval.tv_usec = (options->ticktime - tval.tv_sec) * 1000000;
key = select(1, &readfds, NULL, NULL, &tval);
key = select(inotify_fd + 1, &readfds, NULL, NULL, &tval); if (!key) continue;
if (keystroke_callback(&enter_hit, &findparent_ncurses,
clkname_str, &refreshwin, options))
break;
if (FD_ISSET(0, &readfds))
if (keystroke_callback(&enter_hit, &findparent_ncurses,
clkname_str, &refreshwin, options))
break;
if (FD_ISSET(inotify_fd, &readfds))
thecallback();
}
else {
max_clk_num = 0;
diff --git a/powerdebug.c b/powerdebug.c index a26d16f..621052f 100644 --- a/powerdebug.c +++ b/powerdebug.c @@ -14,6 +14,7 @@
*******************************************************************************/
#include<getopt.h> +#include<sys/inotify.h> #include<stdbool.h> #include "regulator.h" #include "display.h" @@ -390,6 +391,8 @@ int main(int argc, char **argv) powerdebug_display(options, regulators_info, numregulators);
release_all_clk_info_mem();
inotify_rm_watch(inotify_fd, inotify_wd);
close(inotify_fd); return ret< 0;
} diff --git a/powerdebug.h b/powerdebug.h index f97e3b9..4071eaa 100644 --- a/powerdebug.h +++ b/powerdebug.h @@ -54,3 +54,6 @@ extern void create_selectedwindow(int selectedwindow); struct regulator_info; extern void show_regulator_info(struct regulator_info *reg_info, int nr_reg, int verbose); +extern int inotify_fd; +extern int inotify_wd; +extern int need_refresh(void);
I would suggest you create a clock_info structure where you store the inotify_fd and inotify_wd and you use a clock_fini function.
struct clock_info *clock_info;
...
clock_info = clock_init();
...
clock_fini(clock_info);
...
That will prevent to add more global variables and extern definitions.
I agree to some degree. The situation is that we are trying to finish some certain working items in this cycle, so time is tight. About those polishing tasks, I suggest we could do it after the major functions have been implemented, like what you did, a serial patches dedicated for such purpose.
On Wed, Apr 6, 2011 at 11:36 AM, Yong Shen yong.shen@linaro.org wrote:
On Tue, Apr 5, 2011 at 8:49 PM, Daniel Lezcano daniel.lezcano@free.fr wrote:
On 04/05/2011 10:28 AM, yong.shen@linaro.org wrote:
From: Yong Shenyong.shen@linaro.org
Signed-off-by: Yong Shenyong.shen@linaro.org
clocks.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++++++- powerdebug.c | 3 +++ powerdebug.h | 3 +++ 3 files changed, 59 insertions(+), 1 deletions(-)
diff --git a/clocks.c b/clocks.c index 47881c5..a4c54b0 100644 --- a/clocks.c +++ b/clocks.c @@ -16,12 +16,18 @@ #include<stdio.h> #include<mntent.h> #include<sys/stat.h> +#include<sys/inotify.h> +#include<poll.h>
#include "powerdebug.h" #include "clocks.h"
#define MAX_LINES 120
+int inotify_fd; +int inotify_wd; +static struct pollfd fds;
static char clk_dir_path[PATH_MAX]; static int bold[MAX_LINES]; static char clock_lines[MAX_LINES][128]; @@ -58,11 +64,56 @@ int clock_init(void) if (locate_debugfs(clk_dir_path)) return -1;
- inotify_fd = inotify_init();
- if ( inotify_fd< 0 ) {
- fprintf(stderr, "inotify_init error.\n" );
- return -1;
- }
- inotify_wd = inotify_add_watch(inotify_fd, clk_dir_path,
- IN_ALL_EVENTS );
- fds.fd = inotify_fd;
- fds.events = POLLIN;
sprintf(clk_dir_path, "%s/clock", clk_dir_path);
return access(clk_dir_path, F_OK); }
+#define EVENT_SIZE ( sizeof (struct inotify_event) ) +#define BUF_LEN ( 10 * ( EVENT_SIZE + 16 ) )
+int debugfs_changed(void) +{
- int length, i = 0;
- char buffer[BUF_LEN];
- if (inotify_fd<= 0) {
- return 1;
- }
- poll(&fds, 1, 1);
- if (fds.revents != POLLIN) {
- return 0;
- }
- length = read(inotify_fd, buffer, BUF_LEN);
- if (length< 0)
- return 0;
- while (i< length) {
- struct inotify_event *event = (struct inotify_event
*)&buffer[i];
- if (event->mask& IN_ALL_EVENTS)
- return 1;
- i += EVENT_SIZE + event->len;
- }
- return 0;
+}
static int file_read_from_format(char *file, int *value, const char *format) { FILE *f; @@ -379,7 +430,8 @@ static int clk_number_recursive(char *clk_path)
static int get_clk_number(char *clk_path) {
- if ((max_clk_num != 0)) /* no nodes have been added */
- /* no nodes have been added */
- if ((max_clk_num != 0)&& (!debugfs_changed()))
return max_clk_num;
Thats wrong, you have to add the inotify_wd to the mainloop code.
Index: dlezcano/work/src/powerdebug/powerdebug.c
--- dlezcano.orig/work/src/powerdebug/powerdebug.c 2011-04-05 14:38:40.437379003 +0200 +++ dlezcano/work/src/powerdebug/powerdebug.c 2011-04-05 14:42:48.397379003 +0200 @@ -291,16 +291,21 @@ int mainloop(struct powerdebug_options *
FD_ZERO(&readfds); FD_SET(0, &readfds);
- FD_SET(inotify_fd, &readfds);
tval.tv_sec = options->ticktime; tval.tv_usec = (options->ticktime - tval.tv_sec) * 1000000;
- key = select(1, &readfds, NULL, NULL, &tval);
- key = select(inotify_fd + 1, &readfds, NULL, NULL, &tval);
if (!key) continue;
- if (keystroke_callback(&enter_hit, &findparent_ncurses,
- clkname_str, &refreshwin, options))
- break;
- if (FD_ISSET(0, &readfds))
- if (keystroke_callback(&enter_hit, &findparent_ncurses,
- clkname_str, &refreshwin, options))
- break;
- if (FD_ISSET(inotify_fd, &readfds))
- thecallback();
}
else { max_clk_num = 0; diff --git a/powerdebug.c b/powerdebug.c index a26d16f..621052f 100644 --- a/powerdebug.c +++ b/powerdebug.c @@ -14,6 +14,7 @@
*******************************************************************************/
#include<getopt.h> +#include<sys/inotify.h> #include<stdbool.h> #include "regulator.h" #include "display.h" @@ -390,6 +391,8 @@ int main(int argc, char **argv) powerdebug_display(options, regulators_info, numregulators);
release_all_clk_info_mem();
- inotify_rm_watch(inotify_fd, inotify_wd);
- close(inotify_fd);
return ret< 0; } diff --git a/powerdebug.h b/powerdebug.h index f97e3b9..4071eaa 100644 --- a/powerdebug.h +++ b/powerdebug.h @@ -54,3 +54,6 @@ extern void create_selectedwindow(int selectedwindow); struct regulator_info; extern void show_regulator_info(struct regulator_info *reg_info, int nr_reg, int verbose); +extern int inotify_fd; +extern int inotify_wd; +extern int need_refresh(void);
I would suggest you create a clock_info structure where you store the inotify_fd and inotify_wd and you use a clock_fini function.
struct clock_info *clock_info;
...
clock_info = clock_init();
...
clock_fini(clock_info);
...
That will prevent to add more global variables and extern definitions.
I agree to some degree. The situation is that we are trying to finish some certain working items in this cycle, so time is tight. About those polishing tasks, I suggest we could do it after the major functions have been implemented, like what you did, a serial patches dedicated for such purpose.
Yong,
Let's do it the right way, now that we have pretty looking code :)
Regards, Amit
On 04/05/2011 10:28 AM, yong.shen@linaro.org wrote:
From: Yong Shenyong.shen@linaro.org
everytime when screen refresh, the clock_info data stucture will be reacclocated, which does not make sence. This patch addresses this issue.
Signed-off-by: Yong Shenyong.shen@linaro.org
Hi Yong,
I tried this patch but it segfaults :/
gdb powerdebug core GNU gdb (GDB) 7.2-ubuntu Copyright (C) 2010 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later http://gnu.org/licenses/gpl.html This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "arm-linux-gnueabi". For bug reporting instructions, please see: http://www.gnu.org/software/gdb/bugs/... Reading symbols from /home/dlezcano/work/src/powerdebug/powerdebug...done. [New Thread 7821] Reading symbols from /lib/libncurses.so.5...(no debugging symbols found)...done. Loaded symbols for /lib/libncurses.so.5 Reading symbols from /lib/libc.so.6...(no debugging symbols found)...done. Loaded symbols for /lib/libc.so.6 Reading symbols from /lib/ld-linux.so.3...(no debugging symbols found)...done. Loaded symbols for /lib/ld-linux.so.3 Reading symbols from /lib/libdl.so.2...(no debugging symbols found)...done. Loaded symbols for /lib/libdl.so.2 Core was generated by `./powerdebug'. Program terminated with signal 11, Segmentation fault. #0 add_clock_details_recur (clock=0x76040018, hrow=0, selected=0) at clocks.c:258 258 double drate = (double)clock->rate; (gdb) bt #0 add_clock_details_recur (clock=0x76040018, hrow=0, selected=0) at clocks.c:258 #1 0x0000ad68 in print_clock_info (verbose=<value optimized out>, hrow=0, selected=0) at clocks.c:305 #2 0x0000ae9e in read_and_print_clock_info (verbose=0, hrow=0, selected=0) at clocks.c:215 #3 0x000098a8 in mainloop (options=0x1feb008, reg_info=0x1feb020, nr_reg=6) at powerdebug.c:275 #4 0x00009a48 in powerdebug_display (argc=<value optimized out>, argv=<value optimized out>) at powerdebug.c:341 #5 main (argc=<value optimized out>, argv=<value optimized out>) at powerdebug.c:390 (gdb)
Feel free if you need more informations.
Thanks -- Daniel
Hi Daniel,
It runs well on my board so far. I will try to do more test to reproduce it. Meanwhile, could you please print your clock tree for me? Using 'powerdebug -cvd'.
Cheers Yong
On Wed, Apr 6, 2011 at 8:45 PM, Daniel Lezcano daniel.lezcano@free.frwrote:
On 04/05/2011 10:28 AM, yong.shen@linaro.org wrote:
From: Yong Shenyong.shen@linaro.org
everytime when screen refresh, the clock_info data stucture will be reacclocated, which does not make sence. This patch addresses this issue.
Signed-off-by: Yong Shenyong.shen@linaro.org
Hi Yong,
I tried this patch but it segfaults :/
gdb powerdebug core GNU gdb (GDB) 7.2-ubuntu Copyright (C) 2010 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later < http://gnu.org/licenses/gpl.html%3E This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "arm-linux-gnueabi". For bug reporting instructions, please see: http://www.gnu.org/software/gdb/bugs/... Reading symbols from /home/dlezcano/work/src/powerdebug/powerdebug...done. [New Thread 7821] Reading symbols from /lib/libncurses.so.5...(no debugging symbols found)...done. Loaded symbols for /lib/libncurses.so.5 Reading symbols from /lib/libc.so.6...(no debugging symbols found)...done. Loaded symbols for /lib/libc.so.6 Reading symbols from /lib/ld-linux.so.3...(no debugging symbols found)...done. Loaded symbols for /lib/ld-linux.so.3 Reading symbols from /lib/libdl.so.2...(no debugging symbols found)...done. Loaded symbols for /lib/libdl.so.2 Core was generated by `./powerdebug'. Program terminated with signal 11, Segmentation fault. #0 add_clock_details_recur (clock=0x76040018, hrow=0, selected=0) at clocks.c:258 258 double drate = (double)clock->rate; (gdb) bt #0 add_clock_details_recur (clock=0x76040018, hrow=0, selected=0) at clocks.c:258 #1 0x0000ad68 in print_clock_info (verbose=<value optimized out>, hrow=0, selected=0) at clocks.c:305 #2 0x0000ae9e in read_and_print_clock_info (verbose=0, hrow=0, selected=0) at clocks.c:215 #3 0x000098a8 in mainloop (options=0x1feb008, reg_info=0x1feb020, nr_reg=6) at powerdebug.c:275 #4 0x00009a48 in powerdebug_display (argc=<value optimized out>, argv=<value optimized out>) at powerdebug.c:341 #5 main (argc=<value optimized out>, argv=<value optimized out>) at powerdebug.c:390 (gdb)
Feel free if you need more informations.
Thanks -- Daniel
On 04/06/2011 03:28 PM, Yong Shen wrote:
Hi Daniel,
It runs well on my board so far.
I have an igep v2.
I will try to do more test to reproduce it. Meanwhile, could you please print your clock tree for me? Using 'powerdebug -cvd'.
Sure here it is, I put the result of the 'tree' command and the result of powerdebug -cvd
powerdebug -cvd result ===============
Clock Tree : ********** / |-- apb_pclk (flags:0x0,usecount:0,rate: 0.00 Hz) |-- virt_12m_ck (flags:0x0,usecount:0,rate:12.00 MHz) |-- virt_13m_ck (flags:0x0,usecount:0,rate:13.00 MHz) |-- virt_16_8m_ck (flags:0x0,usecount:0,rate:16.80 MHz) |-- virt_19_2m_ck (flags:0x0,usecount:0,rate:19.20 MHz) |-- virt_38_4m_ck (flags:0x0,usecount:0,rate:38.40 MHz) |-- sys_altclk (flags:0x0,usecount:0,rate: 0.00 Hz) |-- mcbsp_clks (flags:0x0,usecount:0,rate: 0.00 Hz) |-- omap_32k_fck (flags:0x0,usecount:1,rate:32.77 KHz) | |-- gpt10_fck (flags:0x4a4000,usecount:0,rate:32.77 KHz) | |-- gpt11_fck (flags:0x4a4000,usecount:0,rate:32.77 KHz) | |-- ts_fck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpt1_fck (flags:0x4c4000,usecount:1,rate:32.77 KHz) | |-- wkup_32k_fck (flags:0x0,usecount:0,rate:32.77 KHz) | | |-- gpio1_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | | `-- wdt2_fck (flags:0x0,usecount:0,rate:32.77 KHz) | `-- per_32k_alwon_fck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio6_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio5_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio4_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio3_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio2_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | `-- wdt3_fck (flags:0x0,usecount:0,rate:32.77 KHz) |-- virt_26m_ck (flags:0x0,usecount:1,rate:26.00 MHz) | `-- osc_sys_ck (flags:0x306d4000,usecount:1,rate:26.00 MHz) | |-- sys_clkout1 (flags:0x0,usecount:0,rate:26.00 MHz) | `-- sys_ck (flags:0x30727000,usecount:4,rate:13.00 MHz) | |-- dpll1_ck (flags:0x0,usecount:0,rate:720.00 MHz) | | `-- dpll1_x2_ck (flags:0x0,usecount:0,rate:1440.00 MHz) | | `-- dpll1_x2m2_ck (flags:0x494400,usecount:0,rate:1440.00 MHz) | | `-- mpu_ck (flags:0x0,usecount:0,rate:1440.00 MHz) | | |-- arm_fck (flags:0x492400,usecount:0,rate:720.00 MHz) | | `-- emu_mpu_alwon_ck (flags:0x0,usecount:0,rate:1440.00 MHz) | |-- dpll2_ck (flags:0x0,usecount:0,rate:360.00 MHz) | | `-- dpll2_m2_ck (flags:0x404400,usecount:0,rate:360.00 MHz) | | `-- iva2_ck (flags:0x0,usecount:0,rate:360.00 MHz) | |-- modem_fck (flags:0x0,usecount:0,rate:13.00 MHz) | |-- cpefuse_fck (flags:0x0,usecount:0,rate:13.00 MHz) | |-- dss2_alwon_fck (flags:0x0,usecount:0,rate:13.00 MHz) | |-- dpll5_ck (flags:0x0,usecount:1,rate:120.00 MHz) | | `-- dpll5_m2_ck (flags:0x4d5000,usecount:2,rate:120.00 MHz) | | |-- usbtll_fck (flags:0x0,usecount:1,rate:120.00 MHz) | | `-- usbhost_120m_fck (flags:0x0,usecount:1,rate:120.00 MHz) | |-- usim_fck (flags:0x4c4000,usecount:0,rate: 6.50 MHz) | |-- wkup_l4_ick (flags:0x0,usecount:3,rate:13.00 MHz) | | |-- usim_ick (flags:0x0,usecount:0,rate:13.00 MHz) | | |-- wdt2_ick (flags:0x0,usecount:0,rate:13.00 MHz) | | |-- wdt1_ick (flags:0x0,usecount:0,rate:13.00 MHz) | | |-- gpio1_ick (flags:0x0,usecount:1,rate:13.00 MHz) | | |-- omap_32ksync_ick (flags:0x0,usecount:1,rate:13.00 MHz) | | |-- gpt12_ick (flags:0x0,usecount:0,rate:13.00 MHz) | | `-- gpt1_ick (flags:0x0,usecount:1,rate:13.00 MHz) | |-- gpt2_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt3_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt4_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt5_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt6_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt7_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt8_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt9_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- dpll4_ck (flags:0x0,usecount:1,rate:432.00 MHz) | | |-- dpll4_x2_ck (flags:0x0,usecount:0,rate:864.00 MHz) | | |-- dpll4_m6_ck (flags:0x514000,usecount:0,rate:144.00 MHz) | | | `-- dpll4_m6x2_ck (flags:0x10,usecount:0,rate:288.00 MHz) | | | `-- emu_per_alwon_ck (flags:0x0,usecount:0,rate:288.00 MHz) | | |-- dpll4_m4_ck (flags:0x4e4000,usecount:0,rate:72.00 MHz) | | | `-- dpll4_m4x2_ck (flags:0x10,usecount:0,rate:144.00 MHz) | | | `-- dss1_alwon_fck (flags:0x0,usecount:0,rate:144.00 MHz) | | |-- dpll4_m3_ck (flags:0x4e4000,usecount:0,rate:27.00 MHz) | | | `-- dpll4_m3x2_ck (flags:0x10,usecount:0,rate:54.00 MHz) | | | `-- omap_54m_fck (flags:0x4d4000,usecount:0,rate:54.00 MHz) | | | |-- clkout2_src_ck (flags:0x4d7000,usecount:0,rate:54.00 MHz) | | | | `-- sys_clkout2 (flags:0x4d7000,usecount:0,rate:54.00 MHz) | | | `-- dss_tv_fck (flags:0x0,usecount:0,rate:54.00 MHz) | | |-- dpll4_m5_ck (flags:0x4f4000,usecount:0,rate:108.00 MHz) | | | `-- dpll4_m5x2_ck (flags:0x10,usecount:0,rate:216.00 MHz) | | | `-- cam_mclk (flags:0x0,usecount:0,rate:216.00 MHz) | | `-- dpll4_m2_ck (flags:0x4d4800,usecount:1,rate:48.00 MHz) | | `-- dpll4_m2x2_ck (flags:0x10,usecount:1,rate:96.00 MHz) | | `-- omap_96m_alwon_fck (flags:0x0,usecount:1,rate:96.00 MHz) | | |-- cm_96m_fck (flags:0x0,usecount:1,rate:96.00 MHz) | | | |-- omap_96m_fck (flags:0x4d4000,usecount:0,rate:96.00 MHz) | | | | |-- dss_96m_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | `-- core_96m_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mmchs3_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mmchs2_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mspro_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mmchs1_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- i2c3_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- i2c2_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- i2c1_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mcbsp5_fck (flags:0x22d800,usecount:0,rate:96.00 MHz) | | | | |-- mcbsp1_fck (flags:0x227400,usecount:0,rate:96.00 MHz) | | | | `-- csi2_96m_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | `-- omap_48m_fck (flags:0x4d4000,usecount:3,rate:48.00 MHz) | | | |-- core_48m_fck (flags:0x0,usecount:2,rate:48.00 MHz) | | | | |-- mcspi4_fck (flags:0x0,usecount:0,rate:48.00 MHz) | | | | |-- mcspi3_fck (flags:0x0,usecount:0,rate:48.00 MHz) | | | | |-- mcspi2_fck (flags:0x0,usecount:0,rate:48.00 MHz) | | | | |-- mcspi1_fck (flags:0x0,usecount:0,rate:48.00 MHz) | | | | |-- uart2_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | | | `-- uart1_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | | |-- omap_12m_fck (flags:0x0,usecount:0,rate:12.00 MHz) | | | | `-- core_12m_fck (flags:0x0,usecount:0,rate:12.00 MHz) | | | | `-- hdq_fck (flags:0x0,usecount:0,rate:12.00 MHz) | | | |-- usbhost_48m_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | | `-- per_48m_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | | `-- uart3_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | `-- per_96m_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | |-- mcbsp2_fck (flags:0x227400,usecount:0,rate:96.00 MHz) | | |-- mcbsp3_fck (flags:0x22d800,usecount:0,rate:96.00 MHz) | | `-- mcbsp4_fck (flags:0x22d800,usecount:0,rate:96.00 MHz) | |-- emu_src_ck (flags:0x514000,usecount:0,rate:13.00 MHz) | | |-- pclk_fck (flags:0x514000,usecount:0,rate: 6.50 MHz) | | |-- pclkx2_fck (flags:0x514000,usecount:0,rate:13.00 MHz) | | `-- atclk_fck (flags:0x514000,usecount:0,rate:13.00 MHz) | |-- traceclk_src_fck (flags:0x514000,usecount:0,rate:13.00 MHz) | | `-- traceclk_fck (flags:0x514000,usecount:0,rate:13.00 MHz) | |-- sr1_fck (flags:0x0,usecount:0,rate:13.00 MHz) | |-- sr2_fck (flags:0x0,usecount:0,rate:13.00 MHz) | `-- dpll3_ck (flags:0x0,usecount:1,rate:332.00 MHz) | |-- dpll3_x2_ck (flags:0x0,usecount:0,rate:664.00 MHz) | |-- dpll3_m3_ck (flags:0x514000,usecount:0,rate:166.00 MHz) | | `-- dpll3_m3x2_ck (flags:0x10,usecount:0,rate:332.00 MHz) | | `-- emu_core_alwon_ck (flags:0x0,usecount:0,rate:332.00 MHz) | `-- dpll3_m2_ck (flags:0x4d4000,usecount:1,rate:332.00 MHz) | |-- dpll3_m2x2_ck (flags:0x0,usecount:0,rate:664.00 MHz) | | `-- corex2_fck (flags:0x0,usecount:0,rate:664.00 MHz) | | `-- ssi_ssr_fck (flags:0x4a4000,usecount:0,rate:221.33 MHz) | | `-- ssi_sst_fck (flags:0x0,usecount:0,rate:110.67 MHz) | `-- core_ck (flags:0x0,usecount:1,rate:332.00 MHz) | |-- dpll1_fck (flags:0x494000,usecount:0,rate:166.00 MHz) | |-- dpll2_fck (flags:0x404000,usecount:0,rate:332.00 MHz) | |-- sgx_fck (flags:0x4b4000,usecount:0,rate:55.33 MHz) | `-- l3_ick (flags:0x4a4000,usecount:2,rate:166.00 MHz) | |-- sgx_ick (flags:0x0,usecount:0,rate:166.00 MHz) | |-- sad2d_ick (flags:0x0,usecount:0,rate:166.00 MHz) | |-- mad2d_ick (flags:0x0,usecount:0,rate:166.00 MHz) | |-- core_l3_ick (flags:0x0,usecount:3,rate:166.00 MHz) | | |-- hsotgusb_ick (flags:0x0,usecount:1,rate:166.00 MHz) | | |-- sdrc_ick (flags:0x8,usecount:1,rate:166.00 MHz) | | `-- gpmc_fck (flags:0x8,usecount:2,rate:166.00 MHz) | |-- security_l3_ick (flags:0x0,usecount:0,rate:166.00 MHz) | | `-- pka_ick (flags:0x0,usecount:0,rate:166.00 MHz) | `-- l4_ick (flags:0x4a4000,usecount:3,rate:83.00 MHz) | |-- rm_ick (flags:0x4c4000,usecount:0,rate:41.50 MHz) | |-- core_l4_ick (flags:0x0,usecount:6,rate:83.00 MHz) | | |-- usbtll_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- mmchs3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- icr_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- aes2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- sha12_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- des2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mmchs2_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- mmchs1_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- mspro_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- hdq_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcspi4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcspi3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcspi2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcspi1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- i2c3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- i2c2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- i2c1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- uart2_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- uart1_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpt11_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt10_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp5_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mailboxes_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- omapctrl_ick (flags:0x8,usecount:1,rate:83.00 MHz) | |-- ssi_l4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- ssi_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- security_l4_ick2 (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- aes1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- rng_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- sha11_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- des1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- dss_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- cam_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- usbhost_ick (flags:0x0,usecount:1,rate:83.00 MHz) | |-- per_l4_ick (flags:0x0,usecount:6,rate:83.00 MHz) | | |-- gpio6_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio5_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio4_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio3_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio2_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- wdt3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- uart3_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpt9_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt8_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt7_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt6_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt5_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt11_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt10_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp5_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mailboxes_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- omapctrl_ick (flags:0x8,usecount:1,rate:83.00 MHz) | |-- ssi_l4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- ssi_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- security_l4_ick2 (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- aes1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- rng_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- sha11_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- des1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- dss_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- cam_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- usbhost_ick (flags:0x0,usecount:1,rate:83.00 MHz) | |-- per_l4_ick (flags:0x0,usecount:6,rate:83.00 MHz) | | |-- gpio6_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio5_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio4_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio3_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio2_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- wdt3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- uart3_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpt9_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt8_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt7_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt6_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt5_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- mcbsp4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | `-- sr_l4_ick (flags:0x0,usecount:0,rate:83.00 MHz) `-- secure_32k_fck (flags:0x0,usecount:0,rate:32.77 KHz) |-- gpt12_fck (flags:0x0,usecount:0,rate:32.77 KHz) `-- wdt1_fck (flags:0x0,usecount:0,rate:32.77 KHz)
tree -d result : =========
tree -d /sys/kernel/debug/clock/ /sys/kernel/debug/clock/ ├── apb_pclk ├── mcbsp_clks ├── omap_32k_fck │ ├── gpt10_fck │ ├── gpt11_fck │ ├── gpt1_fck │ ├── per_32k_alwon_fck │ │ ├── gpio2_dbck │ │ ├── gpio3_dbck │ │ ├── gpio4_dbck │ │ ├── gpio5_dbck │ │ ├── gpio6_dbck │ │ └── wdt3_fck │ ├── ts_fck │ └── wkup_32k_fck │ ├── gpio1_dbck │ └── wdt2_fck ├── secure_32k_fck │ ├── gpt12_fck │ └── wdt1_fck ├── sys_altclk ├── virt_12m_ck ├── virt_13m_ck ├── virt_16_8m_ck ├── virt_19_2m_ck ├── virt_26m_ck │ └── osc_sys_ck │ ├── sys_ck │ │ ├── cpefuse_fck │ │ ├── dpll1_ck │ │ │ └── dpll1_x2_ck │ │ │ └── dpll1_x2m2_ck │ │ │ └── mpu_ck │ │ │ ├── arm_fck │ │ │ └── emu_mpu_alwon_ck │ │ ├── dpll2_ck │ │ │ └── dpll2_m2_ck │ │ │ └── iva2_ck │ │ ├── dpll3_ck │ │ │ ├── dpll3_m2_ck │ │ │ │ ├── core_ck │ │ │ │ │ ├── dpll1_fck │ │ │ │ │ ├── dpll2_fck │ │ │ │ │ ├── l3_ick │ │ │ │ │ │ ├── core_l3_ick │ │ │ │ │ │ │ ├── gpmc_fck │ │ │ │ │ │ │ ├── hsotgusb_ick │ │ │ │ │ │ │ └── sdrc_ick │ │ │ │ │ │ ├── l4_ick │ │ │ │ │ │ │ ├── cam_ick │ │ │ │ │ │ │ ├── core_l4_ick │ │ │ │ │ │ │ │ ├── aes2_ick │ │ │ │ │ │ │ │ ├── des2_ick │ │ │ │ │ │ │ │ ├── gpt10_ick │ │ │ │ │ │ │ │ ├── gpt11_ick │ │ │ │ │ │ │ │ ├── hdq_ick │ │ │ │ │ │ │ │ ├── i2c1_ick │ │ │ │ │ │ │ │ ├── i2c2_ick │ │ │ │ │ │ │ │ ├── i2c3_ick │ │ │ │ │ │ │ │ ├── icr_ick │ │ │ │ │ │ │ │ ├── mailboxes_ick │ │ │ │ │ │ │ │ ├── mcbsp1_ick │ │ │ │ │ │ │ │ ├── mcbsp5_ick │ │ │ │ │ │ │ │ ├── mcspi1_ick │ │ │ │ │ │ │ │ ├── mcspi2_ick │ │ │ │ │ │ │ │ ├── mcspi3_ick │ │ │ │ │ │ │ │ ├── mcspi4_ick │ │ │ │ │ │ │ │ ├── mmchs1_ick │ │ │ │ │ │ │ │ ├── mmchs2_ick │ │ │ │ │ │ │ │ ├── mmchs3_ick │ │ │ │ │ │ │ │ ├── mspro_ick │ │ │ │ │ │ │ │ ├── omapctrl_ick │ │ │ │ │ │ │ │ ├── sha12_ick │ │ │ │ │ │ │ │ ├── uart1_ick │ │ │ │ │ │ │ │ ├── uart2_ick │ │ │ │ │ │ │ │ └── usbtll_ick │ │ │ │ │ │ │ ├── dss_ick │ │ │ │ │ │ │ ├── per_l4_ick │ │ │ │ │ │ │ │ ├── gpio2_ick │ │ │ │ │ │ │ │ ├── gpio3_ick │ │ │ │ │ │ │ │ ├── gpio4_ick │ │ │ │ │ │ │ │ ├── gpio5_ick │ │ │ │ │ │ │ │ ├── gpio6_ick │ │ │ │ │ │ │ │ ├── gpt2_ick │ │ │ │ │ │ │ │ ├── gpt3_ick │ │ │ │ │ │ │ │ ├── gpt4_ick │ │ │ │ │ │ │ │ ├── gpt5_ick │ │ │ │ │ │ │ │ ├── gpt6_ick │ │ │ │ │ │ │ │ ├── gpt7_ick │ │ │ │ │ │ │ │ ├── gpt8_ick │ │ │ │ │ │ │ │ ├── gpt9_ick │ │ │ │ │ │ │ │ ├── mcbsp2_ick │ │ │ │ │ │ │ │ ├── mcbsp3_ick │ │ │ │ │ │ │ │ ├── mcbsp4_ick │ │ │ │ │ │ │ │ ├── uart3_ick │ │ │ │ │ │ │ │ └── wdt3_ick │ │ │ │ │ │ │ ├── rm_ick │ │ │ │ │ │ │ ├── security_l4_ick2 │ │ │ │ │ │ │ │ ├── aes1_ick │ │ │ │ │ │ │ │ ├── des1_ick │ │ │ │ │ │ │ │ ├── rng_ick │ │ │ │ │ │ │ │ └── sha11_ick │ │ │ │ │ │ │ ├── sr_l4_ick │ │ │ │ │ │ │ ├── ssi_l4_ick │ │ │ │ │ │ │ │ └── ssi_ick │ │ │ │ │ │ │ └── usbhost_ick │ │ │ │ │ │ ├── mad2d_ick │ │ │ │ │ │ ├── sad2d_ick │ │ │ │ │ │ ├── security_l3_ick │ │ │ │ │ │ │ └── pka_ick │ │ │ │ │ │ └── sgx_ick │ │ │ │ │ └── sgx_fck │ │ │ │ └── dpll3_m2x2_ck │ │ │ │ └── corex2_fck │ │ │ │ └── ssi_ssr_fck │ │ │ │ └── ssi_sst_fck │ │ │ ├── dpll3_m3_ck │ │ │ │ └── dpll3_m3x2_ck │ │ │ │ └── emu_core_alwon_ck │ │ │ └── dpll3_x2_ck │ │ ├── dpll4_ck │ │ │ ├── dpll4_m2_ck │ │ │ │ └── dpll4_m2x2_ck │ │ │ │ └── omap_96m_alwon_fck │ │ │ │ ├── cm_96m_fck │ │ │ │ │ ├── omap_48m_fck │ │ │ │ │ │ ├── core_48m_fck │ │ │ │ │ │ │ ├── mcspi1_fck │ │ │ │ │ │ │ ├── mcspi2_fck │ │ │ │ │ │ │ ├── mcspi3_fck │ │ │ │ │ │ │ ├── mcspi4_fck │ │ │ │ │ │ │ ├── uart1_fck │ │ │ │ │ │ │ └── uart2_fck │ │ │ │ │ │ ├── omap_12m_fck │ │ │ │ │ │ │ └── core_12m_fck │ │ │ │ │ │ │ └── hdq_fck │ │ │ │ │ │ ├── per_48m_fck │ │ │ │ │ │ │ └── uart3_fck │ │ │ │ │ │ └── usbhost_48m_fck │ │ │ │ │ └── omap_96m_fck │ │ │ │ │ ├── core_96m_fck │ │ │ │ │ │ ├── csi2_96m_fck │ │ │ │ │ │ ├── i2c1_fck │ │ │ │ │ │ ├── i2c2_fck │ │ │ │ │ │ ├── i2c3_fck │ │ │ │ │ │ ├── mcbsp1_fck │ │ │ │ │ │ ├── mcbsp5_fck │ │ │ │ │ │ ├── mmchs1_fck │ │ │ │ │ │ ├── mmchs2_fck │ │ │ │ │ │ ├── mmchs3_fck │ │ │ │ │ │ └── mspro_fck │ │ │ │ │ └── dss_96m_fck │ │ │ │ └── per_96m_fck │ │ │ │ ├── mcbsp2_fck │ │ │ │ ├── mcbsp3_fck │ │ │ │ └── mcbsp4_fck │ │ │ ├── dpll4_m3_ck │ │ │ │ └── dpll4_m3x2_ck │ │ │ │ └── omap_54m_fck │ │ │ │ ├── clkout2_src_ck │ │ │ │ │ └── sys_clkout2 │ │ │ │ └── dss_tv_fck │ │ │ ├── dpll4_m4_ck │ │ │ │ └── dpll4_m4x2_ck │ │ │ │ └── dss1_alwon_fck │ │ │ ├── dpll4_m5_ck │ │ │ │ └── dpll4_m5x2_ck │ │ │ │ └── cam_mclk │ │ │ ├── dpll4_m6_ck │ │ │ │ └── dpll4_m6x2_ck │ │ │ │ └── emu_per_alwon_ck │ │ │ └── dpll4_x2_ck │ │ ├── dpll5_ck │ │ │ └── dpll5_m2_ck │ │ │ ├── usbhost_120m_fck │ │ │ └── usbtll_fck │ │ ├── dss2_alwon_fck │ │ ├── emu_src_ck │ │ │ ├── atclk_fck │ │ │ ├── pclk_fck │ │ │ └── pclkx2_fck │ │ ├── gpt2_fck │ │ ├── gpt3_fck │ │ ├── gpt4_fck │ │ ├── gpt5_fck │ │ ├── gpt6_fck │ │ ├── gpt7_fck │ │ ├── gpt8_fck │ │ ├── gpt9_fck │ │ ├── modem_fck │ │ ├── sr1_fck │ │ ├── sr2_fck │ │ ├── traceclk_src_fck │ │ │ └── traceclk_fck │ │ ├── usim_fck │ │ └── wkup_l4_ick │ │ ├── gpio1_ick │ │ ├── gpt12_ick │ │ ├── gpt1_ick │ │ ├── omap_32ksync_ick │ │ ├── usim_ick │ │ ├── wdt1_ick │ │ └── wdt2_ick │ └── sys_clkout1 └── virt_38_4m_ck
Hi Daniel,
Thanks for the input. I have been trying hard to reproduce this bug, but failed. Is it a random bug or not? If it is not too trouble, I would appreciate you can help debug, since so far it only happens on your board.
Hi Guys of PMWG,
If you get some time, please help to test powerdebug on your hardware, which had been reported a segment fault by Daniel. Maybe it happens in some special situations.
Thanks Yong
On Thu, Apr 7, 2011 at 5:35 AM, Daniel Lezcano daniel.lezcano@free.frwrote:
On 04/06/2011 03:28 PM, Yong Shen wrote:
Hi Daniel,
It runs well on my board so far.
I have an igep v2.
I will try to do more test to reproduce it. Meanwhile, could you please
print your clock tree for me? Using 'powerdebug -cvd'.
Sure here it is, I put the result of the 'tree' command and the result of powerdebug -cvd
powerdebug -cvd result
Clock Tree :
/ |-- apb_pclk (flags:0x0,usecount:0,rate: 0.00 Hz) |-- virt_12m_ck (flags:0x0,usecount:0,rate:12.00 MHz) |-- virt_13m_ck (flags:0x0,usecount:0,rate:13.00 MHz) |-- virt_16_8m_ck (flags:0x0,usecount:0,rate:16.80 MHz) |-- virt_19_2m_ck (flags:0x0,usecount:0,rate:19.20 MHz) |-- virt_38_4m_ck (flags:0x0,usecount:0,rate:38.40 MHz) |-- sys_altclk (flags:0x0,usecount:0,rate: 0.00 Hz) |-- mcbsp_clks (flags:0x0,usecount:0,rate: 0.00 Hz) |-- omap_32k_fck (flags:0x0,usecount:1,rate:32.77 KHz) | |-- gpt10_fck (flags:0x4a4000,usecount:0,rate:32.77 KHz) | |-- gpt11_fck (flags:0x4a4000,usecount:0,rate:32.77 KHz) | |-- ts_fck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpt1_fck (flags:0x4c4000,usecount:1,rate:32.77 KHz) | |-- wkup_32k_fck (flags:0x0,usecount:0,rate:32.77 KHz) | | |-- gpio1_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | | `-- wdt2_fck (flags:0x0,usecount:0,rate:32.77 KHz) | `-- per_32k_alwon_fck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio6_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio5_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio4_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio3_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | |-- gpio2_dbck (flags:0x0,usecount:0,rate:32.77 KHz) | `-- wdt3_fck (flags:0x0,usecount:0,rate:32.77 KHz) |-- virt_26m_ck (flags:0x0,usecount:1,rate:26.00 MHz) | `-- osc_sys_ck (flags:0x306d4000,usecount:1,rate:26.00 MHz) | |-- sys_clkout1 (flags:0x0,usecount:0,rate:26.00 MHz) | `-- sys_ck (flags:0x30727000,usecount:4,rate:13.00 MHz) | |-- dpll1_ck (flags:0x0,usecount:0,rate:720.00 MHz) | | `-- dpll1_x2_ck (flags:0x0,usecount:0,rate:1440.00 MHz) | | `-- dpll1_x2m2_ck (flags:0x494400,usecount:0,rate:1440.00 MHz) | | `-- mpu_ck (flags:0x0,usecount:0,rate:1440.00 MHz) | | |-- arm_fck (flags:0x492400,usecount:0,rate:720.00 MHz) | | `-- emu_mpu_alwon_ck (flags:0x0,usecount:0,rate:1440.00 MHz) | |-- dpll2_ck (flags:0x0,usecount:0,rate:360.00 MHz) | | `-- dpll2_m2_ck (flags:0x404400,usecount:0,rate:360.00 MHz) | | `-- iva2_ck (flags:0x0,usecount:0,rate:360.00 MHz) | |-- modem_fck (flags:0x0,usecount:0,rate:13.00 MHz) | |-- cpefuse_fck (flags:0x0,usecount:0,rate:13.00 MHz) | |-- dss2_alwon_fck (flags:0x0,usecount:0,rate:13.00 MHz) | |-- dpll5_ck (flags:0x0,usecount:1,rate:120.00 MHz) | | `-- dpll5_m2_ck (flags:0x4d5000,usecount:2,rate:120.00 MHz) | | |-- usbtll_fck (flags:0x0,usecount:1,rate:120.00 MHz) | | `-- usbhost_120m_fck (flags:0x0,usecount:1,rate:120.00 MHz) | |-- usim_fck (flags:0x4c4000,usecount:0,rate: 6.50 MHz) | |-- wkup_l4_ick (flags:0x0,usecount:3,rate:13.00 MHz) | | |-- usim_ick (flags:0x0,usecount:0,rate:13.00 MHz) | | |-- wdt2_ick (flags:0x0,usecount:0,rate:13.00 MHz) | | |-- wdt1_ick (flags:0x0,usecount:0,rate:13.00 MHz) | | |-- gpio1_ick (flags:0x0,usecount:1,rate:13.00 MHz) | | |-- omap_32ksync_ick (flags:0x0,usecount:1,rate:13.00 MHz) | | |-- gpt12_ick (flags:0x0,usecount:0,rate:13.00 MHz) | | `-- gpt1_ick (flags:0x0,usecount:1,rate:13.00 MHz) | |-- gpt2_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt3_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt4_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt5_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt6_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt7_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt8_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- gpt9_fck (flags:0x504000,usecount:0,rate:13.00 MHz) | |-- dpll4_ck (flags:0x0,usecount:1,rate:432.00 MHz) | | |-- dpll4_x2_ck (flags:0x0,usecount:0,rate:864.00 MHz) | | |-- dpll4_m6_ck (flags:0x514000,usecount:0,rate:144.00 MHz) | | | `-- dpll4_m6x2_ck (flags:0x10,usecount:0,rate:288.00 MHz) | | | `-- emu_per_alwon_ck (flags:0x0,usecount:0,rate:288.00 MHz) | | |-- dpll4_m4_ck (flags:0x4e4000,usecount:0,rate:72.00 MHz) | | | `-- dpll4_m4x2_ck (flags:0x10,usecount:0,rate:144.00 MHz) | | | `-- dss1_alwon_fck (flags:0x0,usecount:0,rate:144.00 MHz) | | |-- dpll4_m3_ck (flags:0x4e4000,usecount:0,rate:27.00 MHz) | | | `-- dpll4_m3x2_ck (flags:0x10,usecount:0,rate:54.00 MHz) | | | `-- omap_54m_fck (flags:0x4d4000,usecount:0,rate:54.00 MHz) | | | |-- clkout2_src_ck (flags:0x4d7000,usecount:0,rate:54.00 MHz) | | | | `-- sys_clkout2 (flags:0x4d7000,usecount:0,rate:54.00 MHz) | | | `-- dss_tv_fck (flags:0x0,usecount:0,rate:54.00 MHz) | | |-- dpll4_m5_ck (flags:0x4f4000,usecount:0,rate:108.00 MHz) | | | `-- dpll4_m5x2_ck (flags:0x10,usecount:0,rate:216.00 MHz) | | | `-- cam_mclk (flags:0x0,usecount:0,rate:216.00 MHz) | | `-- dpll4_m2_ck (flags:0x4d4800,usecount:1,rate:48.00 MHz) | | `-- dpll4_m2x2_ck (flags:0x10,usecount:1,rate:96.00 MHz) | | `-- omap_96m_alwon_fck (flags:0x0,usecount:1,rate:96.00 MHz) | | |-- cm_96m_fck (flags:0x0,usecount:1,rate:96.00 MHz) | | | |-- omap_96m_fck (flags:0x4d4000,usecount:0,rate:96.00 MHz) | | | | |-- dss_96m_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | `-- core_96m_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mmchs3_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mmchs2_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mspro_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mmchs1_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- i2c3_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- i2c2_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- i2c1_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | | |-- mcbsp5_fck (flags:0x22d800,usecount:0,rate:96.00 MHz) | | | | |-- mcbsp1_fck (flags:0x227400,usecount:0,rate:96.00 MHz) | | | | `-- csi2_96m_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | | `-- omap_48m_fck (flags:0x4d4000,usecount:3,rate:48.00 MHz) | | | |-- core_48m_fck (flags:0x0,usecount:2,rate:48.00 MHz) | | | | |-- mcspi4_fck (flags:0x0,usecount:0,rate:48.00 MHz) | | | | |-- mcspi3_fck (flags:0x0,usecount:0,rate:48.00 MHz) | | | | |-- mcspi2_fck (flags:0x0,usecount:0,rate:48.00 MHz) | | | | |-- mcspi1_fck (flags:0x0,usecount:0,rate:48.00 MHz) | | | | |-- uart2_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | | | `-- uart1_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | | |-- omap_12m_fck (flags:0x0,usecount:0,rate:12.00 MHz) | | | | `-- core_12m_fck (flags:0x0,usecount:0,rate:12.00 MHz) | | | | `-- hdq_fck (flags:0x0,usecount:0,rate:12.00 MHz) | | | |-- usbhost_48m_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | | `-- per_48m_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | | `-- uart3_fck (flags:0x0,usecount:1,rate:48.00 MHz) | | `-- per_96m_fck (flags:0x0,usecount:0,rate:96.00 MHz) | | |-- mcbsp2_fck (flags:0x227400,usecount:0,rate:96.00 MHz) | | |-- mcbsp3_fck (flags:0x22d800,usecount:0,rate:96.00 MHz) | | `-- mcbsp4_fck (flags:0x22d800,usecount:0,rate:96.00 MHz) | |-- emu_src_ck (flags:0x514000,usecount:0,rate:13.00 MHz) | | |-- pclk_fck (flags:0x514000,usecount:0,rate: 6.50 MHz) | | |-- pclkx2_fck (flags:0x514000,usecount:0,rate:13.00 MHz) | | `-- atclk_fck (flags:0x514000,usecount:0,rate:13.00 MHz) | |-- traceclk_src_fck (flags:0x514000,usecount:0,rate:13.00 MHz) | | `-- traceclk_fck (flags:0x514000,usecount:0,rate:13.00 MHz) | |-- sr1_fck (flags:0x0,usecount:0,rate:13.00 MHz) | |-- sr2_fck (flags:0x0,usecount:0,rate:13.00 MHz) | `-- dpll3_ck (flags:0x0,usecount:1,rate:332.00 MHz) | |-- dpll3_x2_ck (flags:0x0,usecount:0,rate:664.00 MHz) | |-- dpll3_m3_ck (flags:0x514000,usecount:0,rate:166.00 MHz) | | `-- dpll3_m3x2_ck (flags:0x10,usecount:0,rate:332.00 MHz) | | `-- emu_core_alwon_ck (flags:0x0,usecount:0,rate:332.00 MHz) | `-- dpll3_m2_ck (flags:0x4d4000,usecount:1,rate:332.00 MHz) | |-- dpll3_m2x2_ck (flags:0x0,usecount:0,rate:664.00 MHz) | | `-- corex2_fck (flags:0x0,usecount:0,rate:664.00 MHz) | | `-- ssi_ssr_fck (flags:0x4a4000,usecount:0,rate:221.33 MHz) | | `-- ssi_sst_fck (flags:0x0,usecount:0,rate:110.67 MHz) | `-- core_ck (flags:0x0,usecount:1,rate:332.00 MHz) | |-- dpll1_fck (flags:0x494000,usecount:0,rate:166.00 MHz) | |-- dpll2_fck (flags:0x404000,usecount:0,rate:332.00 MHz) | |-- sgx_fck (flags:0x4b4000,usecount:0,rate:55.33 MHz) | `-- l3_ick (flags:0x4a4000,usecount:2,rate:166.00 MHz) | |-- sgx_ick (flags:0x0,usecount:0,rate:166.00 MHz) | |-- sad2d_ick (flags:0x0,usecount:0,rate:166.00 MHz) | |-- mad2d_ick (flags:0x0,usecount:0,rate:166.00 MHz) | |-- core_l3_ick (flags:0x0,usecount:3,rate:166.00 MHz) | | |-- hsotgusb_ick (flags:0x0,usecount:1,rate:166.00 MHz) | | |-- sdrc_ick (flags:0x8,usecount:1,rate:166.00 MHz) | | `-- gpmc_fck (flags:0x8,usecount:2,rate:166.00 MHz) | |-- security_l3_ick (flags:0x0,usecount:0,rate:166.00 MHz) | | `-- pka_ick (flags:0x0,usecount:0,rate:166.00 MHz) | `-- l4_ick (flags:0x4a4000,usecount:3,rate:83.00 MHz) | |-- rm_ick (flags:0x4c4000,usecount:0,rate:41.50 MHz) | |-- core_l4_ick (flags:0x0,usecount:6,rate:83.00 MHz) | | |-- usbtll_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- mmchs3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- icr_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- aes2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- sha12_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- des2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mmchs2_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- mmchs1_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- mspro_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- hdq_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcspi4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcspi3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcspi2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcspi1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- i2c3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- i2c2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- i2c1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- uart2_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- uart1_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpt11_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt10_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp5_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mailboxes_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- omapctrl_ick (flags:0x8,usecount:1,rate:83.00 MHz) | |-- ssi_l4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- ssi_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- security_l4_ick2 (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- aes1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- rng_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- sha11_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- des1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- dss_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- cam_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- usbhost_ick (flags:0x0,usecount:1,rate:83.00 MHz) | |-- per_l4_ick (flags:0x0,usecount:6,rate:83.00 MHz) | | |-- gpio6_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio5_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio4_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio3_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio2_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- wdt3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- uart3_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpt9_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt8_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt7_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt6_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt5_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt11_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt10_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp5_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mailboxes_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- omapctrl_ick (flags:0x8,usecount:1,rate:83.00 MHz) | |-- ssi_l4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- ssi_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- security_l4_ick2 (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- aes1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- rng_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- sha11_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- des1_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- dss_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- cam_ick (flags:0x0,usecount:0,rate:83.00 MHz) | |-- usbhost_ick (flags:0x0,usecount:1,rate:83.00 MHz) | |-- per_l4_ick (flags:0x0,usecount:6,rate:83.00 MHz) | | |-- gpio6_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio5_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio4_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio3_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpio2_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- wdt3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- uart3_ick (flags:0x0,usecount:1,rate:83.00 MHz) | | |-- gpt9_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt8_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt7_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt6_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt5_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- gpt2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp2_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | |-- mcbsp3_ick (flags:0x0,usecount:0,rate:83.00 MHz) | | `-- mcbsp4_ick (flags:0x0,usecount:0,rate:83.00 MHz) | `-- sr_l4_ick (flags:0x0,usecount:0,rate:83.00 MHz) `-- secure_32k_fck (flags:0x0,usecount:0,rate:32.77 KHz) |-- gpt12_fck (flags:0x0,usecount:0,rate:32.77 KHz) `-- wdt1_fck (flags:0x0,usecount:0,rate:32.77 KHz)
tree -d result :
tree -d /sys/kernel/debug/clock/ /sys/kernel/debug/clock/ ├── apb_pclk ├── mcbsp_clks ├── omap_32k_fck │ ├── gpt10_fck │ ├── gpt11_fck │ ├── gpt1_fck │ ├── per_32k_alwon_fck │ │ ├── gpio2_dbck │ │ ├── gpio3_dbck │ │ ├── gpio4_dbck │ │ ├── gpio5_dbck │ │ ├── gpio6_dbck │ │ └── wdt3_fck │ ├── ts_fck │ └── wkup_32k_fck │ ├── gpio1_dbck │ └── wdt2_fck ├── secure_32k_fck │ ├── gpt12_fck │ └── wdt1_fck ├── sys_altclk ├── virt_12m_ck ├── virt_13m_ck ├── virt_16_8m_ck ├── virt_19_2m_ck ├── virt_26m_ck │ └── osc_sys_ck │ ├── sys_ck │ │ ├── cpefuse_fck │ │ ├── dpll1_ck │ │ │ └── dpll1_x2_ck │ │ │ └── dpll1_x2m2_ck │ │ │ └── mpu_ck │ │ │ ├── arm_fck │ │ │ └── emu_mpu_alwon_ck │ │ ├── dpll2_ck │ │ │ └── dpll2_m2_ck │ │ │ └── iva2_ck │ │ ├── dpll3_ck │ │ │ ├── dpll3_m2_ck │ │ │ │ ├── core_ck │ │ │ │ │ ├── dpll1_fck │ │ │ │ │ ├── dpll2_fck │ │ │ │ │ ├── l3_ick │ │ │ │ │ │ ├── core_l3_ick │ │ │ │ │ │ │ ├── gpmc_fck │ │ │ │ │ │ │ ├── hsotgusb_ick │ │ │ │ │ │ │ └── sdrc_ick │ │ │ │ │ │ ├── l4_ick │ │ │ │ │ │ │ ├── cam_ick │ │ │ │ │ │ │ ├── core_l4_ick │ │ │ │ │ │ │ │ ├── aes2_ick │ │ │ │ │ │ │ │ ├── des2_ick │ │ │ │ │ │ │ │ ├── gpt10_ick │ │ │ │ │ │ │ │ ├── gpt11_ick │ │ │ │ │ │ │ │ ├── hdq_ick │ │ │ │ │ │ │ │ ├── i2c1_ick │ │ │ │ │ │ │ │ ├── i2c2_ick │ │ │ │ │ │ │ │ ├── i2c3_ick │ │ │ │ │ │ │ │ ├── icr_ick │ │ │ │ │ │ │ │ ├── mailboxes_ick │ │ │ │ │ │ │ │ ├── mcbsp1_ick │ │ │ │ │ │ │ │ ├── mcbsp5_ick │ │ │ │ │ │ │ │ ├── mcspi1_ick │ │ │ │ │ │ │ │ ├── mcspi2_ick │ │ │ │ │ │ │ │ ├── mcspi3_ick │ │ │ │ │ │ │ │ ├── mcspi4_ick │ │ │ │ │ │ │ │ ├── mmchs1_ick │ │ │ │ │ │ │ │ ├── mmchs2_ick │ │ │ │ │ │ │ │ ├── mmchs3_ick │ │ │ │ │ │ │ │ ├── mspro_ick │ │ │ │ │ │ │ │ ├── omapctrl_ick │ │ │ │ │ │ │ │ ├── sha12_ick │ │ │ │ │ │ │ │ ├── uart1_ick │ │ │ │ │ │ │ │ ├── uart2_ick │ │ │ │ │ │ │ │ └── usbtll_ick │ │ │ │ │ │ │ ├── dss_ick │ │ │ │ │ │ │ ├── per_l4_ick │ │ │ │ │ │ │ │ ├── gpio2_ick │ │ │ │ │ │ │ │ ├── gpio3_ick │ │ │ │ │ │ │ │ ├── gpio4_ick │ │ │ │ │ │ │ │ ├── gpio5_ick │ │ │ │ │ │ │ │ ├── gpio6_ick │ │ │ │ │ │ │ │ ├── gpt2_ick │ │ │ │ │ │ │ │ ├── gpt3_ick │ │ │ │ │ │ │ │ ├── gpt4_ick │ │ │ │ │ │ │ │ ├── gpt5_ick │ │ │ │ │ │ │ │ ├── gpt6_ick │ │ │ │ │ │ │ │ ├── gpt7_ick │ │ │ │ │ │ │ │ ├── gpt8_ick │ │ │ │ │ │ │ │ ├── gpt9_ick │ │ │ │ │ │ │ │ ├── mcbsp2_ick │ │ │ │ │ │ │ │ ├── mcbsp3_ick │ │ │ │ │ │ │ │ ├── mcbsp4_ick │ │ │ │ │ │ │ │ ├── uart3_ick │ │ │ │ │ │ │ │ └── wdt3_ick │ │ │ │ │ │ │ ├── rm_ick │ │ │ │ │ │ │ ├── security_l4_ick2 │ │ │ │ │ │ │ │ ├── aes1_ick │ │ │ │ │ │ │ │ ├── des1_ick │ │ │ │ │ │ │ │ ├── rng_ick │ │ │ │ │ │ │ │ └── sha11_ick │ │ │ │ │ │ │ ├── sr_l4_ick │ │ │ │ │ │ │ ├── ssi_l4_ick │ │ │ │ │ │ │ │ └── ssi_ick │ │ │ │ │ │ │ └── usbhost_ick │ │ │ │ │ │ ├── mad2d_ick │ │ │ │ │ │ ├── sad2d_ick │ │ │ │ │ │ ├── security_l3_ick │ │ │ │ │ │ │ └── pka_ick │ │ │ │ │ │ └── sgx_ick │ │ │ │ │ └── sgx_fck │ │ │ │ └── dpll3_m2x2_ck │ │ │ │ └── corex2_fck │ │ │ │ └── ssi_ssr_fck │ │ │ │ └── ssi_sst_fck │ │ │ ├── dpll3_m3_ck │ │ │ │ └── dpll3_m3x2_ck │ │ │ │ └── emu_core_alwon_ck │ │ │ └── dpll3_x2_ck │ │ ├── dpll4_ck │ │ │ ├── dpll4_m2_ck │ │ │ │ └── dpll4_m2x2_ck │ │ │ │ └── omap_96m_alwon_fck │ │ │ │ ├── cm_96m_fck │ │ │ │ │ ├── omap_48m_fck │ │ │ │ │ │ ├── core_48m_fck │ │ │ │ │ │ │ ├── mcspi1_fck │ │ │ │ │ │ │ ├── mcspi2_fck │ │ │ │ │ │ │ ├── mcspi3_fck │ │ │ │ │ │ │ ├── mcspi4_fck │ │ │ │ │ │ │ ├── uart1_fck │ │ │ │ │ │ │ └── uart2_fck │ │ │ │ │ │ ├── omap_12m_fck │ │ │ │ │ │ │ └── core_12m_fck │ │ │ │ │ │ │ └── hdq_fck │ │ │ │ │ │ ├── per_48m_fck │ │ │ │ │ │ │ └── uart3_fck │ │ │ │ │ │ └── usbhost_48m_fck │ │ │ │ │ └── omap_96m_fck │ │ │ │ │ ├── core_96m_fck │ │ │ │ │ │ ├── csi2_96m_fck │ │ │ │ │ │ ├── i2c1_fck │ │ │ │ │ │ ├── i2c2_fck │ │ │ │ │ │ ├── i2c3_fck │ │ │ │ │ │ ├── mcbsp1_fck │ │ │ │ │ │ ├── mcbsp5_fck │ │ │ │ │ │ ├── mmchs1_fck │ │ │ │ │ │ ├── mmchs2_fck │ │ │ │ │ │ ├── mmchs3_fck │ │ │ │ │ │ └── mspro_fck │ │ │ │ │ └── dss_96m_fck │ │ │ │ └── per_96m_fck │ │ │ │ ├── mcbsp2_fck │ │ │ │ ├── mcbsp3_fck │ │ │ │ └── mcbsp4_fck │ │ │ ├── dpll4_m3_ck │ │ │ │ └── dpll4_m3x2_ck │ │ │ │ └── omap_54m_fck │ │ │ │ ├── clkout2_src_ck │ │ │ │ │ └── sys_clkout2 │ │ │ │ └── dss_tv_fck │ │ │ ├── dpll4_m4_ck │ │ │ │ └── dpll4_m4x2_ck │ │ │ │ └── dss1_alwon_fck │ │ │ ├── dpll4_m5_ck │ │ │ │ └── dpll4_m5x2_ck │ │ │ │ └── cam_mclk │ │ │ ├── dpll4_m6_ck │ │ │ │ └── dpll4_m6x2_ck │ │ │ │ └── emu_per_alwon_ck │ │ │ └── dpll4_x2_ck │ │ ├── dpll5_ck │ │ │ └── dpll5_m2_ck │ │ │ ├── usbhost_120m_fck │ │ │ └── usbtll_fck │ │ ├── dss2_alwon_fck │ │ ├── emu_src_ck │ │ │ ├── atclk_fck │ │ │ ├── pclk_fck │ │ │ └── pclkx2_fck │ │ ├── gpt2_fck │ │ ├── gpt3_fck │ │ ├── gpt4_fck │ │ ├── gpt5_fck │ │ ├── gpt6_fck │ │ ├── gpt7_fck │ │ ├── gpt8_fck │ │ ├── gpt9_fck │ │ ├── modem_fck │ │ ├── sr1_fck │ │ ├── sr2_fck │ │ ├── traceclk_src_fck │ │ │ └── traceclk_fck │ │ ├── usim_fck │ │ └── wkup_l4_ick │ │ ├── gpio1_ick │ │ ├── gpt12_ick │ │ ├── gpt1_ick │ │ ├── omap_32ksync_ick │ │ ├── usim_ick │ │ ├── wdt1_ick │ │ └── wdt2_ick │ └── sys_clkout1 └── virt_38_4m_ck
On 04/07/2011 10:57 AM, Yong Shen wrote:
Hi Daniel,
Thanks for the input. I have been trying hard to reproduce this bug, but failed. Is it a random bug or not?
No, it happens always.
If it is not too trouble, I would appreciate you can help debug, since so far it only happens on your board.
Sure. Amit has still the segfault with the powerdebug -d and I am suspecting there is a stack overflow and/or a memory corruption somewhere, that may explain why that happens on some hardware.
I am tempted to cleanup the clock code and check if it still happens. javascript:void(0);