On Thu, Dec 24, 2020 at 3:09 AM François Ozog francois.ozog@linaro.org wrote:
Hi,
As I am thinking about conformance testing for SystemReady and Trusted Substrate, I'd like to get your feedback on the following.
There are 7 values in the reg entry of interrupt-controller@210000 from the below DT. This corresponds to 3 valid {address,size} plus a single {address}.
dtc should reject this checking that the size of 'reg' is a multiple of #address-cells plus #size-cells. Note it also checks pretty much all common bindings using '#*-cells' style.
Furthermore, dt-schema checks for 3 entries assuming that's what the schema for "arm,gic-400" says.
The spec does not state anything on incomplete {address,size} pairs... I understand that #size-cell can be zero, indicating that the reg will contain only {address} "tuples" and not {address,size} tuples. But that should be for all reg tuples, not just one.
The simple-bus schema will reject #size-cell being anything other than 1 or 2.
In this case, I assume the driver will get what it wants, but from a certification perspective:
- I would reject this DT.
- I would document proper tuple forming in the spec (no incomplete pairs)
Last, I would also add some "notes" in the spec about where to get the "#*-cells" for the reg property of a device. If you think "hardware" it is obvious that the information must be retrieved from the immediate parent and "inheritance" does not make sense. But as I Googled the topic, I have seen a number of discussions and wrong patches around that. So I would add a non normative text (properly identified as such) to describe that in the spec.
Patches welcome. :)
Thank you for your help
Cheers
FF config-space@f0000000 { #address-cells = <0x01>; #size-cells = <0x01>; compatible = "simple-bus"; ranges = <0x00 0x00 0xf0000000 0x1000000>;
interrupt-controller@210000 { compatible = "arm,gic-400"; #interrupt-cells = <0x03>; #address-cells = <0x01>; #size-cells = <0x01>; ranges; interrupt-controller; interrupts = <0x01 0x09 0xf04>; reg = <0x210000 0x10000 0x220000 0x20000 0x240000 0 0x20000>; phandle = <0x01>; v2m@280000 { compatible = "arm,gic-v2m-frame"; msi-controller; reg = <0x280000 0x1000>; arm,msi-base-spi = <0xa0>; arm,msi-num-spis = <0x20>; phandle = <0x03>; };-- François-Frédéric Ozog | *Director Linaro Edge & Fog Computing Group* T: +33.67221.6485 francois.ozog@linaro.org | Skype: ffozog _______________________________________________ boot-architecture mailing list boot-architecture@lists.linaro.org https://lists.linaro.org/mailman/listinfo/boot-architecture