linaro-dev October 2011

linaro-dev@lists.linaro.org

107 participants
156 discussions

[RFC PATCH 07/11] ARM: cpu topology: Modify cpu_power according to cpufreq

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 75 +++++++++++++++++++++++++++++++++++++++----- 1 files changed, 67 insertions(+), 8 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 1196f2d..9f75967 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -20,6 +20,10 @@ #include <linux/sched.h> #include <linux/cpumask.h> +#ifdef CONFIG_CPU_FREQ +#include <linux/cpufreq.h> +#endif + #include <asm/cputype.h> #include <asm/topology.h> @@ -65,29 +69,35 @@ static DEFINE_PER_CPU(unsigned int, cpu_scale); struct cputopo_scale { int scale; + int freq; }; static struct cputopo_scale cpu_power[NR_CPUS]; -#define CPU_TOPO_MAX_SCALING 2 +#define CPU_MAX_SCALING 2 +#define CPU_MAX_FREQ 10 +/* we use a 200Mhz step for scaling cpu power */ +#define CPU_TOPO_FREQ_STEP 200000 #define ARM_CORTEX_A9_DEFAULT_SCALE 0 #define ARM_CORTEX_A9_POWER_SCALE 1 -/* This table sets the cpu_power scale of a cpu according to the sched_mc mode. - * The content of this table could be SoC specific so we should add a method to - * overwrite this default table. +/* This table sets the cpu_power scale of a cpu according to 2 inputs which are + * the frequency and the sched_mc mode. The content of this table could be SoC + * specific so we should add a method to overwrite this default table. * TODO: Study how to use DT for setting this table */ -static unsigned long table_cpu_power[CPU_TOPO_MAX_SCALING] = { - {1024}, /* default */ - {4096}, /* Power save mode CA9 MP */ +static unsigned long table_cpu_power[CPU_MAX_SCALING][CPU_MAX_FREQ] = { +/* 0 200 400 600 800 1000 1200 1400 1600 1800 */ + {1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, /* default */ + {4096, 4096, 4096, 1024, 1024, 1024, 1024, 1024, 1024, 1024}, /* Power save mode CA9 MP */ }; static void set_power_scale(unsigned int cpuid, unsigned int idx) { cpu_power[cpuid].scale = idx; - per_cpu(cpu_scale, cpuid) = table_cpu_power[cpu_power[cpuid].scale]; + per_cpu(cpu_scale, cpuid) = + table_cpu_power[idx][cpu_power[cpuid].freq]; smp_wmb(); } @@ -97,6 +107,54 @@ static int topo_cpuscale_init(void) return 0; } +#ifdef CONFIG_CPU_FREQ +static void set_cpufreq_scale(unsigned int cpuid, unsigned int idx) +{ + cpu_power[cpuid].freq = idx; + per_cpu(cpu_scale, cpuid) = + table_cpu_power[cpu_power[cpuid].scale][idx]; + smp_wmb(); +} + +static int topo_cpufreq_transition(struct notifier_block *nb, + unsigned long state, void *data) +{ + struct cpufreq_freqs *freqs = data; + + if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE) + set_cpufreq_scale(freqs->cpu, freqs->new / CPU_TOPO_FREQ_STEP); + + return NOTIFY_OK; +} + +static struct notifier_block topo_cpufreq_nb = { + .notifier_call = topo_cpufreq_transition, +}; + +static int topo_cpufreq_init(void) +{ + /* TODO set initial value according to current freq */ + + return cpufreq_register_notifier(&topo_cpufreq_nb, + CPUFREQ_TRANSITION_NOTIFIER); +} +#else +static inline int topo_cpufreq_init(void) {return 0; } +#endif + +static int init_cpu_power_scale(void) +{ + /* select cpu scale configuration */ + topo_cpuscale_init(); + + /* register cpufreq notifer */ + topo_cpufreq_init(); + + return 0; +} + +core_initcall(init_cpu_power_scale); + /* * Update the cpu power */ @@ -339,6 +397,7 @@ void init_cpu_topology(void) per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE; cpu_power[cpu].scale = ARM_CORTEX_A9_DEFAULT_SCALE; + cpu_power[cpu].freq = 0; } smp_wmb(); } -- 1.7.4.1

12 years, 10 months

[RFC PATCH 11/11] sched: nohz_idle_balance

by Vincent Guittot

clear rq->nohz_balance_kick before returning if idle equals CPU_IDLE, we return and could let nohz_balance_kick set rq->nohz_balance_kick is tested in nohz_balancer_kick before triggering a SOFTIRQ on the ilb. If this_rq->nohz_balance_kick stay to 1, the ilb will no be triggered until it wakes up and performs a normal load_balance which will clear the nohz_balance_kick Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- kernel/sched_fair.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c index 3961876..044ffcc 100644 --- a/kernel/sched_fair.c +++ b/kernel/sched_fair.c @@ -3985,8 +3985,10 @@ static void nohz_idle_balance(int this_cpu, enum cpu_idle_type idle) struct rq *rq; int balance_cpu; - if (idle != CPU_IDLE || !this_rq->nohz_balance_kick) + if (idle != CPU_IDLE || !this_rq->nohz_balance_kick) { + this_rq->nohz_balance_kick = 0; return; + } for_each_cpu(balance_cpu, nohz.idle_cpus_mask) { if (balance_cpu == this_cpu) -- 1.7.4.1

12 years, 10 months

[RFC PATCH 09/11] ARM: cpu topology: Add debugfs interface for cpu_power

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 115 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 115 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index c312937..aee6b44 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -24,6 +24,11 @@ #include <linux/cpufreq.h> #endif +#ifdef CONFIG_DEBUG_FS +#include <linux/debugfs.h> +#include <linux/uaccess.h> /* for copy_from_user */ +#endif + #include <asm/cputype.h> #include <asm/topology.h> @@ -412,3 +417,113 @@ void init_cpu_topology(void) } smp_wmb(); } + +/* + * debugfs interface for scaling cpu power + */ + +#ifdef CONFIG_DEBUG_FS +static struct dentry *topo_debugfs_root; + +static ssize_t dbg_write(struct file *file, const char __user *buf, + size_t size, loff_t *off) +{ + unsigned int *value = file->f_dentry->d_inode->i_private; + char cdata[128]; + unsigned long tmp; + unsigned int cpu, scale, freq; + + if (size < (sizeof(cdata)-1)) { + if (copy_from_user(cdata, buf, size)) + return -EFAULT; + cdata[size] = 0; + if (!strict_strtoul(cdata, 10, &tmp)) { + *value = tmp; + + for_each_online_cpu(cpu) { + scale = cpu_power[cpu].scale; + freq = cpu_power[cpu].freq; + + per_cpu(cpu_scale, cpu) = + table_cpu_power[scale][freq]; + smp_wmb(); + } + } + return size; + } + return -EINVAL; +} + +static ssize_t dbg_read(struct file *file, char __user *buf, + size_t size, loff_t *off) +{ + unsigned int *value = file->f_dentry->d_inode->i_private; + char cdata[128]; + unsigned int len; + + len = sprintf(cdata, "%u\n", *value); + return simple_read_from_buffer(buf, size, off, cdata, len); +} + +static const struct file_operations debugfs_fops = { + .read = dbg_read, + .write = dbg_write, +}; + +static struct dentry *topo_debugfs_register(unsigned int cpu, + struct dentry *parent) +{ + struct dentry *cpu_d, *d; + char cpu_name[16]; + + sprintf(cpu_name, "cpu%u", cpu); + + cpu_d = debugfs_create_dir(cpu_name, parent); + if (!cpu_d) + return NULL; + + d = debugfs_create_file("cpu_power", S_IRUGO | S_IWUGO, + cpu_d, &per_cpu(cpu_scale, cpu), &debugfs_fops); + if (!d) + goto err_out; + + d = debugfs_create_file("scale", S_IRUGO | S_IWUGO, + cpu_d, &cpu_power[cpu].scale, &debugfs_fops); + if (!d) + goto err_out; + d = debugfs_create_file("freq", S_IRUGO, + cpu_d, &cpu_power[cpu].freq, &debugfs_fops); + if (!d) + goto err_out; + + return cpu_d; + +err_out: + debugfs_remove_recursive(cpu_d); + return NULL; +} + +static int __init topo_debugfs_init(void) +{ + struct dentry *d; + unsigned int cpu; + + d = debugfs_create_dir("cpu_topo", NULL); + if (!d) + return -ENOMEM; + topo_debugfs_root = d; + + for_each_possible_cpu(cpu) { + d = topo_debugfs_register(cpu, topo_debugfs_root); + if (d == NULL) + goto err_out; + } + return 0; + +err_out: + debugfs_remove_recursive(topo_debugfs_root); + return -ENOMEM; +} + +late_initcall(topo_debugfs_init); +#endif -- 1.7.4.1

12 years, 10 months

[RFC PATCH 08/11] ARM: cpu topology: Add asym topology flag for using cpu0 1st

by Vincent Guittot

Modify the CPU sched_domain flags in powersave mode for using the cpu0 in ched_mc powersave mode Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/include/asm/topology.h | 33 +++++++++++++++++++++++++++++++++ arch/arm/kernel/topology.c | 11 +++++++++++ 2 files changed, 44 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h index 58b8b84..f7f02e3 100644 --- a/arch/arm/include/asm/topology.h +++ b/arch/arm/include/asm/topology.h @@ -34,6 +34,39 @@ static inline void store_cpu_topology(unsigned int cpuid) { } #endif +/* Common values for CPUs */ +#ifndef SD_CPU_INIT +#define SD_CPU_INIT (struct sched_domain) { \ + .min_interval = 1, \ + .max_interval = 4, \ + .busy_factor = 64, \ + .imbalance_pct = 125, \ + .cache_nice_tries = 1, \ + .busy_idx = 2, \ + .idle_idx = 1, \ + .newidle_idx = 0, \ + .wake_idx = 0, \ + .forkexec_idx = 0, \ + \ + .flags = 1*SD_LOAD_BALANCE \ + | 1*SD_BALANCE_NEWIDLE \ + | 1*SD_BALANCE_EXEC \ + | 1*SD_BALANCE_FORK \ + | 0*SD_BALANCE_WAKE \ + | 1*SD_WAKE_AFFINE \ + | 0*SD_PREFER_LOCAL \ + | 0*SD_SHARE_CPUPOWER \ + | 0*SD_SHARE_PKG_RESOURCES \ + | 0*SD_SERIALIZE \ + | arch_sd_sibling_asym_packing() \ + | sd_balance_for_package_power() \ + | sd_power_saving_flags() \ + , \ + .last_balance = jiffies, \ + .balance_interval = 1, \ +} +#endif + #include <asm-generic/topology.h> #endif /* _ASM_ARM_TOPOLOGY_H */ diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 9f75967..c312937 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -165,6 +165,17 @@ unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) } /* + * sched_domain flag configuration + */ +/* TODO add a config flag for this function */ +int arch_sd_sibling_asym_packing(void) +{ + if (sched_smt_power_savings || sched_mc_power_savings) + return SD_ASYM_PACKING; + return 0; +} + +/* * default topology function */ -- 1.7.4.1

12 years, 10 months

[RFC PATCH 06/11] ARM: cpu topology: Modify cpu_power according to sched_mc level

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 48 +++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 47 insertions(+), 1 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 974177d..1196f2d 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -62,6 +62,41 @@ static void (*set_cpu_topology_mask)(void) = default_cpu_topology_mask; */ static DEFINE_PER_CPU(unsigned int, cpu_scale); + +struct cputopo_scale { + int scale; +}; + +static struct cputopo_scale cpu_power[NR_CPUS]; + +#define CPU_TOPO_MAX_SCALING 2 + +#define ARM_CORTEX_A9_DEFAULT_SCALE 0 +#define ARM_CORTEX_A9_POWER_SCALE 1 + +/* This table sets the cpu_power scale of a cpu according to the sched_mc mode. + * The content of this table could be SoC specific so we should add a method to + * overwrite this default table. + * TODO: Study how to use DT for setting this table + */ +static unsigned long table_cpu_power[CPU_TOPO_MAX_SCALING] = { + {1024}, /* default */ + {4096}, /* Power save mode CA9 MP */ +}; + +static void set_power_scale(unsigned int cpuid, unsigned int idx) +{ + cpu_power[cpuid].scale = idx; + per_cpu(cpu_scale, cpuid) = table_cpu_power[cpu_power[cpuid].scale]; + smp_wmb(); +} + +static int topo_cpuscale_init(void) +{ + /* Nothing to do right now */ + return 0; +} + /* * Update the cpu power */ @@ -123,6 +158,8 @@ static void default_cpu_topology_mask(void) } } } + + set_power_scale(cpuid, ARM_CORTEX_A9_DEFAULT_SCALE); } smp_wmb(); } @@ -133,8 +170,12 @@ static void default_cpu_topology_mask(void) */ static void power_cpu_topology_mask_CA9(void) { + unsigned int cpuid, cpu, idx; - unsigned int cpuid, cpu; + if (num_possible_cpus() > 2) + idx = ARM_CORTEX_A9_DEFAULT_SCALE; + else + idx = ARM_CORTEX_A9_POWER_SCALE; for_each_possible_cpu(cpuid) { struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; @@ -158,6 +199,8 @@ static void power_cpu_topology_mask_CA9(void) } } } + + set_power_scale(cpuid, idx); } smp_wmb(); } @@ -194,6 +237,7 @@ static int update_cpu_topology_policy(void) return 0; } + /* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, @@ -293,6 +337,8 @@ void init_cpu_topology(void) cpumask_clear(&cpu_topo->thread_sibling); per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE; + + cpu_power[cpu].scale = ARM_CORTEX_A9_DEFAULT_SCALE; } smp_wmb(); } -- 1.7.4.1

12 years, 10 months

[RFC PATCH 05/11] ARM: scheduler: add a cpu_power function

by Vincent Guittot

Add an architecture specific function for setting cpu_power Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index faf66f3..974177d 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -52,6 +52,26 @@ static void default_cpu_topology_mask(void); static void (*set_cpu_topology_mask)(void) = default_cpu_topology_mask; /* + * cpu power scale management + */ + +/* + * a per cpu data structure should be better because each cpu is mainly + * using its own cpu_power even it's not always true because of + * no_hz_idle_balance + */ +static DEFINE_PER_CPU(unsigned int, cpu_scale); + +/* + * Update the cpu power + */ + +unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) +{ + return per_cpu(cpu_scale, cpu); +} + +/* * default topology function */ @@ -271,6 +291,8 @@ void init_cpu_topology(void) cpu_topo->socket_id = -1; cpumask_clear(&cpu_topo->core_sibling); cpumask_clear(&cpu_topo->thread_sibling); + + per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE; } smp_wmb(); } -- 1.7.4.1

12 years, 10 months

[RFC PATCH 04/11] ARM: cpu topology: Enable ARCH_POWER

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- kernel/sched_features.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/kernel/sched_features.h b/kernel/sched_features.h index 2e74677..85f8bd9 100644 --- a/kernel/sched_features.h +++ b/kernel/sched_features.h @@ -47,7 +47,7 @@ SCHED_FEAT(CACHE_HOT_BUDDY, 1) /* * Use arch dependent cpu power functions */ -SCHED_FEAT(ARCH_POWER, 0) +SCHED_FEAT(ARCH_POWER, 1) SCHED_FEAT(HRTICK, 0) SCHED_FEAT(DOUBLE_TICK, 0) -- 1.7.4.1

12 years, 10 months

[RFC PATCH 03/11] ARM: cpu topology: Add dedicated quadcore CA-9 topology for powersaving mode

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 31 +++++++++++++++++++++++++------ 1 files changed, 25 insertions(+), 6 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 34512fe..faf66f3 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -18,6 +18,7 @@ #include <linux/node.h> #include <linux/nodemask.h> #include <linux/sched.h> +#include <linux/cpumask.h> #include <asm/cputype.h> #include <asm/topology.h> @@ -107,18 +108,36 @@ static void default_cpu_topology_mask(void) } /* - * For Cortex-A9 MPcore dual core, we emulate a multi-package single core - * topology in power mode. + * For Cortex-A9 MPcore, we emulate a multi-package topology in power mode. + * The goal is to gathers tasks on 1 virtual package */ static void power_cpu_topology_mask_CA9(void) { - unsigned int cpuid; + + unsigned int cpuid, cpu; + for_each_possible_cpu(cpuid) { - struct cputopo_arm *cpuid_topo = &(cpu_topology[cpuid]); + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; - cpumask_set_cpu(cpuid, &cpuid_topo->core_sibling); - cpumask_set_cpu(cpuid, &cpuid_topo->thread_sibling); + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + if ((cpuid_topo->socket_id == cpu_topo->socket_id) + && ((cpuid & 0x1) == (cpu & 0x1))) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } } smp_wmb(); } -- 1.7.4.1

12 years, 10 months

[RFC PATCH 02/11] ARM: cpu topology: modify cpu topology

by Vincent Guittot

Modify the CPU topology policy according to the sched_mc level and the cortex family Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 104 +++++++++++++++++++++++++++++++++++-------- 1 files changed, 84 insertions(+), 20 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index d89c66c..34512fe 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -44,6 +44,13 @@ struct cputopo_arm cpu_topology[NR_CPUS]; /* + * cpu topology mask management + */ + +static void default_cpu_topology_mask(void); +static void (*set_cpu_topology_mask)(void) = default_cpu_topology_mask; + +/* * default topology function */ @@ -66,26 +73,33 @@ static void clear_cpu_topology_mask(void) smp_wmb(); } -static void default_cpu_topology_mask(unsigned int cpuid) +/* + * default_cpu_topology_mask set the core and thread mask as described in the + * ARM ARM + */ +static void default_cpu_topology_mask(void) { - struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; - unsigned int cpu; + unsigned int cpuid, cpu; - for_each_possible_cpu(cpu) { - struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + for_each_possible_cpu(cpuid) { + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; - if (cpuid_topo->socket_id == cpu_topo->socket_id) { - cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, - &cpuid_topo->core_sibling); + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; - if (cpuid_topo->core_id == cpu_topo->core_id) { - cpumask_set_cpu(cpuid, - &cpu_topo->thread_sibling); + if (cpuid_topo->socket_id == cpu_topo->socket_id) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); if (cpu != cpuid) cpumask_set_cpu(cpu, - &cpuid_topo->thread_sibling); + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } } } } @@ -93,6 +107,55 @@ static void default_cpu_topology_mask(unsigned int cpuid) } /* + * For Cortex-A9 MPcore dual core, we emulate a multi-package single core + * topology in power mode. + */ +static void power_cpu_topology_mask_CA9(void) +{ + unsigned int cpuid; + for_each_possible_cpu(cpuid) { + struct cputopo_arm *cpuid_topo = &(cpu_topology[cpuid]); + + cpumask_set_cpu(cpuid, &cpuid_topo->core_sibling); + cpumask_set_cpu(cpuid, &cpuid_topo->thread_sibling); + + } + smp_wmb(); +} + +#define ARM_FAMILY_MASK 0xFF0FFFF0 +#define ARM_CORTEX_A9_FAMILY 0x410FC090 + +/* update_cpu_topology_policy select a cpu topology policy according to the + * available cores. + * TODO: The current version assumes that all cores are exactly the same which + * might not be true. We need to update it to take into account various + * configuration among which system with different kind of core. + */ +static int update_cpu_topology_policy(void) +{ + unsigned long cpuid; + + if (sched_mc_power_savings == POWERSAVINGS_BALANCE_NONE) { + set_cpu_topology_mask = default_cpu_topology_mask; + return 0; + } + + cpuid = read_cpuid_id(); + cpuid &= ARM_FAMILY_MASK; + + switch (cpuid) { + case ARM_CORTEX_A9_FAMILY: + set_cpu_topology_mask = power_cpu_topology_mask_CA9; + break; + default: + set_cpu_topology_mask = default_cpu_topology_mask; + break; + } + + return 0; +} +/* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, * which prevents simultaneous write access to cpu_topology array @@ -159,14 +222,15 @@ void store_cpu_topology(unsigned int cpuid) */ int arch_update_cpu_topology(void) { - unsigned int cpuid; - /* clear core mask */ + + /* clear core threads mask */ clear_cpu_topology_mask(); - /* update core and thread sibling masks */ - for_each_possible_cpu(cpuid) { - default_cpu_topology_mask(cpuid); - } + /* set topology policy */ + update_cpu_topology_policy(); + + /* set topology mask and power */ + (*set_cpu_topology_mask)(); return 1; } -- 1.7.4.1

12 years, 10 months

[RFC PATCH 01/11] ARM: cpu topology: Add update_cpu_topology function

by Vincent Guittot

arch_update_cpu_topology function is called by the scheduler before building its sched_domain hierarchy. Move the update of the cpu topology masks in this function instead of defining it in the the store_cpu_topology which is executed only once per cpu. Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 87 +++++++++++++++++++++++++++++++++----------- 1 files changed, 66 insertions(+), 21 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 8200dea..d89c66c 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -43,12 +43,56 @@ struct cputopo_arm cpu_topology[NR_CPUS]; +/* + * default topology function + */ + const struct cpumask *cpu_coregroup_mask(int cpu) { return &cpu_topology[cpu].core_sibling; } /* + * clear cpu topology masks + */ +static void clear_cpu_topology_mask(void) +{ + unsigned int cpuid; + for_each_possible_cpu(cpuid) { + struct cputopo_arm *cpuid_topo = &(cpu_topology[cpuid]); + cpumask_clear(&cpuid_topo->core_sibling); + cpumask_clear(&cpuid_topo->thread_sibling); + } + smp_wmb(); +} + +static void default_cpu_topology_mask(unsigned int cpuid) +{ + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; + unsigned int cpu; + + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + + if (cpuid_topo->socket_id == cpu_topo->socket_id) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } + smp_wmb(); +} + +/* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, * which prevents simultaneous write access to cpu_topology array @@ -57,7 +101,6 @@ void store_cpu_topology(unsigned int cpuid) { struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; unsigned int mpidr; - unsigned int cpu; /* If the cpu topology has been already set, just return */ if (cpuid_topo->core_id != -1) @@ -99,26 +142,10 @@ void store_cpu_topology(unsigned int cpuid) cpuid_topo->socket_id = -1; } - /* update core and thread sibling masks */ - for_each_possible_cpu(cpu) { - struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; - - if (cpuid_topo->socket_id == cpu_topo->socket_id) { - cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, - &cpuid_topo->core_sibling); - - if (cpuid_topo->core_id == cpu_topo->core_id) { - cpumask_set_cpu(cpuid, - &cpu_topo->thread_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, - &cpuid_topo->thread_sibling); - } - } - } - smp_wmb(); + /* + * The core and thread sibling masks will be set during the call of + * arch_update_cpu_topology + */ printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", cpuid, cpu_topology[cpuid].thread_id, @@ -127,6 +154,24 @@ void store_cpu_topology(unsigned int cpuid) } /* + * arch_update_cpu_topology is called by the scheduler before building + * a new sched_domain hierarchy. + */ +int arch_update_cpu_topology(void) +{ + unsigned int cpuid; + /* clear core mask */ + clear_cpu_topology_mask(); + + /* update core and thread sibling masks */ + for_each_possible_cpu(cpuid) { + default_cpu_topology_mask(cpuid); + } + + return 1; +} + +/* * init_cpu_topology is called at boot when only one cpu is running * which prevent simultaneous write access to cpu_topology array */ -- 1.7.4.1

12 years, 10 months

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linaro-dev October 2011