This series adds minimal device tree support for
OMAP-serial driver, and is based on top of the latest
runtime-PM changes from Govind[1] posted here[2].
The series passes minimal data that allows serial console
boot, with UART's initialised from device tree.
However some of low power support for UART and remote
wakeup needs more work.
Boot tested on OMAP4 panda and OMAP4 sdp boards.
[1] git://gitorious.org/runtime_3-0/runtime_3-0.git 3.2-rc1_uart_runtime
[2] http://www.mail-archive.com/linux-omap@vger.kernel.org/msg58486.html
Rajendra Nayak (3):
ARM: omap_device: handle first time activation of console device
omap-serial: Add minimal device tree support
ARM: omap: pass minimal SoC/board data for UART from dt
.../devicetree/bindings/arm/omap/omap.txt | 1 +
.../devicetree/bindings/serial/omap_serial.txt | 8 ++++
arch/arm/boot/dts/omap3-beagle.dts | 17 +++++++++
arch/arm/boot/dts/omap3.dtsi | 27 ++++++++++++++
arch/arm/boot/dts/omap4-panda.dts | 17 +++++++++
arch/arm/boot/dts/omap4-sdp.dts | 17 +++++++++
arch/arm/boot/dts/omap4.dtsi | 24 +++++++++++++
arch/arm/mach-omap2/board-generic.c | 1 -
arch/arm/plat-omap/omap_device.c | 33 +++++++++++++++++-
drivers/tty/serial/omap-serial.c | 37 +++++++++++++++++++-
10 files changed, 179 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/serial/omap_serial.txt
A hwmod with a 'HWMOD_INIT_NO_IDLE' flag set, is left in
enabled state by the hwmod framework post the initial setup.
Once a real user of the device (a driver) tries to enable it
at a later point, the hmwod framework throws a WARN() about
the device being already in enabled state.
Fix this by introducing a new state '_HWMOD_STATE_ENABLED_AT_INIT'
to identify such devices/hwmods, so nothing but just a state
change to '_HWMOD_STATE_ENABLED' can be done when the device/hwmod
is requested to be enabled (the first time) by its driver/user.
A good example of a such a device is an UART used as debug console.
The UART module needs to be kept enabled through the boot, until the
UART driver takes control of it, for debug prints to appear on
the console.
Signed-off-by: Rajendra Nayak <rnayak(a)ti.com>
---
arch/arm/mach-omap2/omap_hwmod.c | 16 ++++++++++++++--
arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 +
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index d7f4623..7d94cc3 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1441,6 +1441,17 @@ static int _enable(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: enabling\n", oh->name);
+ /*
+ * hwmods' with HWMOD_INIT_NO_IDLE flag set, are left
+ * in enabled state at init.
+ * Now that someone is really trying to enable them,
+ * just update the state.
+ */
+ if (oh->_state == _HWMOD_STATE_ENABLED_AT_INIT) {
+ oh->_state = _HWMOD_STATE_ENABLED;
+ return 0;
+ }
+
if (oh->_state != _HWMOD_STATE_INITIALIZED &&
oh->_state != _HWMOD_STATE_IDLE &&
oh->_state != _HWMOD_STATE_DISABLED) {
@@ -1449,7 +1460,6 @@ static int _enable(struct omap_hwmod *oh)
return -EINVAL;
}
-
/*
* If an IP contains only one HW reset line, then de-assert it in order
* to allow the module state transition. Otherwise the PRCM will return
@@ -1744,8 +1754,10 @@ static int _setup(struct omap_hwmod *oh, void *data)
* it should be set by the core code as a runtime flag during startup
*/
if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
- (postsetup_state == _HWMOD_STATE_IDLE))
+ (postsetup_state == _HWMOD_STATE_IDLE)) {
+ oh->_state = _HWMOD_STATE_ENABLED_AT_INIT;
postsetup_state = _HWMOD_STATE_ENABLED;
+ }
if (postsetup_state == _HWMOD_STATE_IDLE)
_idle(oh);
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 1b81dfb..cd49d60 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -436,6 +436,7 @@ struct omap_hwmod_omap4_prcm {
#define _HWMOD_STATE_ENABLED 4
#define _HWMOD_STATE_IDLE 5
#define _HWMOD_STATE_DISABLED 6
+#define _HWMOD_STATE_ENABLED_AT_INIT 7
/**
* struct omap_hwmod_class - the type of an IP block
--
1.7.1
Fix some minor typos in the pinctrl documentation.
Signed-off-by: Rajendra Nayak <rnayak(a)ti.com>
---
Documentation/pinctrl.txt | 16 ++++++++--------
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
index b04cb7d..c849a09 100644
--- a/Documentation/pinctrl.txt
+++ b/Documentation/pinctrl.txt
@@ -91,7 +91,7 @@ int __init foo_probe(void)
Pins usually have fancier names than this. You can find these in the dataheet
for your chip. Notice that the core pinctrl.h file provides a fancy macro
called PINCTRL_PIN() to create the struct entries. As you can see I enumerated
-the pins from 0 in the upper left corner to 63 in the lower right corner,
+the pins from 0 in the lower left corner to 63 in the upper right corner,
this enumeration was arbitrarily chosen, in practice you need to think
through your numbering system so that it matches the layout of registers
and such things in your driver, or the code may become complicated. You must
@@ -218,7 +218,7 @@ static struct pinctrl_gpio_range gpio_range_a = {
.gc = &chip_a;
};
-static struct pinctrl_gpio_range gpio_range_a = {
+static struct pinctrl_gpio_range gpio_range_b = {
.name = "chip b",
.id = 0,
.base = 48,
@@ -762,42 +762,42 @@ case), we define a mapping like this:
.name "2bit"
.ctrl_dev_name = "pinctrl.0",
.function = "mmc0",
- .group = "mmc0_0_grp",
+ .group = "mmc0_1_grp",
.dev_name = "foo-mmc.0",
},
{
.name "4bit"
.ctrl_dev_name = "pinctrl.0",
.function = "mmc0",
- .group = "mmc0_0_grp",
+ .group = "mmc0_1_grp",
.dev_name = "foo-mmc.0",
},
{
.name "4bit"
.ctrl_dev_name = "pinctrl.0",
.function = "mmc0",
- .group = "mmc0_1_grp",
+ .group = "mmc0_2_grp",
.dev_name = "foo-mmc.0",
},
{
.name "8bit"
.ctrl_dev_name = "pinctrl.0",
.function = "mmc0",
- .group = "mmc0_0_grp",
+ .group = "mmc0_1_grp",
.dev_name = "foo-mmc.0",
},
{
.name "8bit"
.ctrl_dev_name = "pinctrl.0",
.function = "mmc0",
- .group = "mmc0_1_grp",
+ .group = "mmc0_2_grp",
.dev_name = "foo-mmc.0",
},
{
.name "8bit"
.ctrl_dev_name = "pinctrl.0",
.function = "mmc0",
- .group = "mmc0_2_grp",
+ .group = "mmc0_3_grp",
.dev_name = "foo-mmc.0",
},
...
--
1.7.1
Fix u300_pmx_endisable() to iterate over the list of 'bits' and
'mask' populated as part of u300_pmx_functions.mask[]
Signed-off-by: Rajendra Nayak <rnayak(a)ti.com>
---
Linus W,
I am not sure if this is a right fix. I just stumbled
upon this while looking at the u300 pinmux driver
while I was writing one for OMAP. Maybe I am reading
the code completely wrong, and I don't even have a
way to test this, so its just compile tested with
u300_defconfig.
drivers/pinctrl/pinmux-u300.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinmux-u300.c b/drivers/pinctrl/pinmux-u300.c
index 4858a64..145a84d 100644
--- a/drivers/pinctrl/pinmux-u300.c
+++ b/drivers/pinctrl/pinmux-u300.c
@@ -940,20 +940,23 @@ static void u300_pmx_endisable(struct u300_pmx *upmx, unsigned selector,
{
u16 regval, val, mask;
int i;
+ const struct u300_pmx_mask *upmx_mask;
+ upmx_mask = u300_pmx_functions[selector].mask;
for (i = 0; i < ARRAY_SIZE(u300_pmx_registers); i++) {
if (enable)
- val = u300_pmx_functions[selector].mask->bits;
+ val = upmx_mask->bits;
else
val = 0;
- mask = u300_pmx_functions[selector].mask->mask;
+ mask = upmx_mask->mask;
if (mask != 0) {
regval = readw(upmx->virtbase + u300_pmx_registers[i]);
regval &= ~mask;
regval |= val;
writew(regval, upmx->virtbase + u300_pmx_registers[i]);
}
+ upmx_mask++;
}
}
--
1.7.1
As part of an effort to streamline deployment of LAVA, and allow for a more
continuous testing and deployment process, the Linaro Validation Team has
been working on a tool to assist with deployment of LAVA components. The
intent is to create something that is suitable for production deployments
as well as development/evaluation environments, and even allow for separate
instances running on the same machine.
Not everything is implemented just yet, but we're interested in putting
this out there for wider testing and feedback. Because this is a very new
tool, and needs to do things like add configuration to apache and add
databases to your system, we highly recommend using a VM or cloud instance
to test this.
To get started you'll need to get the source from bzr and start by checking
out the readme:
bzr branch lp:lava-deployment-tool
Special thanks to Zygmunt Krynicki for getting this started, and Michael
Hudson-Doyle for being an early guinea pig.
Thanks,
Paul Larson
Status report in more detail
https://wiki.linaro.org/WorkingGroups/Middleware/Graphics/WeeklyReport
Wk45 weekly meeting minutes:
https://wiki.linaro.org/WorkingGroups/Middleware/Graphics/Notes/2011-11-09
= Highlights =
* Unity/NUX/compiz: we expect to get nux updated packages and possibly
also compiz. FYI code merges for upstream should be
ready for the alpha1 milestone of 12.04, note that this is on December 1st.
* For compiz: the code has been reviewed upstream and testing is
pending on the DX side. For reference here are the branches set by the
maintainer lp:~compiz-team/compiz-core/compiz-core.gles2 and
lp:~compiz-team/compiz-core/compiz-core.crack
* glmark2 is ready for 11.11 release
* glcompbench, glproxy, libmatrix, glew: no changes since 11.10 release
* Memory management: No new versions of CMA or dma-mapping patches for
some time, progress for v4l2 as a dma-buf user. Also work has progressed
on getting an amendment to xorg to support dri2video - the work
includes, in addition to patches for the core protocol support in xorg
server, support for xf86-video-nouveau driver implemented as reference.
Best regards,
--
Ilias Biris ilias.biris(a)linaro.org
Project Manager, Linaro
M: +358504839608, IRC: ibiris Skype: ilias_biris
Linaro.org│ Open source software for ARM SoCs
Hi,
I am currently working on Pandaboard and want to make PMU interrupt work. I notice that you have a patch to enable pmu/perf support on OMAP4:
http://lists.linaro.org/pipermail/linaro-dev/2011-April/004019.html
Can you please tell me on which code base of the kernel the patch is working?
I am using minimal FS on pandaboard. But the patch does not work. I find the PMU interrupt is not triggered.
Thanks a lot in advance.
Ye Fan
We're going to upgrade the hackbox on Friday, which means a reboot.
As we've always mentioned the hackbox doesn't get backed up, so
everything in /mnt/user will be nuked.
Please back anything you care about up.
Danilo,
If we can get a list of files together, would you be able to set up a
backup restore mechanism for those files?
The only file on the list right now would be
/home/ubuntu/.ssh/authorized_keys
--
Zach Pfeffer
Android Platform Team Lead, Linaro Platform Teams
Linaro.org | Open source software for ARM SoCs
Follow Linaro: http://www.facebook.com/pages/Linarohttp://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog
Just following the release of the linux-linaro-3.1-20011.11-0 tag being
made, I've updated the Linaro+Android tree.
I've tagged it as: linux-linaro-3.1-2011.11-0-android-1
>From the branch:
git://android.git.linaro.org/kernel/linaro-android.git linaro-android-3.1-agreen-rebase
thanks
-john