linaro-dev November 2011

linaro-dev@lists.linaro.org

122 participants
130 discussions

[RFC PATCH v2 08/09] ARM: cpu topology: Add debugfs interface for cpu_power

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 113 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 113 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 945b980..053ce9c 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -25,6 +25,11 @@ #include <linux/cpufreq.h> #endif +#ifdef CONFIG_DEBUG_FS +#include <linux/debugfs.h> +#include <linux/uaccess.h> /* for copy_from_user */ +#endif + #include <asm/cputype.h> #include <asm/topology.h> @@ -474,3 +479,111 @@ void init_cpu_topology(void) } smp_wmb(); } + +/* + * debugfs interface for scaling cpu power + */ + +#ifdef CONFIG_DEBUG_FS +static struct dentry *topo_debugfs_root; + +static ssize_t dbg_write(struct file *file, const char __user *buf, + size_t size, loff_t *off) +{ + unsigned int *value = file->f_dentry->d_inode->i_private; + char cdata[128]; + unsigned long tmp; + unsigned int cpu; + + if (size < (sizeof(cdata)-1)) { + if (copy_from_user(cdata, buf, size)) + return -EFAULT; + cdata[size] = 0; + if (!strict_strtoul(cdata, 10, &tmp)) { + *value = tmp; + +#ifdef CONFIG_CPU_FREQ + for_each_online_cpu(cpu) + set_power_scale(cpu, cpu_power[cpu].id); +#endif + } + return size; + } + return -EINVAL; +} + +static ssize_t dbg_read(struct file *file, char __user *buf, + size_t size, loff_t *off) +{ + unsigned int *value = file->f_dentry->d_inode->i_private; + char cdata[128]; + unsigned int len; + + len = sprintf(cdata, "%u\n", *value); + return simple_read_from_buffer(buf, size, off, cdata, len); +} + +static const struct file_operations debugfs_fops = { + .read = dbg_read, + .write = dbg_write, +}; + +static struct dentry *topo_debugfs_register(unsigned int cpu, + struct dentry *parent) +{ + struct dentry *cpu_d, *d; + char cpu_name[16]; + + sprintf(cpu_name, "cpu%u", cpu); + + cpu_d = debugfs_create_dir(cpu_name, parent); + if (!cpu_d) + return NULL; + + d = debugfs_create_file("cpu_power", S_IRUGO | S_IWUGO, + cpu_d, &per_cpu(cpu_scale, cpu), &debugfs_fops); + if (!d) + goto err_out; + +#ifdef CONFIG_CPU_FREQ + d = debugfs_create_file("scale", S_IRUGO | S_IWUGO, + cpu_d, &cpu_power[cpu].id, &debugfs_fops); + if (!d) + goto err_out; + + d = debugfs_create_file("freq", S_IRUGO, + cpu_d, &cpu_power[cpu].freq, &debugfs_fops); + if (!d) + goto err_out; +#endif + return cpu_d; + +err_out: + debugfs_remove_recursive(cpu_d); + return NULL; +} + +static int __init topo_debugfs_init(void) +{ + struct dentry *d; + unsigned int cpu; + + d = debugfs_create_dir("cpu_topo", NULL); + if (!d) + return -ENOMEM; + topo_debugfs_root = d; + + for_each_possible_cpu(cpu) { + d = topo_debugfs_register(cpu, topo_debugfs_root); + if (d == NULL) + goto err_out; + } + return 0; + +err_out: + debugfs_remove_recursive(topo_debugfs_root); + return -ENOMEM; +} + +late_initcall(topo_debugfs_init); +#endif -- 1.7.4.1

12 years, 6 months

[RFC PATCH v2 07/09] ARM: cpu topology: Add asym topology flag for using cpu0 1st

by Vincent Guittot

Modify the CPU sched_domain flags in powersave mode for using the cpu0 in ched_mc powersave mode Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/include/asm/topology.h | 33 +++++++++++++++++++++++++++++++++ arch/arm/kernel/topology.c | 11 +++++++++++ 2 files changed, 44 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h index 58b8b84..f7f02e3 100644 --- a/arch/arm/include/asm/topology.h +++ b/arch/arm/include/asm/topology.h @@ -34,6 +34,39 @@ static inline void store_cpu_topology(unsigned int cpuid) { } #endif +/* Common values for CPUs */ +#ifndef SD_CPU_INIT +#define SD_CPU_INIT (struct sched_domain) { \ + .min_interval = 1, \ + .max_interval = 4, \ + .busy_factor = 64, \ + .imbalance_pct = 125, \ + .cache_nice_tries = 1, \ + .busy_idx = 2, \ + .idle_idx = 1, \ + .newidle_idx = 0, \ + .wake_idx = 0, \ + .forkexec_idx = 0, \ + \ + .flags = 1*SD_LOAD_BALANCE \ + | 1*SD_BALANCE_NEWIDLE \ + | 1*SD_BALANCE_EXEC \ + | 1*SD_BALANCE_FORK \ + | 0*SD_BALANCE_WAKE \ + | 1*SD_WAKE_AFFINE \ + | 0*SD_PREFER_LOCAL \ + | 0*SD_SHARE_CPUPOWER \ + | 0*SD_SHARE_PKG_RESOURCES \ + | 0*SD_SERIALIZE \ + | arch_sd_sibling_asym_packing() \ + | sd_balance_for_package_power() \ + | sd_power_saving_flags() \ + , \ + .last_balance = jiffies, \ + .balance_interval = 1, \ +} +#endif + #include <asm-generic/topology.h> #endif /* _ASM_ARM_TOPOLOGY_H */ diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index a1b1f7f..945b980 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -227,6 +227,17 @@ unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) } /* + * sched_domain flag configuration + */ +/* TODO add a config flag for this function */ +int arch_sd_sibling_asym_packing(void) +{ + if (sched_smt_power_savings || sched_mc_power_savings) + return SD_ASYM_PACKING; + return 0; +} + +/* * default topology function */ -- 1.7.4.1

12 years, 6 months

[RFC PATCH v2 06/09] ARM: cpu topology: Modify cpu_power according to cpufreq

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 134 +++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 126 insertions(+), 8 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 2774c5d..a1b1f7f 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -21,6 +21,10 @@ #include <linux/cpumask.h> #include <linux/cpuset.h> +#ifdef CONFIG_CPU_FREQ +#include <linux/cpufreq.h> +#endif + #include <asm/cputype.h> #include <asm/topology.h> @@ -54,6 +58,7 @@ struct cputopo_arm cpu_topology[NR_CPUS]; * using its own cpu_power even it's not always true because of * no_hz_idle_balance */ + static DEFINE_PER_CPU(unsigned int, cpu_scale); /* @@ -65,17 +70,127 @@ unsigned int advanced_topology = 1; static void normal_cpu_topology_mask(void); static void (*set_cpu_topology_mask)(void) = normal_cpu_topology_mask; -/* This table sets the cpu_power scale of a cpu according to the sched_mc mode. - * The content of this table could be SoC specific so we should add a method to - * overwrite this default table. +#ifdef CONFIG_CPU_FREQ +/* + * This struct describes parameters to compute cpu_power + */ +struct cputopo_power { + int id; + int max; /* max idx in the table */ + unsigned int step; /* frequency step for the table */ + unsigned int *table; /* table of cpu_power */ +}; + +/* default table with one default cpu_power value */ +unsigned int table_default_power[1] = { + 1024 +}; + +static struct cputopo_power default_cpu_power = { + .max = 1, + .step = 1, + .table = table_default_power, +}; + +/* CA-9 table with cpufreq modifying cpu_power */ +#define CPU_MAX_FREQ 10 +/* we use a 200Mhz step for scaling cpu power */ +#define CPU_TOPO_FREQ_STEP 200000 +/* This table sets the cpu_power scale of a cpu according to 2 inputs which are + * the frequency and the sched_mc mode. The content of this table could be SoC + * specific so we should add a method to overwrite this default table. * TODO: Study how to use DT for setting this table */ +unsigned int table_ca9_power[CPU_MAX_FREQ] = { +/* freq< 200 400 600 800 1000 1200 1400 1600 1800 other*/ + 4096, 4096, 4096, 1024, 1024, 1024, 1024, 1024, 1024, 1024, /* Power save mode CA9 MP */ +}; + +static struct cputopo_power CA9_cpu_power = { + .max = CPU_MAX_FREQ, + .step = CPU_TOPO_FREQ_STEP, + .table = table_ca9_power, +}; + #define ARM_CORTEX_A9_DEFAULT_SCALE 0 #define ARM_CORTEX_A9_POWER_SCALE 1 /* This table list all possible cpu power configuration */ -unsigned int table_config[2] = { +struct cputopo_power *table_config[2] = { + &default_cpu_power, + &CA9_cpu_power, +}; + +struct cputopo_scale { + int id; + int freq; + struct cputopo_power *power; +}; + +/* + * The table will be mostly used by one cpu which will update the + * configuration for all cpu on a cpufreq notification + * or a sched_mc level change + */ +static struct cputopo_scale cpu_power[NR_CPUS]; + +static void set_cpufreq_scale(unsigned int cpuid, unsigned int freq) +{ + unsigned int idx; + + cpu_power[cpuid].freq = freq; + + idx = freq / cpu_power[cpuid].power->step; + if (idx >= cpu_power[cpuid].power->max) + idx = cpu_power[cpuid].power->max - 1; + + per_cpu(cpu_scale, cpuid) = cpu_power[cpuid].power->table[idx]; + smp_wmb(); +} + +static void set_power_scale(unsigned int cpu, unsigned int idx) +{ + cpu_power[cpu].id = idx; + cpu_power[cpu].power = table_config[idx]; + + set_cpufreq_scale(cpu, cpu_power[cpu].freq); +} + +static int topo_cpufreq_transition(struct notifier_block *nb, + unsigned long state, void *data) +{ + struct cpufreq_freqs *freqs = data; + + if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE) + set_cpufreq_scale(freqs->cpu, freqs->new); + + return NOTIFY_OK; +} + +static struct notifier_block topo_cpufreq_nb = { + .notifier_call = topo_cpufreq_transition, +}; + +static int topo_cpufreq_init(void) +{ + unsigned int cpu; + + /* TODO set initial value according to current freq */ + + /* init core mask */ + for_each_possible_cpu(cpu) { + cpu_power[cpu].freq = 0; + cpu_power[cpu].power = &default_cpu_power; + } + + return cpufreq_register_notifier(&topo_cpufreq_nb, + CPUFREQ_TRANSITION_NOTIFIER); +} +#else +#define ARM_CORTEX_A9_DEFAULT_SCALE 0 +#define ARM_CORTEX_A9_POWER_SCALE 0 +/* This table list all possible cpu power configuration */ +unsigned int table_config[1] = { 1024, - 4096 }; static void set_power_scale(unsigned int cpu, unsigned int idx) @@ -83,14 +198,17 @@ static void set_power_scale(unsigned int cpu, unsigned int idx) per_cpu(cpu_scale, cpu) = table_config[idx]; } +static inline int topo_cpufreq_init(void) {return 0; } +#endif + static int init_cpu_power_scale(void) { + /* register cpufreq notifer */ + topo_cpufreq_init(); + /* Do we need to change default config */ advanced_topology = 1; - /* force topology update */ - arch_update_cpu_topology(); - /* Force a cpu topology update */ rebuild_sched_domains(); -- 1.7.4.1

12 years, 6 months

[RFC PATCH v2 05/09] ARM: cpu topology: Modify cpu_power according to sched_mc level

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 43 +++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 41 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 9d80e22..2774c5d 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -19,6 +19,7 @@ #include <linux/nodemask.h> #include <linux/sched.h> #include <linux/cpumask.h> +#include <linux/cpuset.h> #include <asm/cputype.h> #include <asm/topology.h> @@ -61,6 +62,43 @@ static DEFINE_PER_CPU(unsigned int, cpu_scale); unsigned int advanced_topology = 1; +static void normal_cpu_topology_mask(void); +static void (*set_cpu_topology_mask)(void) = normal_cpu_topology_mask; + +/* This table sets the cpu_power scale of a cpu according to the sched_mc mode. + * The content of this table could be SoC specific so we should add a method to + * overwrite this default table. + * TODO: Study how to use DT for setting this table + */ +#define ARM_CORTEX_A9_DEFAULT_SCALE 0 +#define ARM_CORTEX_A9_POWER_SCALE 1 +/* This table list all possible cpu power configuration */ +unsigned int table_config[2] = { + 1024, + 4096 +}; + +static void set_power_scale(unsigned int cpu, unsigned int idx) +{ + per_cpu(cpu_scale, cpu) = table_config[idx]; +} + +static int init_cpu_power_scale(void) +{ + /* Do we need to change default config */ + advanced_topology = 1; + + /* force topology update */ + arch_update_cpu_topology(); + + /* Force a cpu topology update */ + rebuild_sched_domains(); + + return 0; +} + +core_initcall(init_cpu_power_scale); + /* * Update the cpu power */ @@ -129,6 +167,7 @@ static void normal_cpu_topology_mask(void) for_each_possible_cpu(cpuid) { default_cpu_topology_mask(cpuid); + set_power_scale(cpuid, ARM_CORTEX_A9_DEFAULT_SCALE); } smp_wmb(); } @@ -139,7 +178,6 @@ static void normal_cpu_topology_mask(void) */ static void power_cpu_topology_mask_CA9(void) { - unsigned int cpuid, cpu; for_each_possible_cpu(cpuid) { @@ -164,6 +202,7 @@ static void power_cpu_topology_mask_CA9(void) } } } + set_power_scale(cpuid, ARM_CORTEX_A9_POWER_SCALE); } smp_wmb(); } @@ -278,7 +317,7 @@ int arch_update_cpu_topology(void) /* set topology policy */ update_cpu_topology_policy(); - /* set topology mask*/ + /* set topology mask and power */ (*set_cpu_topology_mask)(); return 1; -- 1.7.4.1

12 years, 6 months

[RFC PATCH v2 04/09] ARM: scheduler: add a cpu_power function

by Vincent Guittot

Add an architecture specific function for setting cpu_power Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index af1c3e6..9d80e22 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -45,12 +45,32 @@ struct cputopo_arm cpu_topology[NR_CPUS]; /* + * cpu power scale management + */ + +/* + * a per cpu data structure should be better because each cpu is mainly + * using its own cpu_power even it's not always true because of + * no_hz_idle_balance + */ +static DEFINE_PER_CPU(unsigned int, cpu_scale); + +/* * cpu topology mask management */ unsigned int advanced_topology = 1; /* + * Update the cpu power + */ + +unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) +{ + return per_cpu(cpu_scale, cpu); +} + +/* * default topology function */ @@ -281,6 +301,8 @@ void init_cpu_topology(void) cpu_topo->socket_id = -1; cpumask_clear(&cpu_topo->core_sibling); cpumask_clear(&cpu_topo->thread_sibling); + + per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE; } smp_wmb(); } -- 1.7.4.1

12 years, 6 months

[RFC PATCH v2 03/09] ARM: cpu topology: Enable ARCH_POWER

by Vincent Guittot

Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- kernel/sched_features.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/kernel/sched_features.h b/kernel/sched_features.h index 2e74677..85f8bd9 100644 --- a/kernel/sched_features.h +++ b/kernel/sched_features.h @@ -47,7 +47,7 @@ SCHED_FEAT(CACHE_HOT_BUDDY, 1) /* * Use arch dependent cpu power functions */ -SCHED_FEAT(ARCH_POWER, 0) +SCHED_FEAT(ARCH_POWER, 1) SCHED_FEAT(HRTICK, 0) SCHED_FEAT(DOUBLE_TICK, 0) -- 1.7.4.1

12 years, 6 months

[RFC PATCH v2 02/09] ARM: cpu topology: modify cpu topology

by Vincent Guittot

Modify the CPU topology policy according to the sched_mc level and the cortex family Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 80 +++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 76 insertions(+), 4 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 90352cb..af1c3e6 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -18,6 +18,7 @@ #include <linux/node.h> #include <linux/nodemask.h> #include <linux/sched.h> +#include <linux/cpumask.h> #include <asm/cputype.h> #include <asm/topology.h> @@ -47,7 +48,7 @@ struct cputopo_arm cpu_topology[NR_CPUS]; * cpu topology mask management */ -unsigned int advanced_topology = 0; +unsigned int advanced_topology = 1; /* * default topology function @@ -113,6 +114,74 @@ static void normal_cpu_topology_mask(void) } /* + * For Cortex-A9 MPcore, we emulate a multi-package topology in power mode. + * The goal is to gathers tasks on 1 virtual package + */ +static void power_cpu_topology_mask_CA9(void) +{ + + unsigned int cpuid, cpu; + + for_each_possible_cpu(cpuid) { + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; + + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + + if ((cpuid_topo->socket_id == cpu_topo->socket_id) + && ((cpuid & 0x1) == (cpu & 0x1))) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } + } + smp_wmb(); +} + +#define ARM_FAMILY_MASK 0xFF0FFFF0 +#define ARM_CORTEX_A9_FAMILY 0x410FC090 + +/* update_cpu_topology_policy select a cpu topology policy according to the + * available cores. + * TODO: The current version assumes that all cores are exactly the same which + * might not be true. We need to update it to take into account various + * configuration among which system with different kind of core. + */ +static int update_cpu_topology_policy(void) +{ + unsigned long cpuid; + + if (sched_mc_power_savings == POWERSAVINGS_BALANCE_NONE) { + set_cpu_topology_mask = normal_cpu_topology_mask; + return 0; + } + + cpuid = read_cpuid_id(); + cpuid &= ARM_FAMILY_MASK; + + switch (cpuid) { + case ARM_CORTEX_A9_FAMILY: + set_cpu_topology_mask = power_cpu_topology_mask_CA9; + break; + default: + set_cpu_topology_mask = normal_cpu_topology_mask; + break; + } + + return 0; +} + +/* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, * which prevents simultaneous write access to cpu_topology array @@ -183,11 +252,14 @@ int arch_update_cpu_topology(void) if (!advanced_topology) return 0; - /* clear core mask */ + /* clear core threads mask */ clear_cpu_topology_mask(); - /* update core and thread sibling masks */ - normal_cpu_topology_mask(); + /* set topology policy */ + update_cpu_topology_policy(); + + /* set topology mask*/ + (*set_cpu_topology_mask)(); return 1; } -- 1.7.4.1

12 years, 6 months

[RFC PATCH v2 01/09] ARM: cpu topology: Add update_cpu_topology function

by Vincent Guittot

arch_update_cpu_topology function is called by the scheduler before building its sched_domain hierarchy. Prepare the update of the cpu topology masks in this function in addition to set it in the the store_cpu_topology which is executed only once per cpu. Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- arch/arm/kernel/topology.c | 108 +++++++++++++++++++++++++++++++++++--------- 1 files changed, 87 insertions(+), 21 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 8200dea..90352cb 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -43,12 +43,76 @@ struct cputopo_arm cpu_topology[NR_CPUS]; +/* + * cpu topology mask management + */ + +unsigned int advanced_topology = 0; + +/* + * default topology function + */ + const struct cpumask *cpu_coregroup_mask(int cpu) { return &cpu_topology[cpu].core_sibling; } /* + * clear cpu topology masks + */ +static void clear_cpu_topology_mask(void) +{ + unsigned int cpuid; + for_each_possible_cpu(cpuid) { + struct cputopo_arm *cpuid_topo = &(cpu_topology[cpuid]); + cpumask_clear(&cpuid_topo->core_sibling); + cpumask_clear(&cpuid_topo->thread_sibling); + } + smp_wmb(); +} + +/* + * default_cpu_topology_mask set the core and thread mask as described in the + * ARM ARM + */ +static inline void default_cpu_topology_mask(unsigned int cpuid) +{ + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; + unsigned int cpu; + + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + + if (cpuid_topo->socket_id == cpu_topo->socket_id) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } + smp_wmb(); +} + +static void normal_cpu_topology_mask(void) +{ + unsigned int cpuid; + + for_each_possible_cpu(cpuid) { + default_cpu_topology_mask(cpuid); + } + smp_wmb(); +} + +/* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, * which prevents simultaneous write access to cpu_topology array @@ -57,7 +121,6 @@ void store_cpu_topology(unsigned int cpuid) { struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; unsigned int mpidr; - unsigned int cpu; /* If the cpu topology has been already set, just return */ if (cpuid_topo->core_id != -1) @@ -99,26 +162,11 @@ void store_cpu_topology(unsigned int cpuid) cpuid_topo->socket_id = -1; } - /* update core and thread sibling masks */ - for_each_possible_cpu(cpu) { - struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; - - if (cpuid_topo->socket_id == cpu_topo->socket_id) { - cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, - &cpuid_topo->core_sibling); - - if (cpuid_topo->core_id == cpu_topo->core_id) { - cpumask_set_cpu(cpuid, - &cpu_topo->thread_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, - &cpuid_topo->thread_sibling); - } - } - } - smp_wmb(); + /* + * The core and thread sibling masks can also be updated during the + * call of arch_update_cpu_topology + */ + default_cpu_topology_mask(cpuid); printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", cpuid, cpu_topology[cpuid].thread_id, @@ -127,6 +175,24 @@ void store_cpu_topology(unsigned int cpuid) } /* + * arch_update_cpu_topology is called by the scheduler before building + * a new sched_domain hierarchy. + */ +int arch_update_cpu_topology(void) +{ + if (!advanced_topology) + return 0; + + /* clear core mask */ + clear_cpu_topology_mask(); + + /* update core and thread sibling masks */ + normal_cpu_topology_mask(); + + return 1; +} + +/* * init_cpu_topology is called at boot when only one cpu is running * which prevent simultaneous write access to cpu_topology array */ -- 1.7.4.1

12 years, 6 months

INFO: possible circular locking dependency detected (v3.2-rc1)

by Shawn Guo

I'm running v3.2-rc1 kernel with CONFIG_PROVE_LOCKING enabled on imx6 and imx5 with Linaro rootfs (nano, developer) and seeing a circular locking dependency warning. ---8<---- [ 3.520947] Freeing init memory: 260K Loading, please wait... [ 3.713140] [ 3.714647] ====================================================== [ 3.720836] [ INFO: possible circular locking dependency detected ] [ 3.727112] 3.2.0-rc1+ #54 [ 3.729825] ------------------------------------------------------- [ 3.736102] udevd/368 is trying to acquire lock: [ 3.740728] (&sig->cred_guard_mutex){+.+.+.}, at: [<8013c688>] lock_trace+0x 28/0x5c [ 3.748544] [ 3.748547] but task is already holding lock: [ 3.754398] (&sb->s_type->i_mutex_key#6){+.+.+.}, at: [<800fc954>] do_lookup +0x1e4/0x32c [ 3.762665] [ 3.762668] which lock already depends on the new lock. [ 3.762674] [ 3.770879] [ 3.770882] the existing dependency chain (in reverse order) is: [ 3.778383] [ 3.778386] -> #1 (&sb->s_type->i_mutex_key#6){+.+.+.}: [ 3.785170] [<8006a7d8>] __lock_acquire+0x14c4/0x1a04 [ 3.790871] [<8006b34c>] lock_acquire+0x124/0x148 [ 3.796211] [<8047999c>] mutex_lock_nested+0x5c/0x394 [ 3.801903] [<800fc954>] do_lookup+0x1e4/0x32c [ 3.806982] [<800fcc6c>] link_path_walk+0x1d0/0x7d0 [ 3.812495] [<800fe750>] path_openat+0xac/0x374 [ 3.817661] [<800feb48>] do_filp_open+0x3c/0x88 [ 3.822826] [<800f5e98>] open_exec+0x2c/0x100 [ 3.827818] [<800f7544>] do_execve+0xd4/0x2a8 [ 3.832810] [<80011790>] sys_execve+0x44/0x64 [ 3.837815] [<8000db00>] ret_fast_syscall+0x0/0x3c [ 3.843245] [ 3.843248] -> #0 (&sig->cred_guard_mutex){+.+.+.}: [ 3.849667] [<80067aa4>] print_circular_bug+0x68/0x2b8 [ 3.855445] [<8006a5ac>] __lock_acquire+0x1298/0x1a04 [ 3.861132] [<8006b34c>] lock_acquire+0x124/0x148 [ 3.866470] [<804791a8>] mutex_lock_killable_nested+0x60/0x464 [ 3.872940] [<8013c688>] lock_trace+0x28/0x5c [ 3.877932] [<8013e79c>] proc_lookupfd_common+0x60/0xc8 [ 3.883795] [<8013e844>] proc_lookupfd+0x1c/0x24 [ 3.889047] [<800fa96c>] d_alloc_and_lookup+0x54/0x70 [ 3.894738] [<800fc978>] do_lookup+0x208/0x32c [ 3.899816] [<800fd434>] path_lookupat+0xfc/0x6c8 [ 3.905155] [<800fda2c>] do_path_lookup+0x2c/0x68 [ 3.910495] [<800feab0>] user_path_at_empty+0x68/0x98 [ 3.916181] [<800feb04>] user_path_at+0x24/0x2c [ 3.921346] [<800f4eb4>] vfs_fstatat+0x44/0x74 [ 3.926425] [<800f4f40>] vfs_stat+0x2c/0x30 [ 3.931243] [<800f5164>] sys_stat64+0x24/0x40 [ 3.936234] [<8000db00>] ret_fast_syscall+0x0/0x3c [ 3.941662] [ 3.941666] other info that might help us debug this: [ 3.941671] [ 3.949702] Possible unsafe locking scenario: [ 3.949708] [ 3.955644] CPU0 CPU1 [ 3.960181] ---- ---- [ 3.964718] lock(&sb->s_type->i_mutex_key); [ 3.969114] lock(&sig->cred_guard_mutex); [ 3.975853] lock(&sb->s_type->i_mutex_key); [ 3.982766] lock(&sig->cred_guard_mutex); [ 3.986984] [ 3.986987] *** DEADLOCK *** [ 3.986991] [ 3.992941] 1 lock held by udevd/368: [ 3.996609] #0: (&sb->s_type->i_mutex_key#6){+.+.+.}, at: [<800fc954>] do_l ookup+0x1e4/0x32c [ 4.005314] [ 4.005317] stack backtrace: [ 4.009712] [<800151dc>] (unwind_backtrace+0x0/0xec) from [<80477088>] (dump_ stack+0x20/0x24) [ 4.018260] [<80477088>] (dump_stack+0x20/0x24) from [<80067ca8>] (print_circ ular_bug+0x26c/0x2b8) [ 4.027242] [<80067ca8>] (print_circular_bug+0x26c/0x2b8) from [<8006a5ac>] ( __lock_acquire+0x1298/0x1a04) [ 4.036918] [<8006a5ac>] (__lock_acquire+0x1298/0x1a04) from [<8006b34c>] (lo ck_acquire+0x124/0x148) [ 4.046072] [<8006b34c>] (lock_acquire+0x124/0x148) from [<804791a8>] (mutex_ lock_killable_nested+0x60/0x464) [ 4.056007] [<804791a8>] (mutex_lock_killable_nested+0x60/0x464) from [<8013c 688>] (lock_trace+0x28/0x5c) [ 4.065593] [<8013c688>] (lock_trace+0x28/0x5c) from [<8013e79c>] (proc_looku pfd_common+0x60/0xc8) [ 4.074572] [<8013e79c>] (proc_lookupfd_common+0x60/0xc8) from [<8013e844>] ( proc_lookupfd+0x1c/0x24) [ 4.083812] [<8013e844>] (proc_lookupfd+0x1c/0x24) from [<800fa96c>] (d_alloc _and_lookup+0x54/0x70) [ 4.092878] [<800fa96c>] (d_alloc_and_lookup+0x54/0x70) from [<800fc978>] (do _lookup+0x208/0x32c) [ 4.101771] [<800fc978>] (do_lookup+0x208/0x32c) from [<800fd434>] (path_look upat+0xfc/0x6c8) [ 4.110317] [<800fd434>] (path_lookupat+0xfc/0x6c8) from [<800fda2c>] (do_pat h_lookup+0x2c/0x68) [ 4.119123] [<800fda2c>] (do_path_lookup+0x2c/0x68) from [<800feab0>] (user_p ath_at_empty+0x68/0x98) [ 4.128275] [<800feab0>] (user_path_at_empty+0x68/0x98) from [<800feb04>] (us er_path_at+0x24/0x2c) [ 4.137253] [<800feb04>] (user_path_at+0x24/0x2c) from [<800f4eb4>] (vfs_fsta tat+0x44/0x74) [ 4.145621] [<800f4eb4>] (vfs_fstatat+0x44/0x74) from [<800f4f40>] (vfs_stat+ 0x2c/0x30) [ 4.153642] [<800f4f40>] (vfs_stat+0x2c/0x30) from [<800f5164>] (sys_stat64+0 x24/0x40) [ 4.161579] [<800f5164>] (sys_stat64+0x24/0x40) from [<8000db00>] (ret_fast_s yscall+0x0/0x3c) [ 4.173173] udevd[369]: starting version 173 [ 4.585095] mmc0: new high speed SDHC card at address aaaa [ 4.591330] mmcblk0: mmc0:aaaa SD04G 3.69 GiB [ 4.597998] mmcblk0: p1 p2 p3 [ 5.384460] mmc1: host does not support reading read-only switch. assuming wr ite-enable. [ 5.796502] mmc1: new high speed SDHC card at address 1234 [ 5.803063] mmcblk1: mmc1:1234 SA04G 3.68 GiB [ 5.810156] mmcblk1: p1 p2 p3 [ 6.032487] EXT4-fs (mmcblk0p3): INFO: recovery required on readonly filesyst em [ 6.039849] EXT4-fs (mmcblk0p3): write access will be enabled during recovery [ 6.064099] EXT4-fs (mmcblk0p3): recovery complete [ 6.074078] EXT4-fs (mmcblk0p3): mounted filesystem with ordered data mode. O pts: (null) Last login: Thu Jan 1 00:00:27 UTC 1970 on tty1 Welcome to Linaro 11.10 (development branch) (GNU/Linux 3.2.0-rc1+ armv7l) * Documentation: https://wiki.linaro.org/ root@linaro-nano:~# ---->8--- As I see this only on v3.2-rc1 kernel, I suspect it's a v3.2-rc1 kernel issue and have reported on LKML[1]. I post it here for information and hope people running other platforms can try to reproduce the issue and confirm it's a common rather than imx only issue. Regards, Shawn https://lkml.org/lkml/2011/11/11/120

12 years, 6 months

Initial linaro-android-3.1 kernel for 11.11

by john stultz

Just wanted to announce that the initial Linaro+Android-3.1 kernel for 11.11 is available. I've tagged it as: linux-linaro-3.1-2011.11-0-android-0 >From the branch: git://android.git.linaro.org/kernel/linaro-android.git linaro-android-3.1-agreen-rebase Please remember Nico is freezing the 11.11 linaro kernel on Monday, and I'll be tagging the 11.11 linaro-android kernel shortly there after. thanks -john

12 years, 6 months

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linaro-dev November 2011