On 11/22/2011 08:57 PM, Somebody in the thread at some point said:
On Tue, Nov 22, 2011 at 6:02 PM, Mans Rullgardmans.rullgard@linaro.org wrote:
On 22 November 2011 05:14, Shilimkar, Santoshsantosh.shilimkar@ti.com wrote:
Mans,
On Tue, Nov 22, 2011 at 8:15 AM, Mans Rullgardmans.rullgard@linaro.org wrote:
These patches fix and tweak various cache settings for the 4460 resulting in a speed increase exceeding 10% in some tests.
Mans Rullgard (5): OMAP4: apply L2 cache lockdown workaround only on 4460 ES1.0
This one is OK though the Panda were suppose to made out of es1.1 and es1.0 was not suppose to be supported. The WA is not full proof and you still might see corruption with this. Hence for mainline, we have decided not to push this patch.
Well, currently the tilt kernel applies this to all 4460 versions, twice even. This patch makes it do the right thing on both 1.0 and 1.1.
I see. If it's for Linaro internal tree it's fine.
Just a FYI TI LT tree is basis for customer for FOSS release from TI.
What TI LT tree does for 4460 support is cobbled together and stolen from other trees in various states of completion, it's workable at the moment but any input from Mans or anyone else for making it better is super welcome.
So keep them on by default but allow them to be turned off. In the longer term, we should of course try to make these selectively applied at runtime whenever possible.
Yep. That's the idea. On internal product kernels we do disable once which are NA for a chip.
Issue is that for TI LT kernels, we target 4430 and 4460 support in one build. We can't statically turn off stuff that 4430 needs.
-Andy